From: James Raphael Tiovalen <jamestiotio@gmail.com>
To: opensbi@lists.infradead.org
Cc: andrew.jones@linux.dev, atishp@rivosinc.com,
James Raphael Tiovalen <jamestiotio@gmail.com>
Subject: [PATCH] lib: sbi_pmu: Add FW counter index validation when reading high bits on RV64
Date: Sat, 17 Jan 2026 20:50:31 +0800 [thread overview]
Message-ID: <20260117125031.56031-1-jamestiotio@gmail.com> (raw)
Currently, when we attempt to read the upper 32 bits of a firmware
counter on RV64 or higher, we just set `sbiret.value` to 0 without
validating the counter index. The SBI specification requires us to set
`sbiret.error` to `SBI_ERR_INVALID_PARAM` if the counter index points to
a hardware counter or an invalid counter. Add a validation check to
ensure compliance with the specification on RV64 or higher.
Fixes: 51951d9e9af8 ("lib: sbi_pmu: Implement sbi_pmu_counter_fw_read_hi")
Signed-off-by: James Raphael Tiovalen <jamestiotio@gmail.com>
---
include/sbi/sbi_pmu.h | 2 ++
lib/sbi/sbi_ecall_pmu.c | 1 +
lib/sbi/sbi_pmu.c | 8 ++++++++
3 files changed, 11 insertions(+)
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index c0e25f5a..51d4a345 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -138,6 +138,8 @@ int sbi_pmu_add_raw_event_counter_map(uint64_t select, uint64_t select_mask, u32
int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval);
+int sbi_pmu_is_fw_ctr_idx(uint32_t cidx);
+
int sbi_pmu_ctr_stop(unsigned long cidx_base, unsigned long cidx_mask,
unsigned long flag);
diff --git a/lib/sbi/sbi_ecall_pmu.c b/lib/sbi/sbi_ecall_pmu.c
index 868e8665..0765d959 100644
--- a/lib/sbi/sbi_ecall_pmu.c
+++ b/lib/sbi/sbi_ecall_pmu.c
@@ -58,6 +58,7 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
ret = sbi_pmu_ctr_fw_read(regs->a0, &temp);
out->value = temp >> 32;
#else
+ ret = sbi_pmu_is_fw_ctr_idx(regs->a0);
out->value = 0;
#endif
break;
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index e084005d..d7ebe4e2 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -227,6 +227,14 @@ static bool pmu_ctr_idx_validate(unsigned long cbase, unsigned long cmask)
return cmask && cbase + sbi_fls(cmask) < total_ctrs;
}
+int sbi_pmu_is_fw_ctr_idx(uint32_t cidx)
+{
+ if (cidx < num_hw_ctrs || cidx >= total_ctrs)
+ return SBI_EINVAL;
+
+ return 0;
+}
+
int sbi_pmu_ctr_fw_read(uint32_t cidx, uint64_t *cval)
{
int event_idx_type;
--
2.43.0
--
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next reply other threads:[~2026-01-17 12:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-17 12:50 James Raphael Tiovalen [this message]
2026-01-19 11:57 ` [PATCH] lib: sbi_pmu: Add FW counter index validation when reading high bits on RV64 Radim Krčmář
2026-01-19 17:32 ` James R T
2026-01-20 13:59 ` Radim Krčmář
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