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From: Bo Gan <ganboing@gmail.com>
To: opensbi@lists.infradead.org, dramforever@live.com,
	anup.patel@oss.qualcomm.com
Cc: anup@brainfault.org, cleger@rivosinc.com, samuel.holland@sifive.com
Subject: [PATCH 2/7] include: sbi: Add sbi_regs_prev_xlen
Date: Tue, 10 Feb 2026 01:40:39 -0800	[thread overview]
Message-ID: <20260210094044.72591-3-ganboing@gmail.com> (raw)
In-Reply-To: <20260210094044.72591-1-ganboing@gmail.com>

sbi_regs_prev_xlen reports the xlen of previous mode by decoding
from multiple CSRs including mstatus/hstatus/vsstatus

Signed-off-by: Bo Gan <ganboing@gmail.com>
---
 include/sbi/sbi_trap.h | 58 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/include/sbi/sbi_trap.h b/include/sbi/sbi_trap.h
index 731a0c98..4ef672f4 100644
--- a/include/sbi/sbi_trap.h
+++ b/include/sbi/sbi_trap.h
@@ -273,6 +273,64 @@ static inline int sbi_mstatus_prev_mode(unsigned long mstatus)
 	return (mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
 }
 
+#if __riscv_xlen == 32
+static inline int sbi_regs_prev_xlen(const struct sbi_trap_regs *regs)
+{
+	return __riscv_xlen;
+}
+#else
+static inline int sbi_mstatus_sxl(unsigned long mstatus)
+{
+	return (mstatus & MSTATUS_SXL) >> MSTATUS_SXL_SHIFT;
+}
+
+static inline int sbi_mstatus_uxl(unsigned long mstatus)
+{
+	return (mstatus & MSTATUS_UXL) >> MSTATUS_UXL_SHIFT;
+}
+
+static inline int sbi_hstatus_vsxl(unsigned long hstatus)
+{
+	return (hstatus & HSTATUS_VSXL) >> HSTATUS_VSXL_SHIFT;
+}
+
+static inline int sbi_regs_prev_xlen(const struct sbi_trap_regs *regs)
+{
+	unsigned long hstatus, vsstatus;
+
+	if (!sbi_regs_from_virt(regs)) {
+		switch (sbi_mstatus_prev_mode(regs->mstatus)) {
+		case PRV_M:
+			return __riscv_xlen;
+		case PRV_S:
+			return MXL_TO_XLEN(sbi_mstatus_sxl(regs->mstatus));
+		case PRV_U:
+			return MXL_TO_XLEN(sbi_mstatus_uxl(regs->mstatus));
+		default:
+			__builtin_unreachable();
+		}
+	}
+
+	/* V=1, Check HSXLEN first */
+	if (sbi_mstatus_sxl(regs->mstatus) < MXL_XLEN_64)
+		return 32;
+
+	hstatus = csr_read(CSR_HSTATUS);
+	/* Check VSXLEN */
+	if (sbi_hstatus_vsxl(hstatus) < MXL_XLEN_64)
+		return 32;
+
+	vsstatus = csr_read(CSR_VSSTATUS);
+	switch (sbi_mstatus_prev_mode(regs->mstatus)) {
+		case PRV_S:
+			return MXL_TO_XLEN(sbi_hstatus_vsxl(hstatus));
+		case PRV_U:
+			return MXL_TO_XLEN(sbi_mstatus_uxl(vsstatus));
+	}
+	__builtin_unreachable();
+}
+#endif
+
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap);
 
-- 
2.34.1


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  parent reply	other threads:[~2026-02-10  9:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-10  9:40 [PATCH 0/7] Fixes for load/store misaligned and access faults Bo Gan
2026-02-10  9:40 ` [PATCH 1/7] include: sbi: Add more mstatus and instruction encoding Bo Gan
2026-03-20  4:40   ` Anup Patel
2026-02-10  9:40 ` Bo Gan [this message]
2026-03-20  4:42   ` [PATCH 2/7] include: sbi: Add sbi_regs_prev_xlen Anup Patel
2026-02-10  9:40 ` [PATCH 3/7] include: sbi: Add GET_RDS_NUM/SET(_FP32/_FP64)_RDS macros Bo Gan
2026-03-20  4:44   ` Anup Patel
2026-02-10  9:40 ` [PATCH 4/7] include: sbi: set FS dirty in vsstatus when V=1 Bo Gan
2026-03-20  4:45   ` Anup Patel
2026-02-10  9:40 ` [PATCH 5/7] lib: sbi: Do not override emulator callback for vector load/store Bo Gan
2026-03-20  5:13   ` Anup Patel
2026-03-21  4:50     ` Bo Gan
2026-02-10  9:40 ` [PATCH 6/7] lib: sbi: Rework load/store emulator instruction decoding Bo Gan
2026-02-10 16:08   ` Andrew Jones
2026-02-11 10:36     ` Bo Gan
2026-02-11 15:01       ` Andrew Jones
2026-04-02  0:02   ` Bo Gan
2026-02-10  9:40 ` [PATCH 7/7] [NOT-FOR-UPSTREAM] Test program for misaligned load/store Bo Gan

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