From: Yu-Chien Peter Lin <peter.lin@sifive.com>
To: opensbi@lists.infradead.org
Cc: zong.li@sifive.com, greentime.hu@sifive.com,
Yu-Chien Peter Lin <peter.lin@sifive.com>
Subject: [RFC PATCH 3/3] sifive_dev_platform: Set default MMIO region when SmePMP is enabled
Date: Tue, 24 Feb 2026 11:17:33 +0800 [thread overview]
Message-ID: <20260224031733.3817148-3-peter.lin@sifive.com> (raw)
In-Reply-To: <20260224031733.3817148-1-peter.lin@sifive.com>
Set a default MMIO region with a single SmePMP entry, which allows us
to save entries for M-mode only devices. The default entry has M-/S-mode
shared permission, so system-level resource protection, such as RISC-V
World extension and WorldGuard checker, will be introduced to protect
M-mode only region access from lower privilege modes.
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
---
platform/generic/sifive/sifive_dev_platform.c | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/platform/generic/sifive/sifive_dev_platform.c b/platform/generic/sifive/sifive_dev_platform.c
index facc044f1..9799e5b88 100644
--- a/platform/generic/sifive/sifive_dev_platform.c
+++ b/platform/generic/sifive/sifive_dev_platform.c
@@ -5,10 +5,58 @@
*/
#include <platform_override.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_scratch.h>
+
+/*
+ * Instead of allocating individual PMP entries for each M-mode
+ * MMIO driver, configure SMEPMP regions to grant R/W permission
+ * to peripheral and system ports for all privilege modes.
+ * Finer-grained access control is enforced by wgChecker rules.
+ */
+static int sifive_smepmp_setup(void)
+{
+ struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+ int rc;
+
+ if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMEPMP))
+ return 0;
+
+ /* Peripheral port region: 0 to 2GiB */
+ rc = sbi_domain_root_add_memrange(0x0, 0x80000000, 0x80000000,
+ SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW);
+ if (rc)
+ return rc;
+
+ /* System port region: 512GiB to 1TiB */
+ rc = sbi_domain_root_add_memrange(0x8000000000, 0x8000000000, 0x8000000000,
+ SBI_DOMAIN_MEMREGION_MMIO |
+ SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+static int sifive_early_init(bool cold_boot)
+{
+ int rc;
+
+ if (cold_boot) {
+ rc = sifive_smepmp_setup();
+ if (rc)
+ return rc;
+ }
+
+ return generic_early_init(cold_boot);
+}
static int sifive_platform_init(const void *fdt, int nodeoff,
const struct fdt_match *match)
{
+ generic_platform_ops.early_init = sifive_early_init;
+
return 0;
}
--
2.43.7
--
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next prev parent reply other threads:[~2026-02-24 3:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-24 3:17 [RFC PATCH 1/3] platform: sifive: Add initial support for SiFive development platform Yu-Chien Peter Lin
2026-02-24 3:17 ` [RFC PATCH 2/3] lib: sbi_init: Call hart init before platform early init Yu-Chien Peter Lin
2026-03-22 5:58 ` Anup Patel
2026-02-24 3:17 ` Yu-Chien Peter Lin [this message]
2026-04-06 5:40 ` [RFC PATCH 3/3] sifive_dev_platform: Set default MMIO region when SmePMP is enabled Anup Patel
2026-04-06 5:40 ` [RFC PATCH 1/3] platform: sifive: Add initial support for SiFive development platform Anup Patel
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