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[103.95.112.190]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-35a030490b9sm7298892a91.17.2026.03.12.22.21.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Mar 2026 22:21:08 -0700 (PDT) From: Nicholas Piggin To: opensbi@lists.infradead.org Cc: Nicholas Piggin , Himanshu Chauhan Subject: [PATCH 16/18] dbtr: Heterogeneous trigger type support Date: Fri, 13 Mar 2026 15:19:45 +1000 Message-ID: <20260313051948.4017134-17-npiggin@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260313051948.4017134-1-npiggin@gmail.com> References: <20260313051948.4017134-1-npiggin@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260312_222111_065591_B30DDD4D X-CRM114-Status: GOOD ( 17.24 ) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org The Tenstorrent Ascalon core has 8 triggers that support the mcontrol6 type and another that supports the icount type. When installing SBI triggers, allocate HW triggers to them that satisfy their type requirement. A first pass is made over the requested SBI triggers which checks that all can be satisfied with available hardware triggers. If yes, then a second pass allocates each HW trigger and maps the corresponding SBI trigger to it. Signed-off-by: Nicholas Piggin --- lib/sbi/sbi_dbtr.c | 104 ++++++++++++++++++++++++++++++++------------- 1 file changed, 74 insertions(+), 30 deletions(-) diff --git a/lib/sbi/sbi_dbtr.c b/lib/sbi/sbi_dbtr.c index 77162efe..f91a2b0d 100644 --- a/lib/sbi/sbi_dbtr.c +++ b/lib/sbi/sbi_dbtr.c @@ -93,6 +93,31 @@ static bool sbi_hw_trigger_supports(struct sbi_hw_trigger *hw_trig, return true; } +static struct sbi_hw_trigger *sbi_alloc_hw_trigger( + unsigned long type, unsigned long tdata1) +{ + int i; + struct sbi_dbtr_hart_triggers_state *hart_state; + + hart_state = dbtr_thishart_state_ptr(); + if (!hart_state) + return NULL; + + for (i = 0; i < hart_state->total_trigs; i++) { + struct sbi_hw_trigger *hw_trig = INDEX_TO_HW_TRIGGER(i); + + if (hw_trig->inuse) + continue; + if (!sbi_hw_trigger_supports(hw_trig, type, tdata1)) + continue; + hw_trig->inuse = true; + + return hw_trig; + } + + return NULL; +} + static inline struct sbi_dbtr_trigger *sbi_alloc_trigger(void) { int i; @@ -357,8 +382,6 @@ static void dbtr_trigger_setup(struct sbi_dbtr_trigger *trig, SET_TRIG_HW_INDEX(trig->state, hw_trig->index); - hw_trig->inuse = true; - switch (TDATA1_GET_TYPE(tdata1)) { case RISCV_DBTR_TRIG_MCONTROL: if (__test_bit(RV_DBTR_BIT(MC, U), &tdata1)) @@ -654,8 +677,10 @@ int sbi_dbtr_install_trig(unsigned long smode, struct sbi_dbtr_data_msg *recv; struct sbi_dbtr_id_msg *xmit; struct sbi_dbtr_trigger *trig; + struct sbi_hw_trigger *hw_trig; + struct sbi_hw_trigger **hw_trigs; struct sbi_dbtr_hart_triggers_state *hs = NULL; - int err; + int err, i; hs = dbtr_thishart_state_ptr(); if (!hs) @@ -671,64 +696,83 @@ int sbi_dbtr_install_trig(unsigned long smode, sbi_hart_protection_map_range((unsigned long)shmem_base, trig_count * sizeof(*entry)); - /* Check requested triggers configuration */ + /* + * The first pass checks requested triggers configuration and allocates + * HW triggers, putting them into an array indexed by the recv'ed + * triggers. The second pass allocates DBTR triggers and maps them to + * the HW triggers. + */ + hw_trigs = sbi_zalloc(sizeof(hw_trigs[0]) * trig_count); + i = 0; for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) { - unsigned long tdata1; + unsigned long tdata1, type; recv = (struct sbi_dbtr_data_msg *)(&entry->data); tdata1 = lle_to_cpu(recv->tdata1); + type = TDATA1_GET_TYPE(tdata1); - if (!dbtr_trigger_supported(TDATA1_GET_TYPE(tdata1), tdata1)) { + if (!dbtr_trigger_supported(type, tdata1)) { *out = _idx; err = SBI_ERR_NOT_SUPPORTED; - goto out_unmap; + goto out_free_hw; + } + + if (!dbtr_trigger_valid(type, tdata1)) { + *out = _idx; + err = SBI_ERR_INVALID_PARAM; + goto out_free_hw; } - if (!dbtr_trigger_valid(TDATA1_GET_TYPE(tdata1), tdata1)) { + hw_trig = sbi_alloc_hw_trigger(type, tdata1); + if (!hw_trig) { *out = _idx; err = SBI_ERR_FAILED; - goto out_unmap; + goto out_free_hw; } - } - if (hs->available_trigs < trig_count) { - *out = hs->available_trigs; - err = SBI_ERR_FAILED; - goto out_unmap; + hw_trigs[i] = hw_trig; + i++; } /* Install triggers */ + i = 0; for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) { - struct sbi_hw_trigger *hw_trig; - /* - * Since we have already checked if enough triggers are - * available, trigger allocation must succeed. - */ - trig = sbi_alloc_trigger(); - recv = (struct sbi_dbtr_data_msg *)(&entry->data); xmit = (struct sbi_dbtr_id_msg *)(&entry->id); - hw_trig = INDEX_TO_HW_TRIGGER(trig->index); /* 1:1 trig / HW idx */ - if (hw_trig->inuse) { - *out = hs->available_trigs; - sbi_hart_protection_unmap_range((unsigned long)shmem_base, - trig_count * sizeof(*entry)); - sbi_printf("DBTR error: Hardware trigger already inuse\n"); - return SBI_ERR_FAILED; - } + /* + * HW triggers were all allocated in the previous pass. Now + * allocate and map dbtr triggers to them. + */ + hw_trig = hw_trigs[i++]; + + /* + * Since we have already checked if enough HW triggers are + * available, dbtr trig allocation must succeed here. + */ + trig = sbi_alloc_trigger(); dbtr_trigger_setup(trig, hw_trig, recv); dbtr_trigger_enable(trig); xmit->idx = cpu_to_lle(trig->index); } + sbi_free(hw_trigs); sbi_hart_protection_unmap_range((unsigned long)shmem_base, trig_count * sizeof(*entry)); return SBI_SUCCESS; -out_unmap: +out_free_hw: + /* Free unused HW allocations */ + for (i = 0; i < trig_count; i++) { + hw_trig = hw_trigs[i]; + if (!hw_trig) + break; + hw_trig->inuse = false; + } + + sbi_free(hw_trigs); sbi_hart_protection_unmap_range((unsigned long)shmem_base, trig_count * sizeof(*entry)); -- 2.51.0 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi