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Fri, 13 Mar 2026 06:39:44 -0700 (PDT) Received: from sw07.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2beab57b1d2sm2441671eec.32.2026.03.13.06.39.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 06:39:44 -0700 (PDT) From: Nylon Chen To: opensbi@lists.infradead.org Cc: zong.li@sifive.com, nick.hu@sifive.com, samuel.holland@sifive.com, yongxuan.wang@sifive.com, anup@brainfault.org, rkrcmar@qti.qualcomm.com, atishp@rivosinc.com, Nylon Chen Subject: [PATCH v4 2/3] lib: sbi: Enable Smrnmi extension handler Date: Fri, 13 Mar 2026 06:39:40 -0700 Message-ID: <20260313133941.3012966-3-nylon.chen@sifive.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260313133941.3012966-1-nylon.chen@sifive.com> References: <20260313133941.3012966-1-nylon.chen@sifive.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260313_133953_227344_07F06F25 X-CRM114-Status: GOOD ( 18.38 ) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org Introduce rnmi_vector_init() which prepares the hart for Smrnmi: 1. Checks if the hart supports Smrnmi extension 2. Writes scratch pointer into MNSCRATCH (same role as MSCRATCH for the RNMI entry path) The function is file-static and called at the end of sbi_hart_init() so every hart (cold and warm) initializes its own RNMI state before returning to the firmware boot sequence. Add set_rnmi_trap_vector() to struct sbi_platform_operations: int (*set_rnmi_trap_vector)(unsigned long handler_addr, bool cold_boot); Use 'unsigned long' rather than 'uintptr_t' for consistency with the rest of the platform operations interface. Platforms that support Smrnmi must implement this; others can leave it NULL. Add suspend/resume support for RNMI CSRs (MNSCRATCH and MNSTATUS) to ensure proper state preservation across non-retentive suspend. Note: This patch does not yet enable RNMI interrupts. The trap vector setup and MNSTATUS.NMIE enablement will be added in the next patch after the trap handler is implemented. Co-developed-by: Zong Li Signed-off-by: Zong Li Suggested-by: Nick Hu Suggested-by: Samuel Holland Signed-off-by: Nylon Chen Signed-off-by: Yong-Xuan Wang --- include/sbi/sbi_platform.h | 8 ++++++++ lib/sbi/sbi_hart.c | 27 ++++++++++++++++++++++++++- lib/sbi/sbi_hsm.c | 14 ++++++++++++++ 3 files changed, 48 insertions(+), 1 deletion(-) diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index e65d9877..555e8b79 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -149,6 +149,14 @@ struct sbi_platform_operations { unsigned long log2len); /** platform specific pmp disable on current HART */ void (*pmp_disable)(unsigned int n); + /** + * Platform-specific helper to program the RNMI trap vector. + * + * Called from rnmi_vector_init() with the firmware RNMI handler + * entry address and the cold_boot flag. Platforms that support + * Smrnmi must implement this; others can leave it NULL. + */ + int (*set_rnmi_trap_vector)(unsigned long handler_addr, bool cold_boot); }; /** Platform default per-HART stack size for exception/interrupt handling */ diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c index 495ad1d8..eca6662f 100644 --- a/lib/sbi/sbi_hart.c +++ b/lib/sbi/sbi_hart.c @@ -29,6 +29,9 @@ void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap; unsigned long hart_features_offset; +/* Forward declaration */ +static int rnmi_vector_init(struct sbi_scratch *scratch, bool cold_boot); + static void mstatus_init(struct sbi_scratch *scratch) { int cidx; @@ -756,7 +759,29 @@ int sbi_hart_init(struct sbi_scratch *scratch, bool cold_boot) if (rc) return rc; - return sbi_hart_reinit(scratch); + rc = sbi_hart_reinit(scratch); + if (rc) + return rc; + + return rnmi_vector_init(scratch, cold_boot); +} + +static int rnmi_vector_init(struct sbi_scratch *scratch, bool cold_boot) +{ + /* If the hart does not support Smrnmi then nothing to do. */ + if (!sbi_hart_has_extension(scratch, SBI_HART_EXT_SMRNMI)) + return 0; + + /* + * Set MNSCRATCH to the scratch pointer (same role as MSCRATCH). + * The RNMI handler (to be added in the next patch) will check + * MNSTATUS.MNPP to determine whether to use the scratch area + * (S/U-mode interrupted) or reuse the existing M-mode stack + * (M-mode interrupted). + */ + csr_write(CSR_MNSCRATCH, (unsigned long)scratch); + + return 0; } void __attribute__((noreturn)) sbi_hart_hang(void) diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c index 0a355f9c..41115080 100644 --- a/lib/sbi/sbi_hsm.c +++ b/lib/sbi/sbi_hsm.c @@ -49,6 +49,8 @@ struct sbi_hsm_data { unsigned long saved_medeleg; unsigned long saved_mideleg; u64 saved_menvcfg; + unsigned long saved_mnscratch; + unsigned long saved_mnstatus; atomic_t start_ticket; }; @@ -430,6 +432,12 @@ void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch) hdata->saved_mideleg = csr_read(CSR_MIDELEG); if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) hdata->saved_menvcfg = csr_read64(CSR_MENVCFG); + + /* Save RNMI CSRs if Smrnmi is supported */ + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMRNMI)) { + hdata->saved_mnscratch = csr_read(CSR_MNSCRATCH); + hdata->saved_mnstatus = csr_read(CSR_MNSTATUS); + } } static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch) @@ -443,6 +451,12 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch) csr_write(CSR_MEDELEG, hdata->saved_medeleg); csr_write(CSR_MIE, hdata->saved_mie); csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP))); + + /* Restore RNMI CSRs if Smrnmi is supported */ + if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SMRNMI)) { + csr_write(CSR_MNSCRATCH, hdata->saved_mnscratch); + csr_write(CSR_MNSTATUS, hdata->saved_mnstatus); + } } void sbi_hsm_hart_resume_start(struct sbi_scratch *scratch) -- 2.43.7 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi