From: dave.patel@riscstar.com
To: opensbi@lists.infradead.org
Cc: Scott Bambrough <scott@riscstar.com>,
Robin Randhawa <robin.randhawa@sifive.com>,
Anup Patel <anup.patel@qti.qualcomm.com>,
Samuel Holland <samuel.holland@sifive.com>,
Dave Patel <dave.patel@riscstar.com>,
Ray Mao <raymond.mao@riscstar.com>,
Anup Patel <anuppate@qti.qualcomm.com>,
Dhaval <dhaval@rivosinc.com>, Peter Lin <peter.lin@sifive.com>
Subject: [PATCH 3/4] lib: sbi: Add floating-point context save/restore support.
Date: Fri, 20 Mar 2026 14:23:48 +0000 [thread overview]
Message-ID: <20260320142349.72980-4-dave.patel@riscstar.com> (raw)
In-Reply-To: <20260320142349.72980-1-dave.patel@riscstar.com>
From: Dave Patel <dave.patel@riscstar.com>
Add support for saving and restoring RISC-V floating-point (F/D) extension
state in OpenSBI. This introduces a per-hart floating-point context
structure and helper routines to perform full context save and restore.
The floating-point context includes storage for all 32 FPi registers (f0–f31)
along with the fcsr control and status register. The register state is saved
and restored using double-precision load/store instructions (fsd/fld),
assuming an RV64 system with D-extension support.
The implementation follows an eager context switching model where the entire
FP state is saved and restored on every context switch. This avoids the need
for trap-based lazy management and keeps the design simple and deterministic.
A per-hart pointer is used to track the current floating-point context owner.
Notes:
- The implementation assumes the floating-point unit is enabled
(mstatus.FS != Off) when invoked.
- The context layout is fixed to 64-bit FP registers.
Signed-off-by: Dave Patel <dave.patel@riscstar.com>"
---
include/sbi/sbi_fp.h | 22 ++++++++
lib/sbi/objects.mk | 1 +
lib/sbi/sbi_fp.c | 117 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 140 insertions(+)
create mode 100644 include/sbi/sbi_fp.h
create mode 100644 lib/sbi/sbi_fp.c
diff --git a/include/sbi/sbi_fp.h b/include/sbi/sbi_fp.h
new file mode 100644
index 00000000..58c5b50e
--- /dev/null
+++ b/include/sbi/sbi_fp.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2026 RISCstar Solutions.
+ *
+ * Authors:
+ * Dave Patel <dave.patel@riscstar.com>
+ */
+
+#ifndef __SBI_FP_H__
+#define __SBI_FP_H__
+
+struct sbi_fp_context {
+ unsigned long f[32];
+ unsigned long fcsr;
+};
+
+struct sbi_fp_context *sbi_current_fp_context(void);
+void sbi_fp_save(struct sbi_fp_context *dst);
+void sbi_fp_restore(const struct sbi_fp_context *src);
+
+#endif //__SBI_VECTOR_H__
+
diff --git a/lib/sbi/objects.mk b/lib/sbi/objects.mk
index 5c0caf39..ca560c2e 100644
--- a/lib/sbi/objects.mk
+++ b/lib/sbi/objects.mk
@@ -107,3 +107,4 @@ libsbi-objs-y += sbi_unpriv.o
libsbi-objs-y += sbi_expected_trap.o
libsbi-objs-y += sbi_cppc.o
libsbi-objs-y += sbi_vector.o
+libsbi-objs-y += sbi_fp.o
diff --git a/lib/sbi/sbi_fp.c b/lib/sbi/sbi_fp.c
new file mode 100644
index 00000000..4d5e0f68
--- /dev/null
+++ b/lib/sbi/sbi_fp.c
@@ -0,0 +1,117 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2026 RISCstar Solutions.
+ *
+ * Authors:
+ * Dave Patel <dave.patel@riscstar.com>
+ */
+
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_fp.h>
+
+/* Per-hart current owner pointer (SMP-safe) */
+static inline struct sbi_fp_context **fp_owner_ptr(void)
+{
+ struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
+ return &scratch->fp_ctx;
+}
+
+/* Get current FP context */
+struct sbi_fp_context *sbi_current_fp_context(void)
+{
+ return *fp_owner_ptr();
+}
+
+void sbi_fp_save(struct sbi_fp_context *dst)
+{
+ if (!dst)
+ return;
+
+ asm volatile(
+ "fsd f0, 0(%0)\n"
+ "fsd f1, 8(%0)\n"
+ "fsd f2, 16(%0)\n"
+ "fsd f3, 24(%0)\n"
+ "fsd f4, 32(%0)\n"
+ "fsd f5, 40(%0)\n"
+ "fsd f6, 48(%0)\n"
+ "fsd f7, 56(%0)\n"
+ "fsd f8, 64(%0)\n"
+ "fsd f9, 72(%0)\n"
+ "fsd f10, 80(%0)\n"
+ "fsd f11, 88(%0)\n"
+ "fsd f12, 96(%0)\n"
+ "fsd f13, 104(%0)\n"
+ "fsd f14, 112(%0)\n"
+ "fsd f15, 120(%0)\n"
+ "fsd f16, 128(%0)\n"
+ "fsd f17, 136(%0)\n"
+ "fsd f18, 144(%0)\n"
+ "fsd f19, 152(%0)\n"
+ "fsd f20, 160(%0)\n"
+ "fsd f21, 168(%0)\n"
+ "fsd f22, 176(%0)\n"
+ "fsd f23, 184(%0)\n"
+ "fsd f24, 192(%0)\n"
+ "fsd f25, 200(%0)\n"
+ "fsd f26, 208(%0)\n"
+ "fsd f27, 216(%0)\n"
+ "fsd f28, 224(%0)\n"
+ "fsd f29, 232(%0)\n"
+ "fsd f30, 240(%0)\n"
+ "fsd f31, 248(%0)\n"
+ :
+ : "r"(dst->f)
+ : "memory"
+ );
+
+ dst->fcsr = csr_read(CSR_FCSR);
+}
+
+void sbi_fp_restore(const struct sbi_fp_context *src)
+{
+ if (!src)
+ return;
+
+ asm volatile(
+ "fld f0, 0(%0)\n"
+ "fld f1, 8(%0)\n"
+ "fld f2, 16(%0)\n"
+ "fld f3, 24(%0)\n"
+ "fld f4, 32(%0)\n"
+ "fld f5, 40(%0)\n"
+ "fld f6, 48(%0)\n"
+ "fld f7, 56(%0)\n"
+ "fld f8, 64(%0)\n"
+ "fld f9, 72(%0)\n"
+ "fld f10, 80(%0)\n"
+ "fld f11, 88(%0)\n"
+ "fld f12, 96(%0)\n"
+ "fld f13, 104(%0)\n"
+ "fld f14, 112(%0)\n"
+ "fld f15, 120(%0)\n"
+ "fld f16, 128(%0)\n"
+ "fld f17, 136(%0)\n"
+ "fld f18, 144(%0)\n"
+ "fld f19, 152(%0)\n"
+ "fld f20, 160(%0)\n"
+ "fld f21, 168(%0)\n"
+ "fld f22, 176(%0)\n"
+ "fld f23, 184(%0)\n"
+ "fld f24, 192(%0)\n"
+ "fld f25, 200(%0)\n"
+ "fld f26, 208(%0)\n"
+ "fld f27, 216(%0)\n"
+ "fld f28, 224(%0)\n"
+ "fld f29, 232(%0)\n"
+ "fld f30, 240(%0)\n"
+ "fld f31, 248(%0)\n"
+ :
+ : "r"(src->f)
+ : "memory"
+ );
+
+ csr_write(CSR_FCSR, src->fcsr);
+}
--
2.43.0
--
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next prev parent reply other threads:[~2026-03-20 14:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 14:23 [PATCH v1 0/4] Add eager FP and RISC-V vector context switching support dave.patel
2026-03-20 14:23 ` [PATCH 1/4] lib: sbi: domain: ensure boot_hartid is assigned dave.patel
2026-03-20 14:23 ` [PATCH 2/4] lib: sbi: Add RISC-V vector context save/restore support (eager switching) dave.patel
2026-03-20 14:23 ` dave.patel [this message]
2026-03-20 14:23 ` [PATCH 4/4] include: sbi: scratch: Add per-hart FP and vector context pointers in scratch dave.patel
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