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dkim=none (message not signed) header.d=none;dmarc=fail action=none header.from=aheadcomputing.com; Received-SPF: Fail (protection.outlook.com: domain of aheadcomputing.com does not designate 50.45.236.54 as permitted sender) receiver=protection.outlook.com; client-ip=50.45.236.54; helo=mail.aheadcomputing.com; Received: from mail.aheadcomputing.com (50.45.236.54) by SA2PEPF00003AE8.mail.protection.outlook.com (10.167.248.8) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9745.21 via Frontend Transport; Sat, 28 Mar 2026 05:44:13 +0000 Received: from davidAhead.lan (unknown [10.8.0.9]) by mail.aheadcomputing.com (Postfix) with ESMTP id B8DA280AAC; Fri, 27 Mar 2026 22:44:12 -0700 (PDT) From: "David E. Garcia Porras" To: opensbi@lists.infradead.org Cc: "David E. Garcia Porras" Subject: [PATCH 3/4] lib: utils: irqchip: imsic: Dispatch non-IPI interrupts via irqchip framework Date: Fri, 27 Mar 2026 23:43:46 -0600 Message-ID: <20260328054347.3706029-4-david.garcia@aheadcomputing.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260328054347.3706029-1-david.garcia@aheadcomputing.com> References: <20260328054347.3706029-1-david.garcia@aheadcomputing.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AE8:EE_|SJ0PR22MB3415:EE_ X-MS-Office365-Filtering-Correlation-Id: 17d0651f-f329-47ae-1a3e-08de8c8d0b44 X-MS-Exchange-AtpMessageProperties: SA X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|56012099003|18002099003|22082099003|55112099003; X-Microsoft-Antispam-Message-Info: mXMn2Zh3NaPDJgKuJQMu+PrggvwVn3/F8RbB2m1s+lIRmOJpjHZ7T3EnX6vgcDtwcB/ahOwNdgDZIZtIy9MpzajlTDBwRC9TlpvDLv8jte9v0SYn3e4yx1BWqNP+3pdS9eJimABBBj5THFMVlLGiN8A6D9Ki9YCVZddCKlrmsuhcVEphr5MLzT3R1RQoLadbc8eaXLCWKpAzDi6kwM5kPnxhF3wS48Dl4qI1IYbi9RQ9zjcUOLQhxkn6wUVpwLu4wbV9Wz5YE7gsxvB3kvCypdf9N3NdaF6u8SqRHywSHy1v5NyVILhp9LWNSSuRGitqyUUdvFH3Fvn+XEtZHkKvJlpWZ54QUfaxkgxJeULWnr2AYCJpguDlAjKlEUngIfSmXlkn2PJwzujgQB6SSvCRoIHrBNlUpXgMfNpGW7DKGC2LUek9+q18//E367gEqq95rAHyEcjGnS3nVRx38uX/WQwXYL9CrUMIPj5ypF3nTNHpBZT+qjVeSgvfupv8qP9I5eXcTep8pATBmYYMokV8aD5yYgyMUzZN5QJXQU0GLyGQmDJOd51ZhMLTP+fV0odX/pukVBfmdWEE077aWSZNsRCOvxtbIpb5c8sqdFQyQ1gKN8b8TuKMr02hjSl9a0tik8UKttgsk5rmFV/TbOED4uiQgmxDKsBAuVls2c21S7AiWmfjLr1gTw/IXxNGbYSsLF4jfnVS+DAZUdBEJpO8/nL71SfSNYatApajQUqxUydJeASyX94ClnRX8OYTmZa6OhVlLwozRnB1RXLrjR4spA== X-Forefront-Antispam-Report: CIP:50.45.236.54;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.aheadcomputing.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700016)(376014)(82310400026)(56012099003)(18002099003)(22082099003)(55112099003);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iyomaIwmvYtPcY4SnRLl158Ow8NoIAMAN/udxmoTp5L8UWO1Qv+RPmIrnpl0xGUNTTmDYLoPUAPSIBYd8IVK+Q/yHTlErLdEOmODQBCClS6DJs6BiTY2+XcD4t4J1S9eO19JXuNkjZM8icqwJVfiq0kyTnzoHvTpURSRdu/uFPJFquh+0zy0Jh7o4JriAxF6LaVOaZDrRoP6L7A5V64VMAX5+IPWyxwVAf962sgsq0BNipEtIft1q2ecGSAX/rGxal6xUqraPspCijGTgPvOtVv5qDXSl3y79+NuqntE+mLtJiSbqNQnlkgLb8fAIN/4IHYUsXTvcyrIkezUwjHRDfc7y+AQIk5aSgxzfeiw0yU8KMssNUnQN7g3zOm6VzFkwR1KD0iNHRjWGAJvSihr/Z+jb0xsZw6ElhPcPCEh1Ysn4Ux66S9JUKVXn2onf0Fv X-OriginatorOrg: aheadcomputing.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Mar 2026 05:44:13.9529 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 17d0651f-f329-47ae-1a3e-08de8c8d0b44 X-MS-Exchange-CrossTenant-Id: 53cf747c-7b8f-4d06-8b1e-b22383a3fabf X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=53cf747c-7b8f-4d06-8b1e-b22383a3fabf;Ip=[50.45.236.54];Helo=[mail.aheadcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AE8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR22MB3415 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260327_224421_149179_2C69C2A9 X-CRM114-Status: UNSURE ( 7.36 ) X-CRM114-Notice: Please train this message. X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org Currently imsic_process_hwirqs() only handles the IPI interrupt (IMSIC_IPI_ID) and logs all other external interrupts as unhandled. Platforms using IMSIC in MSI delivery mode (APLIC wired to IMSIC) have no way to handle M-mode external interrupts through the existing sbi_irqchip handler registration framework. Route non-IPI interrupts through sbi_irqchip_process_hwirq() so that handlers registered via sbi_irqchip_register_handler() are invoked. Also implement hwirq_unmask and hwirq_mask callbacks using the existing imsic_local_eix_update() helper, enabling sbi_irqchip_register_handler() to automatically enable interrupt identities when a handler is registered. Signed-off-by: David E. Garcia Porras --- lib/utils/irqchip/imsic.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c index 7559a069..6fd82688 100644 --- a/lib/utils/irqchip/imsic.c +++ b/lib/utils/irqchip/imsic.c @@ -159,8 +159,7 @@ static int imsic_process_hwirqs(struct sbi_irqchip_device *chip) sbi_ipi_process(); break; default: - sbi_printf("%s: unhandled IRQ%d\n", - __func__, (u32)mirq); + sbi_irqchip_process_hwirq(chip, mirq); break; } } @@ -353,10 +352,22 @@ static int imsic_hwirq_setup(struct sbi_irqchip_device *chip, u32 hwirq) return 0; } +static void imsic_hwirq_unmask(struct sbi_irqchip_device *chip, u32 hwirq) +{ + imsic_local_eix_update(hwirq, 1, false, true); +} + +static void imsic_hwirq_mask(struct sbi_irqchip_device *chip, u32 hwirq) +{ + imsic_local_eix_update(hwirq, 1, false, false); +} + static struct sbi_irqchip_device imsic_device = { .warm_init = imsic_warm_irqchip_init, .process_hwirqs = imsic_process_hwirqs, .hwirq_setup = imsic_hwirq_setup, + .hwirq_unmask = imsic_hwirq_unmask, + .hwirq_mask = imsic_hwirq_mask, }; int imsic_cold_irqchip_init(struct imsic_data *imsic) -- 2.43.0 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi