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X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org Use the CEASE instruction as documented in the SoC datasheet to fix the warm reset issue observed on my EIC7700/Hifive P550. Refer to PATCH 2/2 for a more detailed description. Signed-off-by: Bo Gan --- Changes in v2: - Clear the disableDCacheClockGate bit in EIC770X_CSR_FEAT0 See more detailed comments in function eic770x_hart_stop --- Bo Gan (2): include: utils/hsm: Add __noreturn attribute for sifive_cease platform: generic: eswin: Add eic770x_hsm and fix warm reset issues include/sbi_utils/hsm/fdt_hsm_sifive_inst.h | 3 +- platform/generic/eswin/eic770x.c | 118 ++++++++++++++++++-- platform/generic/eswin/hfp.c | 4 +- platform/generic/include/eswin/eic770x.h | 20 +++- 4 files changed, 128 insertions(+), 17 deletions(-) -- 2.34.1 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi