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[69.171.141.154]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-538394f82cfsm133231001cf.13.2026.10.29.09.00.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 09:00:01 -0700 (PDT) From: Raymond Mao To: opensbi@lists.infradead.org Cc: anup@brainfault.org, anup.patel@oss.qualcomm.com, scott@riscstar.com, raymond.mao@riscstar.com, robin.randhawa@sifive.com, samuel.holland@sifive.com, peter.lin@sifive.com Subject: [PATCH v2 08/12] lib: utils: irqchip: derive APLIC targets from sysirq nodes Date: Thu, 29 Oct 2026 11:59:25 -0400 Message-Id: <20261029155929.586597-9-raymondmaoca@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20261029155929.586597-1-raymondmaoca@gmail.com> References: <20261029155929.586597-1-raymondmaoca@gmail.com> X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261029_090003_162784_02194592 X-CRM114-Status: GOOD ( 17.89 ) X-Spam-Score: -2.1 (--) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Raymond Mao Derive a per-HWIRQ target hartindex map from each sysirq node's target domain boot-hart, and store the result in aplic_data. This is used for setting IDC target per HWIRQ under irqchip driver instead of hardcoding to a specific target. Signed-off-by: Raymond Mao --- include/sbi_utils/irqchip/aplic.h | 1 + lib/utils/irqchip/fdt_irqchip_aplic.c | 103 ++++++++++++++++++++++++++ 2 files changed, 104 insertions(+) diff --git a/include/sbi_utils/irqchip/aplic.h b/include/sbi_utils/irqchip/aplic.h index 8d6d871e..76b39099 100644 --- a/include/sbi_utils/irqchip/aplic.h +++ b/include/sbi_utils/irqchip/aplic.h @@ -48,6 +48,7 @@ struct aplic_data { struct aplic_msicfg_data msicfg_smode; struct aplic_delegate_data delegate[APLIC_MAX_DELEGATE]; u32 *idc_map; + u32 *hwirq_target_hartindex; }; int aplic_cold_irqchip_init(struct aplic_data *aplic); diff --git a/lib/utils/irqchip/fdt_irqchip_aplic.c b/lib/utils/irqchip/fdt_irqchip_aplic.c index 4d7b1e77..0f9ba636 100644 --- a/lib/utils/irqchip/fdt_irqchip_aplic.c +++ b/lib/utils/irqchip/fdt_irqchip_aplic.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -53,6 +54,88 @@ static int irqchip_aplic_update_idc_map(const void *fdt, int nodeoff, return 0; } +static u32 irqchip_aplic_domain_boot_hartindex(void *fdt, int domain_offset) +{ + int len, cpu_offset; + const fdt32_t *val; + + val = fdt_getprop(fdt, domain_offset, "boot-hart", &len); + if (val && len >= 4) { + cpu_offset = fdt_node_offset_by_phandle(fdt, + fdt32_to_cpu(*val)); + if (cpu_offset >= 0) { + u32 hartid; + + if (!fdt_parse_hart_id(fdt, cpu_offset, &hartid)) { + u32 hidx = sbi_hartid_to_hartindex(hartid); + + if (sbi_hartindex_valid(hidx)) + return hidx; + } + } + } + + return current_hartindex(); +} + +static void irqchip_aplic_fill_hwirq_targets_from_sysirq(const void *fdt, + int aplic_nodeoff, + struct aplic_data *pd) +{ + int chosen_off, nodeoff; + int len, rc, index; + const fdt32_t *val; + u32 boot_hartindex; + + if (!fdt || aplic_nodeoff < 0 || !pd || !pd->hwirq_target_hartindex) + return; + + chosen_off = fdt_path_offset(fdt, "/chosen/opensbi-domains"); + if (chosen_off < 0) + return; + + fdt_for_each_subnode(nodeoff, fdt, chosen_off) { + if (fdt_node_check_compatible(fdt, nodeoff, + "opensbi,mpxy-sysirq")) + continue; + + val = fdt_getprop(fdt, nodeoff, "opensbi,domain", &len); + if (!val || len < 4) + continue; + + rc = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val)); + if (rc < 0) + continue; + + boot_hartindex = irqchip_aplic_domain_boot_hartindex((void *)fdt, + rc); + + for (index = 0; ; index++) { + struct fdt_phandle_args args; + u32 hwirq; + + rc = fdt_parse_phandle_with_args(fdt, nodeoff, + "interrupts-extended", + "#interrupt-cells", + index, &args); + if (rc) + break; + if (args.args_count < 1) + continue; + if (args.node_offset != aplic_nodeoff) + continue; + + hwirq = args.args[0]; + if (!hwirq || hwirq > pd->num_source) + continue; + + if (pd->hwirq_target_hartindex[hwirq] == -1U) + pd->hwirq_target_hartindex[hwirq] = + boot_hartindex; + } + } +} + static int irqchip_aplic_cold_init(const void *fdt, int nodeoff, const struct fdt_match *match) { @@ -79,6 +162,24 @@ static int irqchip_aplic_cold_init(const void *fdt, int nodeoff, goto fail_free_idc_map; } + /* Precompute target hartindex per HWIRQ from DT. */ + if (pd->targets_mmode) { + u32 i; + + pd->hwirq_target_hartindex = + sbi_zalloc(sizeof(*pd->hwirq_target_hartindex) * + (pd->num_source + 1)); + if (!pd->hwirq_target_hartindex) { + rc = SBI_ENOMEM; + goto fail_free_idc_map; + } + + for (i = 0; i <= pd->num_source; i++) + pd->hwirq_target_hartindex[i] = -1U; + + irqchip_aplic_fill_hwirq_targets_from_sysirq(fdt, nodeoff, pd); + } + rc = aplic_cold_irqchip_init(pd); if (rc) goto fail_free_idc_map; @@ -86,6 +187,8 @@ static int irqchip_aplic_cold_init(const void *fdt, int nodeoff, return 0; fail_free_idc_map: + if (pd->hwirq_target_hartindex) + sbi_free(pd->hwirq_target_hartindex); if (pd->num_idc) sbi_free(pd->idc_map); fail_free_data: -- 2.25.1 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi