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Fri, 30 Oct 2026 03:45:22 -0700 (PDT) Received: from localhost ([136.226.240.163]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cdb09706f01sm548269a12.20.2026.10.30.03.45.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 03:45:21 -0700 (PDT) From: Yu-Chien Peter Lin To: opensbi@lists.infradead.org Cc: anup@brainfault.org, pawandeep.oza@oss.qualcomm.com, rkrcmar@qti.qualcomm.com, raymond.mao@riscstar.com, robin.randhawa@sifive.com, samuel.holland@sifive.com, zong.li@sifive.com, greentime.hu@sifive.com, Yu-Chien Peter Lin Subject: [PATCH v4 0/9] Add RISC-V Worlds ISA support to OpenSBI Date: Fri, 30 Oct 2026 18:45:09 +0800 Message-Id: <20261030104518.3297875-1-peter.lin@sifive.com> X-Mailer: git-send-email 2.34.1 X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261030_034525_267629_0E515247 X-CRM114-Status: GOOD ( 11.62 ) X-Spam-Score: -2.1 (--) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" X-Spam-Status: No, score=-11.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 This patch series adds support for the RISC-V Worlds ISA extensions in OpenSBI, introducing a WID-based hart protection backend to enforce hardware isolation boundaries across domains. Trust Model and Boot-time Roles ------------------------------- The implementation adheres to the two-phase M-mode trust model: - RoT M-mode phase: An earlier boot stage (e.g., ROM or SPL) may program mwid and mlwidlist, locking mwid prior to handing off execution to OpenSBI. - Regular M-mode phase (OpenSBI): OpenSBI treats the non-ISA platform constraints (pmwid, pmwidlist, pmlwidlist) and CSR states (mwid, mlwidlist) as immutable input policies from the hardware/RoT. It locks mwid if still unlocked, preventing subsequent M-mode software from altering its own WID, and programs per-domain mlwid and mwiddeleg based on device tree configuration. Device Tree Bindings -------------------- Per-hart properties defined in Linux kernel DT bindings v3 [1]: - riscv,pmwid: M-mode World ID - riscv,pmwidlist: M-mode permitted WID bitmap - riscv,pmlwidlist: S/U-mode permitted WID bitmap Per-domain properties (see docs/domain_support.md): - wid: World ID assigned to this domain for S/U-mode - widdeleg: WID delegation bitmap for this domain [1] https://patchwork.kernel.org/project/linux-riscv/cover/20260812122131.1534906-1-peter.lin@sifive.com/ Yu-Chien Peter Lin (9): lib: sbi_hart: add RISC-V Worlds ISA extensions lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties lib: fdt_domain: parse domain WID properties lib: sbi_hart: lock mwid CSR for RoT immutability lib: sbi_domain_context: propagate error from sbi_hart_protection_reconfigure lib: sbi_hart_worlds: Implement WID hart protection backend include: sbi_types: add PRIx64 format macro lib: sbi: display World ID configuration at boot docs: document WID DT properties docs/domain_support.md | 38 ++++++ include/sbi/riscv_encoding.h | 12 ++ include/sbi/sbi_domain.h | 6 + include/sbi/sbi_hart.h | 15 +++ include/sbi/sbi_hart_worlds.h | 24 ++++ include/sbi/sbi_types.h | 2 + lib/sbi/objects.mk | 1 + lib/sbi/sbi_domain.c | 20 ++++ lib/sbi/sbi_domain_context.c | 5 +- lib/sbi/sbi_hart.c | 17 +++ lib/sbi/sbi_hart_worlds.c | 210 ++++++++++++++++++++++++++++++++++ lib/sbi/sbi_init.c | 13 +++ lib/utils/fdt/fdt_domain.c | 87 ++++++++++++++ lib/utils/fdt/fdt_helper.c | 69 +++++++++-- 14 files changed, 511 insertions(+), 8 deletions(-) create mode 100644 include/sbi/sbi_hart_worlds.h create mode 100644 lib/sbi/sbi_hart_worlds.c -- 2.43.7 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi