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Fri, 30 Oct 2026 03:45:31 -0700 (PDT) Received: from localhost ([136.226.240.163]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ae6e7d429fsm8096849a91.2.2026.10.30.03.45.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 03:45:30 -0700 (PDT) From: Yu-Chien Peter Lin To: opensbi@lists.infradead.org Cc: anup@brainfault.org, pawandeep.oza@oss.qualcomm.com, rkrcmar@qti.qualcomm.com, raymond.mao@riscstar.com, robin.randhawa@sifive.com, samuel.holland@sifive.com, zong.li@sifive.com, greentime.hu@sifive.com, Yu-Chien Peter Lin Subject: [PATCH v4 2/9] lib: utils: fdt_helper: parse RISC-V Worlds per-hart WID properties Date: Fri, 30 Oct 2026 18:45:11 +0800 Message-Id: <20261030104518.3297875-3-peter.lin@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261030104518.3297875-1-peter.lin@sifive.com> References: <20261030104518.3297875-1-peter.lin@sifive.com> X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261030_034533_259216_E845D6B2 X-CRM114-Status: GOOD ( 13.16 ) X-Spam-Score: -2.1 (--) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Extend fdt_parse_isa_extensions_all_harts() to also parse the platform-defined RISC-V Worlds DT properties in /cpus/cpu@X: - riscv,pmwid: M-mode World ID - riscv,pmwidlist: bitmap of permitted M-mode WIDs - riscv,pmlwidlist: bitmap of permitted lower-privilege WIDs and store the parsed values in struct sbi_hart_features. These platform-defined values serve as the root-of-trust constraints for per-domain WID assignment during domain creation and context switching. Signed-off-by: Yu-Chien Peter Lin --- Change v3->v4: - Parse Worlds properties in fdt_parse_isa_extensions_all_harts() instead of a separate fdt_parse_worlds_all_harts() (Anup). - Drop RB-tag from Oza --- include/sbi/sbi_hart.h | 5 +++ lib/utils/fdt/fdt_helper.c | 69 ++++++++++++++++++++++++++++++++++---- 2 files changed, 67 insertions(+), 7 deletions(-) diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h index ed344783..629e3f64 100644 --- a/include/sbi/sbi_hart.h +++ b/include/sbi/sbi_hart.h @@ -138,6 +138,11 @@ struct sbi_hart_features { unsigned int mhpm_mask; unsigned int mhpm_bits; unsigned long expected_trap; + u32 pmwid; + u64 pmwidlist; + u64 pmlwidlist; + bool has_pmwid; + bool has_pmlwidlist; }; extern unsigned long hart_features_offset; diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c index 747ba028..fdd25648 100644 --- a/lib/utils/fdt/fdt_helper.c +++ b/lib/utils/fdt/fdt_helper.c @@ -442,16 +442,71 @@ int fdt_parse_isa_extensions_all_harts(const void *fdt) if (val && len > 0) { fdt_parse_isa_extensions_one_hart((const char *)val, hfeatures->extensions, len); - continue; + } else { + val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len); + if (!val || len <= 0) + return SBI_ENOENT; + + err = fdt_parse_isa_one_hart((const char *)val, + hfeatures->extensions); + if (err) + return err; } - val = fdt_getprop(fdt, cpu_offset, "riscv,isa", &len); - if (!val || len <= 0) - return SBI_ENOENT; + val = fdt_getprop(fdt, cpu_offset, "riscv,pmwid", &len); + if (val && len == sizeof(fdt32_t)) { + hfeatures->pmwid = fdt32_to_cpu(*val); + hfeatures->has_pmwid = true; + } - err = fdt_parse_isa_one_hart((const char *)val, hfeatures->extensions); - if (err) - return err; + val = fdt_getprop(fdt, cpu_offset, "riscv,pmwidlist", &len); + if (val && len == 2 * sizeof(fdt32_t)) { + hfeatures->pmwidlist = ((u64)fdt32_to_cpu(val[0]) << 32) | + fdt32_to_cpu(val[1]); + if (!hfeatures->pmwidlist) { + sbi_printf("%s: hart%u riscv,pmwidlist is empty\n", + __func__, hartid); + return SBI_EINVAL; + } + } + + val = fdt_getprop(fdt, cpu_offset, "riscv,pmlwidlist", &len); + if (val && len == 2 * sizeof(fdt32_t)) { + hfeatures->pmlwidlist = ((u64)fdt32_to_cpu(val[0]) << 32) | + fdt32_to_cpu(val[1]); + hfeatures->has_pmlwidlist = true; + } + + /* Sanity checks */ +#if __riscv_xlen == 32 + if (hfeatures->pmwidlist && + (hfeatures->pmwidlist >> 32)) { + sbi_printf("%s: hart%u riscv,pmwidlist has bits beyond XLEN\n", + __func__, hartid); + return SBI_EINVAL; + } + + if (hfeatures->has_pmlwidlist && + (hfeatures->pmlwidlist >> 32)) { + sbi_printf("%s: hart%u riscv,pmlwidlist has bits beyond XLEN\n", + __func__, hartid); + return SBI_EINVAL; + } +#endif + + if (hfeatures->has_pmwid && + hfeatures->pmwid >= __riscv_xlen) { + sbi_printf("%s: hart%u riscv,pmwid (%u) exceeds max WID\n", + __func__, hartid, hfeatures->pmwid); + return SBI_EINVAL; + } + + if (hfeatures->pmwidlist && hfeatures->has_pmwid && + !(hfeatures->pmwidlist & BIT_ULL(hfeatures->pmwid))) { + sbi_printf("%s: hart%u riscv,pmwid (%u) not in pmwidlist\n", + __func__, hartid, hfeatures->pmwid); + return SBI_EINVAL; + } } return 0; -- 2.43.7 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi