[PATCH] p8700: don't use AMO instructions

[PATCH] p8700: don't use AMO instructions

[Vladimir Kondratiev]

P8700 supports LR/SC but not AMO instructions.
Tell this to the compiler, it will in turn
define __riscv_zalrsc and undefine __riscv_atomic
that used in the code to generate appropriate instructions

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
---
 platform/generic/mips/objects.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/generic/mips/objects.mk b/platform/generic/mips/objects.mk
index a08c4c632997..84e21b7995bc 100644
--- a/platform/generic/mips/objects.mk
+++ b/platform/generic/mips/objects.mk
@@ -5,4 +5,5 @@
 ifeq ($(PLATFORM_RISCV_XLEN), 64)
 carray-platform_override_modules-$(CONFIG_PLATFORM_MIPS_P8700) += mips_p8700
 platform-objs-$(CONFIG_PLATFORM_MIPS_P8700) += mips/p8700.o mips/mips_warm_boot.o
+PLATFORM_RISCV_ISA = rv64imfdc_zalrsc_zicsr_zifencei
 endif

base-commit: 111738090c6cdf2d852717b3ad15b65e2085d237
-- 
2.43.0


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Re: [PATCH] p8700: don't use AMO instructions

[Bo Gan]

Why not override PLATFORM_RISCV_ISA at build time? I think this change is
going to affect the entire generic/ platform. Specifically jh7110 won't
even boot with lrsc. The Hart 0 (S7 core) only support AMO, not LR/SC,
the opposite of your p8700.

Bo

On 12/18/25 03:47, Vladimir Kondratiev wrote:
> P8700 supports LR/SC but not AMO instructions.
> Tell this to the compiler, it will in turn
> define __riscv_zalrsc and undefine __riscv_atomic
> that used in the code to generate appropriate instructions
> 
> Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
> ---
>   platform/generic/mips/objects.mk | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/platform/generic/mips/objects.mk b/platform/generic/mips/objects.mk
> index a08c4c632997..84e21b7995bc 100644
> --- a/platform/generic/mips/objects.mk
> +++ b/platform/generic/mips/objects.mk
> @@ -5,4 +5,5 @@
>   ifeq ($(PLATFORM_RISCV_XLEN), 64)
>   carray-platform_override_modules-$(CONFIG_PLATFORM_MIPS_P8700) += mips_p8700
>   platform-objs-$(CONFIG_PLATFORM_MIPS_P8700) += mips/p8700.o mips/mips_warm_boot.o
> +PLATFORM_RISCV_ISA = rv64imfdc_zalrsc_zicsr_zifencei
>   endif
> 
> base-commit: 111738090c6cdf2d852717b3ad15b65e2085d237


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