[PATCH 0/5] memorder: Miscellaneous fixes

[PATCH 0/5] memorder: Miscellaneous fixes

[Akira Yokosawa]

From d4c4e843d7810ad589f256868aafb3cb06147a80 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 23:39:11 +0900
Subject: [PATCH 0/5] memorder: Miscellaneous fixes

Hi Paul,

This patch set consists of small fixes in memorder.

Patches #1, #2, and #3 are trivial fixes.

Patch #4 fixes a recursive reference within the chapter. I chose
Section 14.1, but there might be other choices.

Patch #5 might be a wrong guess on my side. I have not consulted
any document regarding PA-RISC arch or its CPU implementation.
Please apply it if it is the right guess.

       Thanks, Akira
--
Akira Yokosawa (5):
  memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c
  memorder: Fix usage of \IfInBook macro
  memorder: More reword to 'full-strength non-void RMW'
  memorder: Update reference to memory-barrier primitives
  memorder: Fix table of 'Summary of Memory Ordering'

 appendix/styleguide/styleguide.tex |  2 +-
 memorder/memorder.tex              | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

-- 
2.7.4

[PATCH 1/5] memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c

[Akira Yokosawa]

From 7eec5812868178d3845f11abbe36e90c1d0cc602 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Thu, 14 Sep 2017 23:51:34 +0900
Subject: [PATCH 1/5] memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 4194c42..9a66829 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3702,7 +3702,7 @@ dependencies.
 \begin{table*}
 \small
 \centering
-\renewcommand*{\arraystretch}{1.2}
+\renewcommand*{\arraystretch}{1.2}\OneColumnHSpace{-.6in}
 \begin{tabular}{l|p{2in}|c|c|c|c|c|c|c|c|c|c|c}
 	\multicolumn{2}{l|}{~}
 	& \begin{picture}(6,60)(0,0)
-- 
2.7.4

[PATCH 2/5] memorder: Fix usage of \IfInBook macro

[Akira Yokosawa]

From e6392e493a8aacedabf7fbbdb0499c3fb3343856 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Fri, 15 Sep 2017 00:13:09 +0900
Subject: From e6392e493a8aacedabf7fbbdb0499c3fb3343856 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Fri, 15 Sep 2017 00:13:09 +0900
Subject: [PATCH 2/5] memorder: Fix usage of \IfInBook macro

This macro requires two arguments, one is for "then" case,
the other is for "else" case.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 9a66829..10aa380 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3900,7 +3900,7 @@ of reordering memory optimizations across the barriers.
 The \co{smp_read_barrier_depends()} primitive has a similar effect, but
 only on Alpha CPUs.
 \IfInBook{See Chapter~\ref{chp:memorder:Memory Ordering} for
-more information on use of these primitives.}
+more information on use of these primitives.}{}

 These primitives generate code only in SMP kernels, however, each
 also has a UP version ({\tt mb()}, {\tt rmb()}, {\tt wmb()},
-- 
2.7.4



This macro requires two arguments, one is for "then" case,
the other is for "else" case.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 9a66829..10aa380 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3900,7 +3900,7 @@ of reordering memory optimizations across the barriers.
 The \co{smp_read_barrier_depends()} primitive has a similar effect, but
 only on Alpha CPUs.
 \IfInBook{See Chapter~\ref{chp:memorder:Memory Ordering} for
-more information on use of these primitives.}
+more information on use of these primitives.}{}

 These primitives generate code only in SMP kernels, however, each
 also has a UP version ({\tt mb()}, {\tt rmb()}, {\tt wmb()},
-- 
2.7.4

[PATCH 3/5] memorder: More reword to 'full-strength non-void RMW'

[Akira Yokosawa]

From eaf26d55d0e73058d9574a0966aaeb6292dc8729 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 11:00:34 +0900
Subject: [PATCH 3/5] memorder: More reword to 'full-strength non-void RMW'

Also update table in styleguide.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 appendix/styleguide/styleguide.tex | 2 +-
 memorder/memorder.tex              | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/appendix/styleguide/styleguide.tex b/appendix/styleguide/styleguide.tex
index 5fd3b4e..072da9e 100644
--- a/appendix/styleguide/styleguide.tex
+++ b/appendix/styleguide/styleguide.tex
@@ -1424,7 +1424,7 @@ using booktabs' ruled lines.
 		     &   & Y &   W &      &   & Y &    &  Y &   W &    \\
 	\tco{smp_mb()} & CP &
 		     & Y & Y &   Y &      & Y & Y &  Y &  Y &   Y &    \\
-	Successful Non-Relaxed Non-\tco{void} RMW & CP &
+	Successful full-strength non-\tco{void} RMW & CP &
 		   Y & Y & Y &   Y &    Y & Y & Y &  Y &  Y &   Y &  Y \\
 	\tco{smp_mb__before_atomic()} & CP &
 		     & Y & Y &   Y &      & a & a & a  & a  &   Y &    \\
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 10aa380..a6a33b6 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -522,7 +522,7 @@ The \co{*_acquire} row covers \co{smp_load_acquire()},
 \co{cmpxchg_acquire()}, \co{xchg_acquire()}, and so on;
 the \co{*_release} row covers \co{smp_store_release()},
 \co{cmpxchg_release()}, \co{xchg_release()}, and so on; and
-the ``Successful Non-Relaxed Non-\co{void} RMW'' row covers
+the ``Successful full-strength non-\co{void} RMW'' row covers
 \co{atomic_add_return()}, \co{atomic_add_unless()}, \co{atomic_dec_and_test()},
 \co{cmpxchg()}, \co{xchg()}, and so on.
 The ``Successful'' qualifiers apply to primitives such as
@@ -611,7 +611,7 @@ are at most two threads involved.
 	available on most platforms, with Itanium being the exception
 	that proves the rule.

-	The ``Successful Non-Relaxed Non-\co{void} RMW'' row captures
+	The ``Successful full-strength non-\co{void} RMW'' row captures
 	the fact that on some platforms (such as x86) atomic RMW instructions
 	provide full ordering both before and after.
 	The Linux kernel therefore requires that full-strength non-\co{void}
-- 
2.7.4

[PATCH 4/5] memorder: Update reference to memory-barrier primitives

[Akira Yokosawa]

From b08c836fef6b054125b74c77a2fddc3e53ade5bc Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 11:05:36 +0900
Subject: [PATCH 4/5] memorder: Update reference to memory-barrier primitives

This reference used to reside in appendix. Now it lives in
the same chapter and it should be made to a previous section.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index a6a33b6..596367d 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3899,7 +3899,7 @@ the compiler to eschew any optimizations that would have the effect
 of reordering memory optimizations across the barriers.
 The \co{smp_read_barrier_depends()} primitive has a similar effect, but
 only on Alpha CPUs.
-\IfInBook{See Chapter~\ref{chp:memorder:Memory Ordering} for
+\IfInBook{See Section~\ref{sec:memorder:Ordering: Why and How?} for
 more information on use of these primitives.}{}

 These primitives generate code only in SMP kernels, however, each
-- 
2.7.4

[PATCH v2 0/5] memorder: Miscellaneous fixes

[Akira Yokosawa]

From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 23:39:11 +0900
Subject: [PATCH v2 0/5] memorder: Miscellaneous fixes

Hi Paul,

(Sorry, I messed up 2/5 in v1. Retrying...)

This patch set consists of small fixes in memorder.

Patches #1, #2, and #3 are trivial fixes.

Patch #4 fixes a recursive reference within the chapter. I chose
Section 14.1, but there might be other choices.

Patch #5 might be a wrong guess on my side. I have not consulted
any document regarding PA-RISC arch or its CPU implementation.
Please apply it if it is the right guess.

       Thanks, Akira
--
Akira Yokosawa (5):
  memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c
  memorder: Fix usage of \IfInBook macro
  memorder: More reword to 'full-strength non-void RMW'
  memorder: Update reference to memory-barrier primitives
  memorder: Fix table of 'Summary of Memory Ordering'

 appendix/styleguide/styleguide.tex |  2 +-
 memorder/memorder.tex              | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

-- 
2.7.4

[PATCH v2 1/5] memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c

[Akira Yokosawa]

From 7eec5812868178d3845f11abbe36e90c1d0cc602 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Thu, 14 Sep 2017 23:51:34 +0900
Subject: [PATCH v2 1/5] memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 4194c42..9a66829 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3702,7 +3702,7 @@ dependencies.
 \begin{table*}
 \small
 \centering
-\renewcommand*{\arraystretch}{1.2}
+\renewcommand*{\arraystretch}{1.2}\OneColumnHSpace{-.6in}
 \begin{tabular}{l|p{2in}|c|c|c|c|c|c|c|c|c|c|c}
 	\multicolumn{2}{l|}{~}
 	& \begin{picture}(6,60)(0,0)
-- 
2.7.4

[PATCH v2 2/5] memorder: Fix usage of \IfInBook macro

[Akira Yokosawa]

From e6392e493a8aacedabf7fbbdb0499c3fb3343856 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Fri, 15 Sep 2017 00:13:09 +0900
Subject: [PATCH v2 2/5] memorder: Fix usage of \IfInBook macro

This macro requires two arguments, one is for "then" case,
the other is for "else" case.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 9a66829..10aa380 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3900,7 +3900,7 @@ of reordering memory optimizations across the barriers.
 The \co{smp_read_barrier_depends()} primitive has a similar effect, but
 only on Alpha CPUs.
 \IfInBook{See Chapter~\ref{chp:memorder:Memory Ordering} for
-more information on use of these primitives.}
+more information on use of these primitives.}{}

 These primitives generate code only in SMP kernels, however, each
 also has a UP version ({\tt mb()}, {\tt rmb()}, {\tt wmb()},
-- 
2.7.4

[PATCH v2 3/5] memorder: More reword to 'full-strength non-void RMW'

[Akira Yokosawa]

From eaf26d55d0e73058d9574a0966aaeb6292dc8729 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 11:00:34 +0900
Subject: [PATCH v2 3/5] memorder: More reword to 'full-strength non-void RMW'

Also update table in styleguide.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 appendix/styleguide/styleguide.tex | 2 +-
 memorder/memorder.tex              | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/appendix/styleguide/styleguide.tex b/appendix/styleguide/styleguide.tex
index 5fd3b4e..072da9e 100644
--- a/appendix/styleguide/styleguide.tex
+++ b/appendix/styleguide/styleguide.tex
@@ -1424,7 +1424,7 @@ using booktabs' ruled lines.
 		     &   & Y &   W &      &   & Y &    &  Y &   W &    \\
 	\tco{smp_mb()} & CP &
 		     & Y & Y &   Y &      & Y & Y &  Y &  Y &   Y &    \\
-	Successful Non-Relaxed Non-\tco{void} RMW & CP &
+	Successful full-strength non-\tco{void} RMW & CP &
 		   Y & Y & Y &   Y &    Y & Y & Y &  Y &  Y &   Y &  Y \\
 	\tco{smp_mb__before_atomic()} & CP &
 		     & Y & Y &   Y &      & a & a & a  & a  &   Y &    \\
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 10aa380..a6a33b6 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -522,7 +522,7 @@ The \co{*_acquire} row covers \co{smp_load_acquire()},
 \co{cmpxchg_acquire()}, \co{xchg_acquire()}, and so on;
 the \co{*_release} row covers \co{smp_store_release()},
 \co{cmpxchg_release()}, \co{xchg_release()}, and so on; and
-the ``Successful Non-Relaxed Non-\co{void} RMW'' row covers
+the ``Successful full-strength non-\co{void} RMW'' row covers
 \co{atomic_add_return()}, \co{atomic_add_unless()}, \co{atomic_dec_and_test()},
 \co{cmpxchg()}, \co{xchg()}, and so on.
 The ``Successful'' qualifiers apply to primitives such as
@@ -611,7 +611,7 @@ are at most two threads involved.
 	available on most platforms, with Itanium being the exception
 	that proves the rule.

-	The ``Successful Non-Relaxed Non-\co{void} RMW'' row captures
+	The ``Successful full-strength non-\co{void} RMW'' row captures
 	the fact that on some platforms (such as x86) atomic RMW instructions
 	provide full ordering both before and after.
 	The Linux kernel therefore requires that full-strength non-\co{void}
-- 
2.7.4

[PATCH v2 4/5] memorder: Update reference to memory-barrier primitives

[Akira Yokosawa]

From b08c836fef6b054125b74c77a2fddc3e53ade5bc Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 11:05:36 +0900
Subject: [PATCH v2 4/5] memorder: Update reference to memory-barrier primitives

This reference used to reside in appendix. Now it lives in
the same chapter and it should be made to a previous section.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index a6a33b6..596367d 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3899,7 +3899,7 @@ the compiler to eschew any optimizations that would have the effect
 of reordering memory optimizations across the barriers.
 The \co{smp_read_barrier_depends()} primitive has a similar effect, but
 only on Alpha CPUs.
-\IfInBook{See Chapter~\ref{chp:memorder:Memory Ordering} for
+\IfInBook{See Section~\ref{sec:memorder:Ordering: Why and How?} for
 more information on use of these primitives.}{}

 These primitives generate code only in SMP kernels, however, each
-- 
2.7.4

[PATCH v2 5/5] memorder: Fix table of 'Summary of Memory Ordering'

[Akira Yokosawa]

From d4c4e843d7810ad589f256868aafb3cb06147a80 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 16 Sep 2017 23:34:05 +0900
Subject: [PATCH v2 5/5] memorder: Fix table of 'Summary of Memory Ordering'

"PA-RISC CPUs" column should be stricter than "(PA-RISC)" column.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 memorder/memorder.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index 596367d..ae9ad7f 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -3762,7 +3762,7 @@ dependencies.
 		 & ~   & ~   & ~   & ~     & ~  & ~     & ~   & ~ & ~   & ~ & ~ \\
 	\cline{2-13}
 	& Non-Sequencially Consistent?
-		 & Y   & Y   & Y   & Y     & Y  & ~     & Y   & Y & Y   & Y & Y \\
+		 & Y   & Y   & Y   & Y     & Y  & Y     & ~   & Y & Y   & Y & Y \\
 	\cline{2-13}
 	& Non-Multicopy Atomic?
 		 & Y   & Y   & Y   & Y     & Y  & Y     & ~   & Y & Y   & Y & ~ \\
-- 
2.7.4

Re: [PATCH v2 0/5] memorder: Miscellaneous fixes

[Paul E. McKenney]

On Sun, Sep 17, 2017 at 12:06:02AM +0900, Akira Yokosawa wrote:
> From: Akira Yokosawa <akiyks@gmail.com>
> Date: Sat, 16 Sep 2017 23:39:11 +0900
> Subject: [PATCH v2 0/5] memorder: Miscellaneous fixes
> 
> Hi Paul,
> 
> (Sorry, I messed up 2/5 in v1. Retrying...)
> 
> This patch set consists of small fixes in memorder.
> 
> Patches #1, #2, and #3 are trivial fixes.
> 
> Patch #4 fixes a recursive reference within the chapter. I chose
> Section 14.1, but there might be other choices.

I removed the reference with your Reported-by, as it was a holdover
from my moving that section from the appendix.  I also fixed a typo in
the table.

> Patch #5 might be a wrong guess on my side. I have not consulted
> any document regarding PA-RISC arch or its CPU implementation.
> Please apply it if it is the right guess.

All the others look good, including #5, thank you!!!

							Thanx, Paul

>        Thanks, Akira
> --
> Akira Yokosawa (5):
>   memorder: Adjust hspace of table 'Summary of Memory Ordering' in 1c
>   memorder: Fix usage of \IfInBook macro
>   memorder: More reword to 'full-strength non-void RMW'
>   memorder: Update reference to memory-barrier primitives
>   memorder: Fix table of 'Summary of Memory Ordering'
> 
>  appendix/styleguide/styleguide.tex |  2 +-
>  memorder/memorder.tex              | 12 ++++++------
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> -- 
> 2.7.4
> 
> 
>