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Ruhl" cc: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, Hans de Goede , matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com, karthik.poosa@intel.com Subject: Re: [PATCH v9 09/20] drm/xe/vsec: Add DOC text for VSEC In-Reply-To: <20260916201139.2374531-31-michael.j.ruhl@intel.com> Message-ID: <054c50bc-7fc7-c5f1-e650-5233048b9188@linux.intel.com> References: <20260916201139.2374531-22-michael.j.ruhl@intel.com> <20260916201139.2374531-31-michael.j.ruhl@intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 16 Sep 2026, Michael J. Ruhl wrote: > Add the necessary files and text to use the DOC system. > > Reviewed-by: Rodrigo Vivi > Signed-off-by: Michael J. Ruhl > --- > Documentation/gpu/xe/index.rst | 1 + > Documentation/gpu/xe/xe_vsec.rst | 14 ++++++++++++++ > drivers/gpu/drm/xe/xe_vsec.c | 23 +++++++++++++++++++++++ > 3 files changed, 38 insertions(+) > create mode 100644 Documentation/gpu/xe/xe_vsec.rst > > diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst > index 0247a255f7e6..89f013418cf5 100644 > --- a/Documentation/gpu/xe/index.rst > +++ b/Documentation/gpu/xe/index.rst > @@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by > xe_configfs > xe_gt_stats > xe_sigid > + xe_vsec > diff --git a/Documentation/gpu/xe/xe_vsec.rst b/Documentation/gpu/xe/xe_vsec.rst > new file mode 100644 > index 000000000000..1a87548489ea > --- /dev/null > +++ b/Documentation/gpu/xe/xe_vsec.rst > @@ -0,0 +1,14 @@ > +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT) > + > +===== > +VSEC > +===== > + > +.. kernel-doc:: drivers/gpu/drm/xe/xe_vsec.c > + :doc: VSEC > + > +Internal API > +============ > + > +.. kernel-doc:: drivers/gpu/drm/xe/xe_vsec.c > + :internal: > diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c > index 1cb9a78ee0ef..ca5d02dce818 100644 > --- a/drivers/gpu/drm/xe/xe_vsec.c > +++ b/drivers/gpu/drm/xe/xe_vsec.c > @@ -19,6 +19,17 @@ > > #include "regs/xe_pmt.h" > > +/** > + * DOC: VSEC > + * > + * Some GPUs support the PMT feature. For those that do, this API provides > + * probe, discovery and usage (control and access) for GPUs that have PMT. > + * > + * PMT is usually accessed through a PCI function. However, that is not always > + * available, so the PMT intel_vsec_register() function can be used to setup up > + * PMT usage. > + */ > + > /* PMT GUID value for BMG devices. NOTE: this is NOT a PCI id */ > #define BMG_DEVICE_ID 0xE2F8 > > @@ -140,6 +151,18 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset) > return 0; > } > > +/** > + * xe_pmt_telem_read - Given a device and a PMT GUID, read data into a buffer > + * @dev: valid Xe device > + * @guid: PMT GUID (from the PMT discovery struct) > + * @data: buffer to place data in > + * @user_offset: a user offset relative to the beginning of the data to read > + * @count: bytes to read > + * > + * Return: > + * * -EINVAL for VF and PMT WATCHER requests > + * * count number of bytes read on success Please also check sashiko's comment on the set of return values. -- i.