From: Alan Cox <alan@linux.intel.com>
To: platform-driver-x86@vger.kernel.org, mjg@redhat.com
Subject: [PATCH 08/11] Clean up command packing on MRST.
Date: Mon, 26 Jul 2010 10:05:03 +0100 [thread overview]
Message-ID: <20100726090444.12329.24098.stgit@localhost.localdomain> (raw)
In-Reply-To: <20100726090031.12329.53555.stgit@localhost.localdomain>
From: Andy Ross <andy.ross@windriver.com>
Don't pass more bytes in the command length field than we filled.
Signed-off-by: Andy Ross <andy.ross@windriver.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/platform/x86/intel_scu_ipc.c | 29 +++++++++++------------------
1 files changed, 11 insertions(+), 18 deletions(-)
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index b903420..5055c52 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -154,7 +154,7 @@ static inline int busy_loop(void) /* Wait till scu status is busy */
/* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */
static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
{
- int nc;
+ int i, nc, bytes;
u32 offset = 0;
u32 err = 0;
u8 cbuf[IPC_WWBUF_SIZE] = { };
@@ -170,25 +170,18 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
}
if (platform != MRST_CPU_CHIP_PENWELL) {
- /* Entry is 4 bytes for read/write, 5 bytes for read modify */
- for (nc = 0; nc < count; nc++, offset += 3) {
- cbuf[offset] = addr[nc];
- cbuf[offset + 1] = addr[nc] >> 8;
+ bytes = 0;
+ for(i=0; i<count; i++) {
+ cbuf[bytes++] = addr[i];
+ cbuf[bytes++] = addr[i] >> 8;
if (id != IPC_CMD_PCNTRL_R)
- cbuf[offset + 2] = data[nc];
- if (id == IPC_CMD_PCNTRL_M) {
- cbuf[offset + 3] = data[nc + 1];
- offset += 1;
- }
+ cbuf[bytes++] = data[i];
+ if (id == IPC_CMD_PCNTRL_M)
+ cbuf[bytes++] = data[i + 1];
}
- for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
- ipc_data_writel(wbuf[nc], offset); /* Write wbuff */
-
- if (id != IPC_CMD_PCNTRL_M)
- ipc_command((count*4) << 16 | id << 12 | 0 << 8 | op);
- else
- ipc_command((count*5) << 16 | id << 12 | 0 << 8 | op);
-
+ for(i=0; i<bytes; i+=4)
+ ipc_data_writel(wbuf[i/4], i);
+ ipc_command(bytes << 16 | id << 12 | 0 << 8 | op);
} else {
for (nc = 0; nc < count; nc++, offset += 2) {
cbuf[offset] = addr[nc];
next prev parent reply other threads:[~2010-07-26 9:38 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-26 9:02 [PATCH 00/11] Series short description Alan Cox
2010-07-26 9:02 ` [PATCH 01/11] intel_scu_ipc: detect CPU type automatically Alan Cox
2010-07-26 9:02 ` [PATCH 02/11] intel_scu_ipc: Support Medfield processors Alan Cox
2010-07-26 9:03 ` [PATCH 03/11] Remove indirect read write api support Alan Cox
2010-07-26 9:03 ` [PATCH 04/11] intel_scu_ipc: tidy up unused bits Alan Cox
2010-07-26 9:03 ` [PATCH 05/11] intel_scu_ipc: Use the new cpu identification function Alan Cox
2010-07-26 9:04 ` [PATCH 06/11] Fix stack buffer size for IPC writev messages Alan Cox
2010-07-26 9:04 ` [PATCH 07/11] zero the stack buffer before giving random garbage to the SCU Alan Cox
2010-07-26 9:05 ` Alan Cox [this message]
2010-07-26 9:05 ` [PATCH 09/11] intel_scu_ipc: fix data packing of PMIC command on Moorestown Alan Cox
2010-07-26 9:06 ` [PATCH 10/11] intel_scu_ipc: return -EIO for error condition in busy_loop Alan Cox
2010-07-26 9:06 ` [PATCH 11/11] intel_scu_ipc: fix size field for intel_scu_ipc_command Alan Cox
2010-08-03 13:50 ` [PATCH 00/11] Series short description Matthew Garrett
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