From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Subject: Re: [PATCH v15 11/23] x86/sgx: Add definitions for SGX's CPUID leaf
 and variable sub-leafs
Date: Mon, 5 Nov 2018 16:35:46 +0200
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To: Andy Shevchenko <andy.shevchenko@gmail.com>
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On Sat, Nov 03, 2018 at 03:11:39PM +0200, Andy Shevchenko wrote:
> On Sat, Nov 3, 2018 at 1:16 AM Jarkko Sakkinen
> <jarkko.sakkinen@linux.intel.com> wrote:
> >
> > SGX defines its own CPUID leaf, 0x12, along with a variable number of
> > sub-leafs.  Sub-leafs 0 and 1 are always available if SGX is supported
> > and enumerate various SGX features, e.g. instruction sets and enclave
> > capabilities.  Sub-leafs 2+ are variable, both in their existence and
> > in what they enumerate.  Bits 3:0 of EAX report the sub-leaf type,
> > with the remaining bits in EAX, EBX, ECX and EDX being type-specific.
> > Currently, the only known sub-leaf type enumerates an EPC section.  An
> > EPC section is simply a range of EPC memory available to software.
> > The "list" of varaible SGX sub-leafs is NULL-terminated, i.e. software
> > is expected to query CPUID until an invalid sub-leaf is encountered.
> 
> > +       SGX_CPUID_SUB_LEAF_TYPE_MASK    = 0xF,
> 
> GENMASK() if it suits here?
> 
> P.S. Btw, BIT() and GENMASK() macros are now in a separate header,
> i.e. linux/bits.h, perhaps you might need to revisit code to include
> it explicitly

Agreed. I would also think that is should be renamed simply as
SGX_CPUID_SUBLEAF_MASK.

/Jarkko