From mboxrd@z Thu Jan 1 00:00:00 1970 From: Logan Gunthorpe Subject: [PATCH v4 7/7] mm/memremap: Set caching mode for PCI P2PDMA memory to WC Date: Fri, 6 Mar 2020 10:08:46 -0700 Message-ID: <20200306170846.9333-8-logang@deltatee.com> References: <20200306170846.9333-1-logang@deltatee.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20200306170846.9333-1-logang@deltatee.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane-mx.org@lists.infradead.org To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-mm@kvack.org, Dan Williams , Michal Hocko , David Hildenbrand , Andrew Morton Cc: Eric Badger , Peter Zijlstra , Catalin Marinas , Dave Hansen , Jason Gunthorpe , Logan Gunthorpe , Ingo Molnar , Borislav Petkov , Andy Lutomirski , Benjamin Herrenschmidt , Thomas Gleixner , Will Deacon , Christoph Hellwig List-Id: platform-driver-x86.vger.kernel.org PCI BAR IO memory should never be mapped as WB, however prior to this the PAT bits were set WB and it was typically overridden by MTRR registers set by the firmware. Set PCI P2PDMA memory to be UC as this is what it currently, typically, ends up being mapped as on x86 after the MTRR registers override the cache setting. Future use-cases may need to generalize this by adding flags to select the caching type, as some P2PDMA cases may not want UC. However, those use-cases are not upstream yet and this can be changed when they arrive. Cc: Christoph Hellwig Cc: Jason Gunthorpe Signed-off-by: Logan Gunthorpe Reviewed-by: Dan Williams --- mm/memremap.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/memremap.c b/mm/memremap.c index 06742372a203..9033ae401448 100644 --- a/mm/memremap.c +++ b/mm/memremap.c @@ -190,7 +190,10 @@ void *memremap_pages(struct dev_pagemap *pgmap, int nid) } break; case MEMORY_DEVICE_DEVDAX: + need_devmap_managed = false; + break; case MEMORY_DEVICE_PCI_P2PDMA: + params.pgprot = pgprot_noncached(params.pgprot); need_devmap_managed = false; break; default: -- 2.20.1