X86 platform drivers
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From: Suma Hegde <suma.hegde@amd.com>
To: <platform-driver-x86@vger.kernel.org>
Cc: <hdegoede@redhat.com>, <ilpo.jarvinen@linux.intel.com>,
	Suma Hegde <suma.hegde@amd.com>,
	Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Subject: [PATCH] platform/x86: Non-ACPI support for AMD F1A~M0Fh
Date: Tue, 12 Dec 2023 10:36:44 +0000	[thread overview]
Message-ID: <20231212103644.768460-8-suma.hegde@amd.com> (raw)
In-Reply-To: <20231212103644.768460-1-suma.hegde@amd.com>

AMD EPYC family 0x1A and Model 0x0-0xF are having different
mailbox message ID offset compared to previous
platforms. In case of ACPI based BIOS, this information will be read
from ACPI table, for non ACPI BIOS, this needs to be #defined.

Signed-off-by: Suma Hegde <suma.hegde@amd.com>
Co-developed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
---
 drivers/platform/x86/amd/hsmp.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/platform/x86/amd/hsmp.c b/drivers/platform/x86/amd/hsmp.c
index 82bd4189cbd3..2c256a7f50b3 100644
--- a/drivers/platform/x86/amd/hsmp.c
+++ b/drivers/platform/x86/amd/hsmp.c
@@ -44,6 +44,7 @@
  */
 #define SMN_HSMP_BASE		0x3B00000
 #define SMN_HSMP_MSG_ID		0x0010534
+#define SMN_HSMP_MSG_ID_F1A_M0H	0x0010934
 #define SMN_HSMP_MSG_RESP	0x0010980
 #define SMN_HSMP_MSG_DATA	0x00109E0
 
@@ -700,6 +701,15 @@ static int hsmp_cache_proto_ver(u16 sock_ind)
 	return ret;
 }
 
+static inline bool is_f1a_m0h(void)
+{
+	if (boot_cpu_data.x86 == 0x1A &&
+	    (boot_cpu_data.x86_model >= 0x00 && boot_cpu_data.x86_model <= 0x0F))
+		return true;
+
+	return false;
+}
+
 static int initialize_platdev(struct device *dev)
 {
 	int i;
@@ -711,7 +721,16 @@ static int initialize_platdev(struct device *dev)
 		plat_dev.sock[i].sock_ind		= i;
 		plat_dev.sock[i].dev			= dev;
 		plat_dev.sock[i].mbinfo.base_addr	= SMN_HSMP_BASE;
-		plat_dev.sock[i].mbinfo.msg_id_off	= SMN_HSMP_MSG_ID;
+
+		/*
+		 * This is a tranisitional change from non ACPI to ACPI, only
+		 * family 0x1A, model 0x00 platform is supported for both ACPI and non ACPI.
+		 */
+		if (is_f1a_m0h())
+			plat_dev.sock[i].mbinfo.msg_id_off	= SMN_HSMP_MSG_ID_F1A_M0H;
+		else
+			plat_dev.sock[i].mbinfo.msg_id_off      = SMN_HSMP_MSG_ID;
+
 		plat_dev.sock[i].mbinfo.msg_resp_off    = SMN_HSMP_MSG_RESP;
 		plat_dev.sock[i].mbinfo.msg_arg_off     = SMN_HSMP_MSG_DATA;
 		sema_init(&plat_dev.sock[i].hsmp_sem, 1);
-- 
2.25.1


  parent reply	other threads:[~2023-12-12 10:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-12 10:36 [PATCH 0/7] platform/x86: Add ACPI probing support for HSMP Suma Hegde
2023-12-12 10:36 ` [PATCH 1/7] platform/x86: Move hsmp_test to probe Suma Hegde
2023-12-18 12:32   ` Hans de Goede
2023-12-12 10:36 ` [PATCH 2/7] platform/x86: Cache pci_dev in struct hsmp_socket Suma Hegde
2023-12-18 12:34   ` Hans de Goede
2023-12-12 10:36 ` [PATCH 3/7] platform/x86: Create static func to handle platdev Suma Hegde
2023-12-18 13:29   ` Hans de Goede
2023-12-12 10:36 ` [PATCH 4/7] platform/x86: Define a struct to hold mailbox regs Suma Hegde
2023-12-18 13:32   ` Hans de Goede
2023-12-12 10:36 ` [PATCH 5/7] platform/x86: Move dev from platdev to hsmp_socket Suma Hegde
2023-12-18 13:34   ` Hans de Goede
2023-12-12 10:36 ` [PATCH 6/7] platform/x86: Convert to ACPI based probing Suma Hegde
2023-12-18 13:54   ` Hans de Goede
2023-12-12 10:36 ` Suma Hegde [this message]
2023-12-18 13:55   ` [PATCH] platform/x86: Non-ACPI support for AMD F1A~M0Fh Hans de Goede

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