From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-dl1-f51.google.com (mail-dl1-f51.google.com [74.125.82.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7138372662 for ; Wed, 20 May 2026 06:07:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.82.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779257269; cv=none; b=hiUtHpdpjPnrDGhHQtouAdhi5DZBHJ8+IrrAlsn/QHGsSRpXDchMxefk8stqPudj8P1aO8lVgZHRUd8euT1c/JSheopq0450btOAxHCUHIS0iYXQ4kSuQ873FUH6YHf9/knB+ACk2cI7zX0GOKomBQeglKq1HBQjtTRBtqzDJ8w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779257269; c=relaxed/simple; bh=+vYi9Orjk1zvxoyh4C8l6PMWgK25P4gVT8jIhytANdw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=deh6v4fpbBrp+i3N+RhUrvCY9KbLmonK0+zl7dq6LXn1a7Q5HsrYmbp+VL1hiIjwdLoQfFFZROnF1sVLypL8Et5w9avnD6BoOjcPMf7c0KblkZTQXqoTUiOsGsB2Do1C7xG/u5JReovquR6GPz6zbLhz/HRNl6g9ypcwT579VqY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=sYIR1UA1; arc=none smtp.client-ip=74.125.82.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="sYIR1UA1" Received: by mail-dl1-f51.google.com with SMTP id a92af1059eb24-1353c2f35cfso14673692c88.1 for ; Tue, 19 May 2026 23:07:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779257267; x=1779862067; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8X36h0NgcF0aKUOU3c48+jC+jUVz0rrsqnrUzQjuSSY=; b=sYIR1UA19HqGY2Z94WdiN7rtZFFGGF3lChMCln2nEVyQh8qtowbp+jvYI2UXyYhS2+ lrMPUZFM4TRVu8PSCCGlCRghwEBoRu+KQKnCHePN/nBxBdaELvDvU8jhD0yn+rQ3sGF9 +ODPsf7ZmtSw1OKVrKTVbZYj43SXR4G8BzfNRZE+uKTJKVTH/aKhZn5cvf1P9zK611pV /8x9sYQxiL4fKyKVZspa7MONGo1DMFUQQzt4srzHdgseo1dkGoky9QThIC8L0hqe0UCv RZQ0qDo2d/cG11XWXH/5pXHse0wuEGm8BfLGR7CL+1Hw8p/+dutHrHJSQXRfpx3xMBT4 lQGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779257267; x=1779862067; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=8X36h0NgcF0aKUOU3c48+jC+jUVz0rrsqnrUzQjuSSY=; b=FYmsQ8v7GMj+hXpiViB7fsXFaU3/fVJM9PIinW2R1Hl57b9nSgQZfeswzuPQK8mmLM egP8brkkTS+f3O4JiUgEVFnhl2mdznDg1avtyrHbJxcEyTyNtbV3unuchUYFtNQHuDKT ECbERNInW2pETiiUSm2tpdcoDzOzn2Wnbhyzu9L8gggPvm5n/g1MllmaO+Q/4tlkBhs4 wos21GYPw17DS0HLu7A/vY28EziRjAXfAVn4ZsafEHmjPBJmKLVSsZIm2Ebo0Wmpc9sv cVrqJ8bcknXQXWvF6XrMdlKPFZEla/68EjwJNlHZ/ufnooYe1BrIiUoOgiT1QgNL11Ez rh0g== X-Forwarded-Encrypted: i=1; AFNElJ86MyoLcHTWRTgAztDbXTVeh+v382gQN7mzqQfvzFCPpgX/ZY5aW+f7F3R05QZZywpstwL9bo1L2BX49BtxlPJbxpqO@vger.kernel.org X-Gm-Message-State: AOJu0YyWk5KRWAYj6O4keEUKdZ8gio4tfjXzHn2Cg9p4FB8wEVnL3cQj dV7CEN/mzHlRIff0u2EcwQvIGlzP5v+NFkOocVxM/pTGmkrsGDaW7HLh X-Gm-Gg: Acq92OGx+Nvzn6k0LgoMhltlVujQlKOPqa+kOjlH2u5YgFc5aOSPRR3ILLPXpWtyjSF oVtqLSL0YiHeLRKk9s1osnL+CvDwsePdG7c2q00FHT7V3TAZ9Jn2iF3d9d5ObEe+/khDH6Rd0Mu qd1IMZ/BYBi/dZLsDf0IsS6auKj6PUEAeoUCYHtjPK8DAhb7OgOYHFg0zHrKtHEbVvEEVqtV+jL vrtguQG6UorsmjfRaI//FVJvrkFkcU7CbT8CalY80c1RetZyEnZwm1v7wyy1N/k9aDGfbsVb01e +xqiwx/+9IgU+wy4AKPIa5Ad0aES+iEZIafXRz+i1JGFg6uL1hiwoaQuj4tCwCjDI91LCWGNWFC eM3aIRehgp4Jdo7Zw2lgr6y19RpUzHmjRHeedGVRzPMJgsd/S+QAvBnitQxu3R00Nf+XahAeXzK P7ndjbdancCwSU4THnMsJlWuoE351FPh8pRKfbMzGxgu7vqfWicnEBHsr4p52Uj2aQvJ/X33xl5 bWgDKnvhhZJy4k= X-Received: by 2002:a05:7022:699b:b0:132:d182:3dd6 with SMTP id a92af1059eb24-13504515a28mr11108942c88.16.1779257266792; Tue, 19 May 2026 23:07:46 -0700 (PDT) Received: from lappy (108-228-232-20.lightspeed.sndgca.sbcglobal.net. [108.228.232.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-134cc2351c3sm27906026c88.11.2026.05.19.23.07.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2026 23:07:46 -0700 (PDT) From: "Derek J. Clark" To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Hans de Goede Cc: Mark Pearson , Armin Wolf , Jonathan Corbet , Rong Zhang , Kurt Borja , "Derek J . Clark" , "Pierre-Loup A . Griffais" , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , marshall@shzj.cc, hyacinth@shzj.cc, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v14 2/7] platform/x86: lenovo-wmi-other: Add GPU tunable attributes Date: Wed, 20 May 2026 06:07:35 +0000 Message-ID: <20260520060740.119554-3-derekjohn.clark@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260520060740.119554-1-derekjohn.clark@gmail.com> References: <20260520060740.119554-1-derekjohn.clark@gmail.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Use an enum for all GPU attribute feature ID's and add GPU attributes. Reviewed-by: Rong Zhang Reviewed-by: Mark Pearson Signed-off-by: Derek J. Clark --- v9: - Rename gpu_didvid -> dgpu_didvid in documentation to match actual attribute name. v7: - Fix typo in dgpu_boost_clk attribute string. v4: - Align CPU feature enum values. - Remove gpu_oc_stat from Documentation. v3: - Remove gpu_oc_stat. --- .../wmi/devices/lenovo-wmi-other.rst | 10 ++ drivers/platform/x86/lenovo/wmi-capdata.h | 1 + drivers/platform/x86/lenovo/wmi-other.c | 105 ++++++++++++++++++ 3 files changed, 116 insertions(+) diff --git a/Documentation/wmi/devices/lenovo-wmi-other.rst b/Documentation/wmi/devices/lenovo-wmi-other.rst index 189dd4d31926d..011054d64eac5 100644 --- a/Documentation/wmi/devices/lenovo-wmi-other.rst +++ b/Documentation/wmi/devices/lenovo-wmi-other.rst @@ -69,6 +69,16 @@ Each attribute has the following properties: The following firmware-attributes are implemented: - cpu_temp: CPU Thermal Load Limit + - dgpu_boost_clk: Dedicated GPU Boost Clock + - dgpu_didvid: Dedicated GPU Device Identifier and Vendor Identifier + - dgpu_enable: Dedicated GPU Enabled Status + - gpu_mode: GPU Mode by Power Limit + - gpu_nv_ac_offset: Nvidia GPU AC Total Processing Power Baseline Offset + - gpu_nv_bpl: Nvidia GPU Base Power Limit + - gpu_nv_cpu_boost: Nvidia GPU to CPU Dynamic Boost Limit + - gpu_nv_ctgp: Nvidia GPU Configurable Total Graphics Power + - gpu_nv_ppab: Nvidia GPU Power Performance Aware Boost Limit + - gpu_temp: GPU Thermal Load Limit - ppt_cpu_cl: CPU Cross Loading Power Limit - ppt_pl1_apu_spl: Platform Profile Tracking APU Sustained Power Limit - ppt_pl1_spl: Platform Profile Tracking Sustained Power Limit diff --git a/drivers/platform/x86/lenovo/wmi-capdata.h b/drivers/platform/x86/lenovo/wmi-capdata.h index c74a0e5294e78..a7cfdeaa58f77 100644 --- a/drivers/platform/x86/lenovo/wmi-capdata.h +++ b/drivers/platform/x86/lenovo/wmi-capdata.h @@ -20,6 +20,7 @@ enum lwmi_device_id { LWMI_DEVICE_ID_CPU = 0x01, + LWMI_DEVICE_ID_GPU = 0x02, LWMI_DEVICE_ID_FAN = 0x04, }; diff --git a/drivers/platform/x86/lenovo/wmi-other.c b/drivers/platform/x86/lenovo/wmi-other.c index fe4cd7da017eb..9a6183bbcc920 100644 --- a/drivers/platform/x86/lenovo/wmi-other.c +++ b/drivers/platform/x86/lenovo/wmi-other.c @@ -62,6 +62,19 @@ enum lwmi_feature_id_cpu { LWMI_FEATURE_ID_CPU_IPL = 0x09, }; +enum lwmi_feature_id_gpu { + LWMI_FEATURE_ID_GPU_NV_PPAB = 0x01, + LWMI_FEATURE_ID_GPU_NV_CTGP = 0x02, + LWMI_FEATURE_ID_GPU_TEMP = 0x03, + LWMI_FEATURE_ID_GPU_AC_OFFSET = 0x04, + LWMI_FEATURE_ID_DGPU_BOOST_CLK = 0x06, + LWMI_FEATURE_ID_DGPU_EN = 0x07, + LWMI_FEATURE_ID_GPU_MODE = 0x08, + LWMI_FEATURE_ID_DGPU_DIDVID = 0x09, + LWMI_FEATURE_ID_GPU_NV_BPL = 0x0a, + LWMI_FEATURE_ID_GPU_NV_CPU_BOOST = 0x0b, +}; + #define LWMI_FEATURE_ID_FAN_RPM 0x03 #define LWMI_TYPE_ID_CROSSLOAD 0x01 @@ -639,6 +652,66 @@ static struct tunable_attr_01 ppt_pl4_ipl_cl = { .type_id = LWMI_TYPE_ID_CROSSLOAD, }; +static struct tunable_attr_01 gpu_nv_ppab = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_NV_PPAB, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_nv_ctgp = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_NV_CTGP, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_temp = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_TEMP, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_nv_ac_offset = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_AC_OFFSET, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 dgpu_boost_clk = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_DGPU_BOOST_CLK, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 dgpu_enable = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_DGPU_EN, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_mode = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_MODE, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 dgpu_didvid = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_DGPU_DIDVID, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_nv_bpl = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_NV_BPL, + .type_id = LWMI_TYPE_ID_NONE, +}; + +static struct tunable_attr_01 gpu_nv_cpu_boost = { + .device_id = LWMI_DEVICE_ID_GPU, + .feature_id = LWMI_FEATURE_ID_GPU_NV_CPU_BOOST, + .type_id = LWMI_TYPE_ID_NONE, +}; + struct capdata01_attr_group { const struct attribute_group *attr_group; struct tunable_attr_01 *tunable_attr; @@ -974,6 +1047,7 @@ static bool lwmi_attr_01_is_supported(struct tunable_attr_01 *tunable_attr) .name = _fsname, .attrs = _attrname##_attrs \ } +/* CPU tunable attributes */ LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp", "Set the CPU thermal load limit"); LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl", @@ -999,9 +1073,40 @@ LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl, "ppt_pl4_ipl", LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl", "Set the CPU cross loading instantaneous power limit"); +/* GPU tunable attributes */ +LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_boost_clk, "dgpu_boost_clk", + "Set the dedicated GPU boost clock"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_didvid, "dgpu_didvid", + "Get the GPU device identifier and vendor identifier"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(dgpu_enable, "dgpu_enable", + "Set the dedicated Nvidia GPU enabled status"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_mode, "gpu_mode", + "Set the GPU mode by power limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ac_offset, "gpu_nv_ac_offset", + "Set the Nvidia GPU AC total processing power baseline offset"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_bpl, "gpu_nv_bpl", + "Set the Nvidia GPU base power limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_cpu_boost, "gpu_nv_cpu_boost", + "Set the Nvidia GPU to CPU dynamic boost limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ctgp, "gpu_nv_ctgp", + "Set the GPU configurable total graphics power"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_nv_ppab, "gpu_nv_ppab", + "Set the Nvidia GPU power performance aware boost limit"); +LWMI_ATTR_GROUP_TUNABLE_CAP01(gpu_temp, "gpu_temp", + "Set the GPU thermal load limit"); static struct capdata01_attr_group cd01_attr_groups[] = { { &cpu_temp_attr_group, &cpu_temp }, + { &dgpu_boost_clk_attr_group, &dgpu_boost_clk }, + { &dgpu_didvid_attr_group, &dgpu_didvid }, + { &dgpu_enable_attr_group, &dgpu_enable }, + { &gpu_mode_attr_group, &gpu_mode }, + { &gpu_nv_ac_offset_attr_group, &gpu_nv_ac_offset }, + { &gpu_nv_bpl_attr_group, &gpu_nv_bpl }, + { &gpu_nv_cpu_boost_attr_group, &gpu_nv_cpu_boost }, + { &gpu_nv_ctgp_attr_group, &gpu_nv_ctgp }, + { &gpu_nv_ppab_attr_group, &gpu_nv_ppab }, + { &gpu_temp_attr_group, &gpu_temp }, { &ppt_cpu_cl_attr_group, &ppt_cpu_cl }, { &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl }, { &ppt_pl1_spl_attr_group, &ppt_pl1_spl }, -- 2.53.0