From: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
To: platform-driver-x86@vger.kernel.org,
intel-xe@lists.freedesktop.org, hansg@kernel.org,
ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com,
rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com,
airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com,
anoop.c.vijay@intel.com, badal.nilawar@intel.com,
matthew.d.roper@intel.com, james.ausmus@intel.com,
karthik.poosa@intel.com
Subject: [PATCH v4 13/18] drm/xe/vsec: Crescent Island PMT decode
Date: Tue, 1 Sep 2026 12:27:48 -0700 [thread overview]
Message-ID: <20260901192736.626777-33-michael.j.ruhl@intel.com> (raw)
In-Reply-To: <20260901192736.626777-20-michael.j.ruhl@intel.com>
Crescent Island (CRI) has different index and offset values for
accessing the PMT data area.
Update the decode path to support the CRI device.
Update the data read callback so to support the CRI usage.
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
drivers/gpu/drm/xe/xe_vsec.c | 98 ++++++++++++++++++++++++++++++++----
1 file changed, 89 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
index c109fc2d13b9..d95f4343c78d 100644
--- a/drivers/gpu/drm/xe/xe_vsec.c
+++ b/drivers/gpu/drm/xe/xe_vsec.c
@@ -109,19 +109,25 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
/*
* The GUID will have the following bits to decode:
* [0:3] - {Telemetry space iteration number (0,1,..)}
- * [4:7] - Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ * [4:7] - BMG Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ * [4:5] - CRI Segment (SEGMENT_INDEPENDENT-0, Client-1, Server-2)
+ * [6:7] - CRI Instance
* [8:11] - SOC_SKU
* [12:27] – Device ID – changes for each down bin SKU’s
* [28:29] - Capability Type (Crashlog-0, Telemetry Aggregator-1, Watcher-2)
* [30:31] - Record-ID (0-PUNIT, 1-OOBMSM_0, 2-OOBMSM_1)
*/
#define GUID_TELEM_ITERATION GENMASK(3, 0)
-#define GUID_SEGMENT GENMASK(7, 4)
#define GUID_SOC_SKU GENMASK(11, 8)
#define GUID_DEVICE_ID GENMASK(27, 12)
#define GUID_CAP_TYPE GENMASK(29, 28)
#define GUID_RECORD_ID GENMASK(31, 30)
+#define BMG_GUID_SEGMENT GENMASK(7, 4)
+
+#define CRI_GUID_SEGMENT GENMASK(5, 4)
+#define CRI_GUID_INSTANCE GENMASK(7, 6)
+
#define BMG_IDX_TELEM_PUNIT 0x00
#define BMG_IDX_TELEM_OOBMSM 0x01
#define BMG_IDX_CRASHLOG_PUNIT 0x02
@@ -132,6 +138,18 @@ static struct intel_vsec_platform_info xe_vsec_info[] = {
#define BMG_OOBMSM_0_WATCHER_OFFSET 0x18D8
#define BMG_OOBMSM_1_TELEMETRY_OFFSET 0x1000
+#define CRI_IDX_TELEM_DISCOVERY 0x00
+#define CRI_IDX_TELEM_PUNIT 0x01
+#define CRI_IDX_TELEM_OOBMSM 0x02
+#define CRI_IDX_CRASHLOG_PUNIT 0x03
+#define CRI_IDX_WATCHER_OOBMSM 0x03 /* PUNIT and OOBMSM share this index */
+#define CRI_IDX_CRASHLOG_OOBMSM 0x04
+
+#define CRI_PUNIT_WATCHER_OFFSET 0x08A0
+#define CRI_OOBMSM_WATCHER_OFFSET 0x0CF8
+#define CRI_OOBMSM_GFSP_TELEMETRY_OFFSET 0x1600
+#define CRI_PUNIT_CRASHLOG_OFFSET 0x0E78
+
enum record_id {
PUNIT,
OOBMSM_0,
@@ -148,13 +166,6 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
{
u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
- u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
-
- if (device_id != BMG_DEVICE_ID)
- return -ENODEV;
-
- if (cap_type > WATCHER)
- return -EINVAL;
*offset = 0;
@@ -190,6 +201,75 @@ static int xe_guid_decode(u32 guid, int *index, u32 *offset)
return 0;
}
+static int cri_guid_decode(u32 guid, int *index, u32 *offset)
+{
+ u32 record_id = FIELD_GET(GUID_RECORD_ID, guid);
+ u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
+ u32 instance = FIELD_GET(CRI_GUID_INSTANCE, guid);
+
+ *offset = 0;
+
+ if (cap_type == CRASHLOG) {
+ if (record_id == PUNIT) {
+ *index = CRI_IDX_CRASHLOG_PUNIT;
+ *offset = CRI_PUNIT_CRASHLOG_OFFSET;
+ } else {
+ *index = CRI_IDX_CRASHLOG_OOBMSM;
+ }
+ return 0;
+ }
+
+ switch (record_id) {
+ case PUNIT:
+ *index = CRI_IDX_TELEM_PUNIT;
+ if (cap_type == WATCHER)
+ *offset = CRI_PUNIT_WATCHER_OFFSET;
+ break;
+
+ case OOBMSM_0:
+ *index = CRI_IDX_TELEM_OOBMSM;
+ switch (instance) {
+ case 0:
+ if (cap_type == WATCHER) {
+ *index = CRI_IDX_WATCHER_OOBMSM;
+ *offset = CRI_OOBMSM_WATCHER_OFFSET;
+ }
+ break;
+
+ case 1:
+ if (cap_type == TELEMETRY)
+ *offset = CRI_OOBMSM_GFSP_TELEMETRY_OFFSET;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int xe_guid_decode(u32 guid, int *index, u32 *offset)
+{
+ u32 cap_type = FIELD_GET(GUID_CAP_TYPE, guid);
+ u32 device_id = FIELD_GET(GUID_DEVICE_ID, guid);
+
+ if (cap_type > WATCHER)
+ return -EINVAL;
+
+ if (device_id == BMG_DEVICE_ID)
+ return bmg_guid_decode(guid, index, offset);
+
+ if (device_id == CRI_DEVICE_ID)
+ return cri_guid_decode(guid, index, offset);
+
+ return -ENODEV;
+}
+
/*
* xe_pmt_telem_read is a callback API. I.e this can be accessed external to
* XE driver (PMT driver scope). Because of this, DRM hotplug needs to be
--
2.43.0
next prev parent reply other threads:[~2026-09-01 19:28 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 19:27 [PATCH v4 00/18] Crescent Island PMT support Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 01/18] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 02/18] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-02 9:05 ` Ilpo Järvinen
2026-09-02 9:07 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 03/18] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-02 9:08 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 04/18] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 05/18] platform/x86/intel/pmt: Add helpers for callback info Michael J. Ruhl
2026-09-02 9:10 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 06/18] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-02 9:18 ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 07/18] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 08/18] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 09/18] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 10/18] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 11/18] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 12/18] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-01 19:27 ` Michael J. Ruhl [this message]
2026-09-01 19:27 ` [PATCH v4 14/18] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 15/18] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 16/18] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 17/18] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 18/18] drm/xe/vsec: Refactor platform check Michael J. Ruhl
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260901192736.626777-33-michael.j.ruhl@intel.com \
--to=michael.j.ruhl@intel.com \
--cc=airlied@gmail.com \
--cc=anoop.c.vijay@intel.com \
--cc=badal.nilawar@intel.com \
--cc=david.e.box@linux.intel.com \
--cc=hansg@kernel.org \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=james.ausmus@intel.com \
--cc=karthik.poosa@intel.com \
--cc=matthew.brost@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=platform-driver-x86@vger.kernel.org \
--cc=rodrigo.vivi@intel.com \
--cc=simona@ffwll.ch \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox