From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D3E84FDE4F for ; Thu, 3 Sep 2026 20:11:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788466292; cv=none; b=b2GHojorOmBI7vVimV6R4BWFyY35YPiqg/D337xthut8BYp+5P7BYISDLcH7AHpmgRTDoOYFNBOOw5Ty/8gvBr1Tn9MI94NyFbTlf0Z03ToStPZhZuUZgicmL13xJVTErlUWFp23CR7Xvj+XX9KidGvw+FQMnNBJwgPLeCaBoKg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788466292; c=relaxed/simple; bh=W+6RI8o47If4689x6VTNBRL4vXlgcmCX1HOU0mMuNlQ=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pCIsDm7UmDDPXSXGRvb83PBJhr4isJEwC5mK/OG37/SUlZwsuGnzXgLDWsJm4SrXlNuKIuApplmPxiNdvphe5uNK4x+67sDlwQ2iVD7hcpuep63lrORo3VCSnRQBVo7ZbvKMyVDvZ8jvbFVrvFGqjTR4yeFtCLZrpsTEBceMV/I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mnRp1V7r; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mnRp1V7r" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788466289; x=1820002289; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=W+6RI8o47If4689x6VTNBRL4vXlgcmCX1HOU0mMuNlQ=; b=mnRp1V7rbZcGinKZRA2fObl7DroeqNcjUJY25rlt+9dswrmZk4ZU76vZ HMz0lXE8oUcAjK51Rb2RPnoy8Ivfz2PvfsP/NzcfU7T/tO3bx+iilO6Yq OQi1Y0or4iqc8LzGFdI4RyjbMtF85AILBlNiFNnCOBLtcdsOuOVQZx7m7 YLAyxD9MFgb40VqQ9dVablx80hEaIBOfb8EtyYlgKyRpdfGyjrHhsOqzP ZUk+4oyCJTR68XBd1cDwKtcwuik9saw2zEE6VwfyyvBIWR0AA5u5PyTWq TUpFWN1fL2Tb9/G5jWriSKCN+ptowJQcv/S29cRpT4vRDE5KUWfl1D9Jx Q==; X-CSE-ConnectionGUID: 4mTks751R2usSlORfoftZw== X-CSE-MsgGUID: W/Zzw+3uS1K+T/Bq07MZyg== X-IronPort-AV: E=McAfee;i="6800,10657,11895"; a="88994666" X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="88994666" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 13:10:41 -0700 X-CSE-ConnectionGUID: jpr9T29OQByyesaAx0HFow== X-CSE-MsgGUID: F/aY8nE3QWGWinflecKzEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="273348161" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2026 13:10:37 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com, karthik.poosa@intel.com Subject: [PATCH v5 17/18] drm/xe/vsec: Update PMT internal access Date: Thu, 3 Sep 2026 13:10:19 -0700 Message-ID: <20260903201002.1064889-37-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260903201002.1064889-20-michael.j.ruhl@intel.com> References: <20260903201002.1064889-20-michael.j.ruhl@intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Current PMT internal access assumes BMG devices. Use the new PMT GUID API to read the device specific guid. Minor cleanup for a newly unused parameter (mmio). Reviewed-by: Karthik Poosa Signed-off-by: Michael J. Ruhl --- drivers/gpu/drm/xe/xe_debugfs.c | 27 ++++++++++++++------------- drivers/gpu/drm/xe/xe_hwmon.c | 10 ++++++++-- drivers/gpu/drm/xe/xe_pcode.c | 10 ++++++++-- 3 files changed, 30 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c index b01f1e649b51..f17b993755f3 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -5,6 +5,7 @@ #include "xe_debugfs.h" +#include #include #include #include @@ -21,7 +22,6 @@ #include "xe_gt_printk.h" #include "xe_guc_ads.h" #include "xe_hw_engine.h" -#include "xe_mmio.h" #include "xe_pagefault.h" #include "xe_pcode.h" #include "xe_pm.h" @@ -97,16 +97,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe, } } -static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio, - u32 offset, const char *name, struct drm_printer *p) +static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name, + struct drm_printer *p) { u64 residency = 0; - + u32 guid; int ret; - ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), - &residency, offset, sizeof(residency)); + ret = xe_vsec_get_guid(xe, &guid); + if (ret) { + drm_warn(&xe->drm, "PMT device is not available: %d\n", ret); + return; + } + + ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency)); if (ret != sizeof(residency)) { drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret); return; @@ -245,13 +249,12 @@ static int pcode_info(struct seq_file *m, void *data) static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) { struct xe_device *xe; - struct xe_mmio *mmio; struct drm_printer p; xe = node_to_xe(m->private); p = drm_seq_file_printer(m); guard(xe_pm_runtime)(xe); - mmio = xe_root_tile_mmio(xe); + static const struct { u32 offset; const char *name; @@ -265,7 +268,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) }; for (int i = 0; i < ARRAY_SIZE(residencies); i++) - read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p); + read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p); return 0; } @@ -273,13 +276,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data) { struct xe_device *xe; - struct xe_mmio *mmio; struct drm_printer p; xe = node_to_xe(m->private); p = drm_seq_file_printer(m); guard(xe_pm_runtime)(xe); - mmio = xe_root_tile_mmio(xe); static const struct { u32 offset; @@ -291,7 +292,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data) }; for (int i = 0; i < ARRAY_SIZE(residencies); i++) - read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p); + read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p); return 0; } diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c index b9740224e07f..c44a7d24816d 100644 --- a/drivers/gpu/drm/xe/xe_hwmon.c +++ b/drivers/gpu/drm/xe/xe_hwmon.c @@ -517,9 +517,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy) if (hwmon->xe->info.platform == XE_BATTLEMAGE) { u64 pmt_val; + u32 guid; - ret = xe_pmt_telem_read(hwmon->xe->drm.dev, - xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), + ret = xe_vsec_get_guid(hwmon->xe, &guid); + if (ret) { + drm_warn(&hwmon->xe->drm, "PMT device is not available: %d\n", ret); + *energy = 0; + return; + } + ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid, &pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET, sizeof(pmt_val)); if (ret != sizeof(pmt_val)) { drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret); diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index 844d8c6face6..e534d64834e3 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -365,11 +365,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */ int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version) { int ret = 0; + u32 guid; guard(xe_pm_runtime)(xe); - ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(xe_root_tile_mmio(xe), BMG_PUNIT_TELEMETRY_GUID), + ret = xe_vsec_get_guid(xe, &guid); + if (ret) { + xe_warn(xe, "PMT device is not available: %d\n", ret); + return ret; + } + + ret = xe_pmt_telem_read(xe->drm.dev, guid, (u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version)); if (ret != sizeof(*version)) { xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret)); -- 2.43.0