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Define five new register offsets for the 1AH_M80H > mailbox: message, response and three argument registers. The extended > argument registers are required because 1AH_M80H exposes metrics through > a firmware managed DRAM region. The GET_METRICS_TABLE_DRAM_ADDR command > returns a 64-bit physical address split across arg_reg[0] (low 32-bit) > and arg_reg[1] (high 32-bit), with the metrics table size in arg_reg[2]. > > Define amd_pmf_1ah_m80h_smu_regs to capture this extended register layout > and register it in pmf_pci_ids[] via PCI_DEVICE_DATA(), keeping the > existing amd_pmf_legacy_smu_regs shared instance for all prior platforms > unchanged. > > Co-developed-by: Patil Rajesh Reddy > Signed-off-by: Patil Rajesh Reddy > Signed-off-by: Shyam Sundar S K > --- > drivers/platform/x86/amd/pmf/core.c | 29 +++++++++++++++++++++++++---- > drivers/platform/x86/amd/pmf/pmf.h | 3 ++- > 2 files changed, 27 insertions(+), 5 deletions(-) > > diff --git a/drivers/platform/x86/amd/pmf/core.c b/drivers/platform/x86/amd/pmf/core.c > index 1826fc64bf56..7c5a1ec3d7fc 100644 > --- a/drivers/platform/x86/amd/pmf/core.c > +++ b/drivers/platform/x86/amd/pmf/core.c > @@ -26,6 +26,13 @@ > #define AMD_PMF_REGISTER_RESPONSE 0xA78 > #define AMD_PMF_REGISTER_ARGUMENT 0xA58 > > +/* PMF-SMU communication registers for 1AH_M80H */ > +#define AMD_PMF_REG_MESSAGE_1AH_M80H 0xA04 > +#define AMD_PMF_REG_RESPONSE_1AH_M80H 0xA08 > +#define AMD_PMF_REG_ARGUMENT0_1AH_M80H 0xA0C > +#define AMD_PMF_REG_ARGUMENT1_1AH_M80H 0xAAC > +#define AMD_PMF_REG_ARGUMENT2_1AH_M80H 0xAB0 > + > /* Base address of SMU for mapping physical address to virtual address */ > #define AMD_PMF_MAPPING_SIZE 0x01000 > #define AMD_PMF_BASE_ADDR_OFFSET 0x10000 > @@ -179,7 +186,7 @@ static void __maybe_unused amd_pmf_dump_registers(struct amd_pmf_dev *dev) > value = amd_pmf_reg_read(dev, dev->smu_regs->resp_reg); > dev_dbg(dev->dev, "AMD_PMF_REGISTER_RESPONSE:%x\n", value); > > - value = amd_pmf_reg_read(dev, dev->smu_regs->arg_reg); > + value = amd_pmf_reg_read(dev, dev->smu_regs->arg_reg[0]); > dev_dbg(dev->dev, "AMD_PMF_REGISTER_ARGUMENT:%d\n", value); > > value = amd_pmf_reg_read(dev, dev->smu_regs->msg_reg); > @@ -220,7 +227,7 @@ int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 > amd_pmf_reg_write(dev, dev->smu_regs->resp_reg, 0); > > /* Write argument into argument register */ > - amd_pmf_reg_write(dev, dev->smu_regs->arg_reg, arg); > + amd_pmf_reg_write(dev, dev->smu_regs->arg_reg[0], arg); > > /* Write message ID to message ID register */ > amd_pmf_reg_write(dev, dev->smu_regs->msg_reg, message); > @@ -239,7 +246,7 @@ int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 > if (get) { > /* PMFW may take longer time to return back the data */ > usleep_range(DELAY_MIN_US, 10 * DELAY_MAX_US); > - *data = amd_pmf_reg_read(dev, dev->smu_regs->arg_reg); > + *data = amd_pmf_reg_read(dev, dev->smu_regs->arg_reg[0]); > } > break; > case AMD_PMF_RESULT_CMD_REJECT_BUSY: > @@ -266,7 +273,19 @@ int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 > static const struct amd_pmf_smu_regs amd_pmf_legacy_smu_regs = { > .msg_reg = AMD_PMF_REGISTER_MESSAGE, > .resp_reg = AMD_PMF_REGISTER_RESPONSE, > - .arg_reg = AMD_PMF_REGISTER_ARGUMENT, > + .arg_reg = { AMD_PMF_REGISTER_ARGUMENT, 0, 0 }, > +}; > + > +/* 1AH_M80H uses an extended mailbox with three argument registers */ > +static const struct amd_pmf_smu_regs amd_pmf_1ah_m80h_smu_regs = { > + .msg_reg = AMD_PMF_REG_MESSAGE_1AH_M80H, > + .resp_reg = AMD_PMF_REG_RESPONSE_1AH_M80H, > + /* arg_reg[0], arg_reg[1] and arg_reg[2] carry low, hi address and size for DRAM metrics */ > + .arg_reg = { Rather than overloading arg_reg how about if you just have a define in "struct amd_pmf_smu_regs" for low, hi, size? So f1ahm80h wouldn't have arg_reg defined, it would have low_reg, high_reg, size_reg. > + AMD_PMF_REG_ARGUMENT0_1AH_M80H, > + AMD_PMF_REG_ARGUMENT1_1AH_M80H, > + AMD_PMF_REG_ARGUMENT2_1AH_M80H, > + }, > }; > > static const struct pci_device_id pmf_pci_ids[] = { > @@ -274,6 +293,7 @@ static const struct pci_device_id pmf_pci_ids[] = { > { PCI_DEVICE_DATA(AMD, CPU_ID_PS, &amd_pmf_legacy_smu_regs) }, > { PCI_DEVICE_DATA(AMD, 1AH_M20H_ROOT, &amd_pmf_legacy_smu_regs) }, > { PCI_DEVICE_DATA(AMD, 1AH_M60H_ROOT, &amd_pmf_legacy_smu_regs) }, > + { PCI_DEVICE_DATA(AMD, 1AH_M80H_ROOT, &amd_pmf_1ah_m80h_smu_regs) }, > { } > }; > > @@ -563,6 +583,7 @@ static const struct acpi_device_id amd_pmf_acpi_ids[] = { > {"AMDI0105", 0}, > {"AMDI0107", 0}, > {"AMDI0108", 0}, > + {"AMDI0109", 0}, > { } > }; > MODULE_DEVICE_TABLE(acpi, amd_pmf_acpi_ids); > diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h > index 7a8fd9d399de..088edfab08f0 100644 > --- a/drivers/platform/x86/amd/pmf/pmf.h > +++ b/drivers/platform/x86/amd/pmf/pmf.h > @@ -28,6 +28,7 @@ > #define AMD_CPU_ID_PS 0x14e8 > #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 > #define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122 > +#define PCI_DEVICE_ID_AMD_1AH_M80H_ROOT 0x115b > > /* Aliases required by PCI_DEVICE_DATA() macro naming convention */ > #define PCI_DEVICE_ID_AMD_CPU_ID_RMB AMD_CPU_ID_RMB > @@ -400,7 +401,7 @@ struct pmf_cbi_ring_buffer { > struct amd_pmf_smu_regs { > u32 msg_reg; > u32 resp_reg; > - u32 arg_reg; > + u32 arg_reg[3]; See above comment. > }; > > struct amd_pmf_dev {