Re: [PATCH 1/2] platform/x86/amd/pmf: Rename ipu fields to npu in smu_pmf_metrics_v2 structure

["Mario Limonciello (AMD) (kernel.org)" <superm1@kernel.org>]

On 9/19/2025 12:54 AM, Shyam Sundar S K wrote:
> Rename multiple fields in the struct smu_pmf_metrics_v2 from "ipu" to "npu"
> to align with updated hardware terminology and enhance code clarity.
> 
> Co-developed-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
> Signed-off-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>> ---
> Hi Ilpo, this can be applied on origin/review-ilpo-next with git tip commit
> "8236b4667aca"
> 
>   drivers/platform/x86/amd/pmf/pmf.h | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/platform/x86/amd/pmf/pmf.h b/drivers/platform/x86/amd/pmf/pmf.h
> index bd19f2a6bc78..6ea5380f3b23 100644
> --- a/drivers/platform/x86/amd/pmf/pmf.h
> +++ b/drivers/platform/x86/amd/pmf/pmf.h
> @@ -243,12 +243,12 @@ struct smu_pmf_metrics_v2 {
>   	u16 vclk_freq;			/* MHz */
>   	u16 vcn_activity;		/* VCN busy % [0-100] */
>   	u16 vpeclk_freq;		/* MHz */
> -	u16 ipuclk_freq;		/* MHz */
> -	u16 ipu_busy[8];		/* NPU busy % [0-100] */
> +	u16 npuclk_freq;		/* MHz */
> +	u16 npu_busy[8];		/* NPU busy % [0-100] */
>   	u16 dram_reads;			/* MB/sec */
>   	u16 dram_writes;		/* MB/sec */
>   	u16 core_c0residency[16];	/* C0 residency % [0-100] */
> -	u16 ipu_power;			/* mW */
> +	u16 npu_power;			/* mW */
>   	u32 apu_power;			/* mW */
>   	u32 gfx_power;			/* mW */
>   	u32 dgpu_power;			/* mW */
> @@ -257,9 +257,9 @@ struct smu_pmf_metrics_v2 {
>   	u32 filter_alpha_value;		/* time constant [us] */
>   	u32 metrics_counter;
>   	u16 memclk_freq;		/* MHz */
> -	u16 mpipuclk_freq;		/* MHz */
> -	u16 ipu_reads;			/* MB/sec */
> -	u16 ipu_writes;			/* MB/sec */
> +	u16 mpnpuclk_freq;		/* MHz */
> +	u16 npu_reads;			/* MB/sec */
> +	u16 npu_writes;			/* MB/sec */
>   	u32 throttle_residency_prochot;
>   	u32 throttle_residency_spl;
>   	u32 throttle_residency_fppt;