From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
platform-driver-x86@vger.kernel.org,
rajvi.jingar@linux.intel.com
Subject: Re: [PATCH V3 11/16] platform/x86/intel/pmc: Find and register PMC telemetry entries
Date: Thu, 12 Oct 2023 18:17:52 +0300 (EEST) [thread overview]
Message-ID: <72343163-f83e-1184-480-a565288bf21f@linux.intel.com> (raw)
In-Reply-To: <20231012023840.3845703-12-david.e.box@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 4084 bytes --]
On Wed, 11 Oct 2023, David E. Box wrote:
> The PMC SSRAM device contains counters that are structured in Intel
> Platform Monitoring Technology (PMT) telemetry regions. Look for and
> register these telemetry regions from the driver so that they may be read
> using the Intel PMT ABI.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
> ---
> V3 - no change
>
> V2 - no change
>
> drivers/platform/x86/intel/pmc/Kconfig | 1 +
> drivers/platform/x86/intel/pmc/core_ssram.c | 52 +++++++++++++++++++++
> 2 files changed, 53 insertions(+)
>
> diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/intel/pmc/Kconfig
> index b526597e4deb..d2f651fbec2c 100644
> --- a/drivers/platform/x86/intel/pmc/Kconfig
> +++ b/drivers/platform/x86/intel/pmc/Kconfig
> @@ -7,6 +7,7 @@ config INTEL_PMC_CORE
> tristate "Intel PMC Core driver"
> depends on PCI
> depends on ACPI
> + depends on INTEL_PMT_TELEMETRY
> help
> The Intel Platform Controller Hub for Intel Core SoCs provides access
> to Power Management Controller registers via various interfaces. This
> diff --git a/drivers/platform/x86/intel/pmc/core_ssram.c b/drivers/platform/x86/intel/pmc/core_ssram.c
> index af405d11919f..1ecfa3804117 100644
> --- a/drivers/platform/x86/intel/pmc/core_ssram.c
> +++ b/drivers/platform/x86/intel/pmc/core_ssram.c
> @@ -13,6 +13,8 @@
> #include <linux/io-64-nonatomic-lo-hi.h>
>
> #include "core.h"
> +#include "../vsec.h"
> +#include "../pmt/telemetry.h"
>
> #define SSRAM_HDR_SIZE 0x100
> #define SSRAM_PWRM_OFFSET 0x14
> @@ -24,6 +26,49 @@
>
> DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T));
>
> +static void
> +pmc_add_pmt(struct pmc_dev *pmcdev, u64 ssram_base, void __iomem *ssram)
> +{
> + struct pci_dev *pcidev = pmcdev->ssram_pcidev;
> + struct intel_vsec_platform_info info = {};
> + struct intel_vsec_header *headers[2] = {};
> + struct intel_vsec_header header;
> + void __iomem *dvsec;
> + u32 dvsec_offset;
> + u32 table, hdr;
> +
> + ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
> + if (!ssram)
> + return;
> +
> + dvsec_offset = readl(ssram + SSRAM_DVSEC_OFFSET);
> + iounmap(ssram);
> +
> + dvsec = ioremap(ssram_base + dvsec_offset, SSRAM_DVSEC_SIZE);
> + if (!dvsec)
> + return;
> +
> + hdr = readl(dvsec + PCI_DVSEC_HEADER1);
> + header.id = readw(dvsec + PCI_DVSEC_HEADER2);
> + header.rev = PCI_DVSEC_HEADER1_REV(hdr);
> + header.length = PCI_DVSEC_HEADER1_LEN(hdr);
> + header.num_entries = readb(dvsec + INTEL_DVSEC_ENTRIES);
> + header.entry_size = readb(dvsec + INTEL_DVSEC_SIZE);
> +
> + table = readl(dvsec + INTEL_DVSEC_TABLE);
> + header.tbir = INTEL_DVSEC_TABLE_BAR(table);
> + header.offset = INTEL_DVSEC_TABLE_OFFSET(table);
> + iounmap(dvsec);
> +
> + headers[0] = &header;
> + info.caps = VSEC_CAP_TELEMETRY;
> + info.headers = headers;
> + info.base_addr = ssram_base;
> + info.parent = &pmcdev->pdev->dev;
> +
> + intel_vsec_register(pcidev, &info);
> +}
> +
> static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *list, u16 devid)
> {
> for (; list->map; ++list)
> @@ -98,6 +143,9 @@ pmc_core_get_secondary_pmc(struct pmc_dev *pmcdev, int pmc_idx, u32 offset)
> pwrm_base = get_base(secondary_ssram, SSRAM_PWRM_OFFSET);
> devid = readw(secondary_ssram + SSRAM_DEVID_OFFSET);
>
> + /* Find and register and PMC telemetry entries */
> + pmc_add_pmt(pmcdev, ssram_base, main_ssram);
> +
> map = pmc_core_find_regmap(pmcdev->regmap_list, devid);
> if (!map)
> return -ENODEV;
> @@ -126,6 +174,9 @@ pmc_core_get_primary_pmc(struct pmc_dev *pmcdev)
> pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
> devid = readw(ssram + SSRAM_DEVID_OFFSET);
>
> + /* Find and register and PMC telemetry entries */
> + pmc_add_pmt(pmcdev, ssram_base, ssram);
> +
> map = pmc_core_find_regmap(pmcdev->regmap_list, devid);
> if (!map)
> return -ENODEV;
> @@ -165,3 +216,4 @@ int pmc_core_ssram_init(struct pmc_dev *pmcdev)
>
> return ret;
> }
> +MODULE_IMPORT_NS(INTEL_VSEC);
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
--
i.
next prev parent reply other threads:[~2023-10-12 15:17 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-12 2:38 [PATCH V3 00/16] intel_pmc: Add telemetry API to read counters David E. Box
2023-10-12 2:38 ` [PATCH V3 01/16] platform/x86/intel/vsec: Move structures to header David E. Box
2023-10-12 2:38 ` [PATCH V3 02/16] platform/x86/intel/vsec: remove platform_info from vsec device structure David E. Box
2023-10-12 15:31 ` Ilpo Järvinen
2023-10-12 16:55 ` David E. Box
2023-10-12 2:38 ` [PATCH V3 03/16] platform/x86/intel/vsec: Use cleanup.h David E. Box
2023-10-12 5:25 ` kernel test robot
2023-10-12 17:23 ` David E. Box
2023-10-13 10:39 ` Ilpo Järvinen
2023-10-13 18:14 ` Joe Perches
2023-10-24 5:15 ` Joe Perches
2023-10-12 5:48 ` kernel test robot
2023-10-12 14:46 ` Ilpo Järvinen
2023-10-12 17:13 ` David E. Box
2023-10-13 10:54 ` Ilpo Järvinen
2023-10-13 22:16 ` David E. Box
2023-10-16 12:02 ` Ilpo Järvinen
2023-10-12 2:38 ` [PATCH V3 04/16] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
2023-10-12 2:38 ` [PATCH V3 05/16] platform/x86/intel/vsec: Add base address field David E. Box
2023-10-12 2:38 ` [PATCH V3 06/16] platform/x86/intel/pmt: Add header to struct intel_pmt_entry David E. Box
2023-10-12 2:38 ` [PATCH V3 07/16] platform/x86/intel/pmt: telemetry: Export API to read telemetry David E. Box
2023-10-12 2:38 ` [PATCH V3 08/16] platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init David E. Box
2023-10-12 2:38 ` [PATCH V3 09/16] platform/x86/intel/pmc: Allow pmc_core_ssram_init to fail David E. Box
2023-10-12 15:01 ` Ilpo Järvinen
2023-10-12 17:52 ` David E. Box
2023-10-13 11:36 ` Ilpo Järvinen
2023-10-12 2:38 ` [PATCH V3 10/16] platform/x86/intel/pmc: Split pmc_core_ssram_get_pmc() David E. Box
2023-10-12 15:14 ` Ilpo Järvinen
2023-10-12 17:28 ` David E. Box
2023-10-12 2:38 ` [PATCH V3 11/16] platform/x86/intel/pmc: Find and register PMC telemetry entries David E. Box
2023-10-12 15:17 ` Ilpo Järvinen [this message]
2023-10-12 2:38 ` [PATCH V3 12/16] platform/x86/intel/pmc: Display LPM requirements for multiple PMCs David E. Box
2023-10-12 2:38 ` [PATCH V3 13/16] platform/x86/intel/pmc: Retrieve LPM information using Intel PMT David E. Box
2023-10-12 2:38 ` [PATCH V3 14/16] platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-P David E. Box
2023-10-12 2:38 ` [PATCH V3 15/16] platform/x86/intel/pmc: Add debug attribute for Die C6 counter David E. Box
2023-10-12 2:38 ` [PATCH V3 16/16] platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake David E. Box
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=72343163-f83e-1184-480-a565288bf21f@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=david.e.box@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
--cc=rajvi.jingar@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox