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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0/Aqy1V6duXsUMp3zqaBpIalbUv8Tj5yzUOknBi+tMMO7I8f+R4gujqb8clHf+q6hVJa3ag/49KRn76YGEHu6B51ccqRmLzU047inProoIkmWCx4PlfxpX0L5MTsHcJJ4q3I+VIw0qqY3OWaVo2f39UAB3+tmIiXkbnyDVLabC0oBjDiVl49a//Rj1iUka5Y9nR7GuxeZQCqSYtifCD/QdLd0WP/i3GusXKF1QyUDPhKDx8xqyVeyvROrecgPoeCUzZqqimXeqTgOx1VNjwsvJfR6BBpZyQGc8J2XTJ1nJ0pNYhi/UXqYYdHXi+BkEme3yEqMPVliZ1hwxdvuHxsZxBxiLTJDtNHkOYjOREG6I7SmRLnPOwftTTm9Hi7YkRFv7XvVS9SkjJpy3HequjtqjMD83cICGSwnT/x7/4G1lNlMeqSHGbm3iZ5D28ZCKVA X-Exchange-RoutingPolicyChecked: d6ha7XliijdNdRq0CRA+kltRK3nhRrOdcBsaOsD7+aAmDsS4nZ81hb27XXF9gInrv6G7h3NbRMVec/1KQUe/roQtadsxkGcs/t2eJ9+eO/MuVDIeMav9mShp2Ivdv7AqYltv5y5GAVl2rjQzlZZ9paQJkXj/F6msKHqWj4XDHVzs5lKaivTwS6KyAOoXo6tBwtzGrSVQ06VzhFUk6grmyvz0bSUnK7GeED8nPA+t2Ck7h2bK9U/aKxfr7T2ONDZzMKSbAh+4SRqUeQlG0R6YXiwWWkACJbPEdQ/ysQM6GVpD6QEekdvC5CxnmD2jh+OLST84WnDPCZkiSYsMuNkrPg== X-OriginatorOrg: opensource.cirrus.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2026 12:51:24.1033 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70161217-66c6-4996-3d45-08de995b5eb8 X-MS-Exchange-CrossTenant-Id: bec09025-e5bc-40d1-a355-8e955c307de8 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=bec09025-e5bc-40d1-a355-8e955c307de8;Ip=[84.19.233.75];Helo=[edirelay1.ad.cirrus.com] X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TreatMessagesAsInternal-CH2PEPF00000144.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR19MB5781 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEzMDEyNyBTYWx0ZWRfXwr4lqdypNqLx r5c00WC2CNR3WzyNjvOD3GXELtZt2rhpls94pRWuy71Y4jEd5yJ65gZe+F29/Lvv1eOCMlBklD1 riQCevbWi75eirnpWFgdfXXihX2TuCFmGvuga38f+vaWpIhySoa310EkeLwzJK83Q7e7evEDHGw Jh4GmWMfJkoOCfqP3BqrVrRZhfxykxBNzb+z6fRnpmSBhVHCGEK6Sjm5zsz3aY6N03QzvsbX5zL +iY1L5bhHg6hAbuDBzxlKc5Is2wFbJIJU5UO5WoH6GmQtIxOMpNqZ2bbsS7Cm6uIqOEEC2ErFRZ Nti7NJJt8vwMEBWML0eZ/mX5HabfS48r+WDHI6s64IjXRo8NVRS4l23ZdgRa4QOZfANL5VXmpGo 46dNwXg9S8Ngdz2I9Y3UNHeLS/ygDJLv3JHl0aobd/gbgd1JTI6uEj2+ylIrnYa9McYCI+jTV4A pEyAGtzMp0+1Tb3P2Cg== X-Authority-Analysis: v=2.4 cv=TdumcxQh c=1 sm=1 tr=0 ts=69dce6d1 cx=c_pps a=X0DbKXi7RYM5x2NUiypu8g==:117 a=h1hSm8JtM9GN1ddwPAif2w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s63m1ICgrNkA:10 a=RWc_ulEos4gA:10 a=VkNPw1HP01LnGYTKEx00:22 a=iX4cTi3TZMoOKdANLEfx:22 a=KfkQE9S9VqCBgivYGm0O:22 a=J7wGSEXvd9CKyP475f0A:9 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: YWtFivpzJHCZFZgbc0ZMnZ-El32Xozxy X-Proofpoint-ORIG-GUID: YWtFivpzJHCZFZgbc0ZMnZ-El32Xozxy X-Proofpoint-Spam-Reason: safe On 13/04/2026 12:43 pm, Hans de Goede wrote: > Hi, > > On 13-Apr-26 12:05 PM, Khalil wrote: >> Some HP laptops with Intel Lunar Lake and dual Cirrus Logic CS35L56 >> amplifiers over SPI have an incomplete cs-gpios property in the SPI >> controller's _DSD - it only declares the first chip select. The >> remaining chip select GPIOs are defined as GpioIo resources in the >> peripheral's ACPI node but are not referenced by the controller. >> >> This causes the SPI framework to reject devices whose chip select >> exceeds num_chipselect with -EINVAL, preventing the second amplifier >> from probing. >> >> Fix this on known affected platforms by: >> >> + >> +/* >> + * ACPI GPIO mapping for the chip select GpioIo resource. >> + * Maps "cs-gpios" to the GpioIo resource at index 0 of the ACPI _CRS. >> + */ >> +static const struct acpi_gpio_params smi_cs_gpio_params = { 0, 0, false }; >> + >> +static const struct acpi_gpio_mapping smi_cs_gpio_mapping[] = { >> + { "cs-gpios", &smi_cs_gpio_params, 1 }, >> + { } >> }; > > I'm confused here you say that the chip-select for the second amplifier > is missing, but I would expect that to be the GpioIo resource at index 1 > not 0? > > I would expect the GpioIo resource at index 0 to be for the first > amplifier which does have a GPIO already in the _DSD cs-gpios property ? > > Since this is a multi-serial device ACPI node, there is only one > set of resources for both amplifiers (with their also being 2 SPI > resources in the _CRS list). > > So I would expect there to also be multiple GPIO entries in the > _CRS list, with the order of the chip-selects GPIOs resources matching > the order of the SPI resources. You can't assume that. There is no ACPI reason why the GpioIo should be in order of chip selects. In fact, some manufacturers scramble them (e.g. CS2, CS1, CS3). You have to remember that the ACPI is written so that it works with Windows (which is the reason we need this serial multi-instantiate driver.) so it may contain Windowsisms.