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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
	Sanket.Goswami@amd.com,  platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH v2 5/8] platform/x86/amd/pmc: Update IP information structure for newer SoCs
Date: Fri, 1 Nov 2024 14:04:15 +0200 (EET)	[thread overview]
Message-ID: <c31b8002-75bc-2d24-7a07-1bb7d8638e85@linux.intel.com> (raw)
In-Reply-To: <20241029155440.3499273-6-Shyam-sundar.S-k@amd.com>

On Tue, 29 Oct 2024, Shyam Sundar S K wrote:

> The latest AMD processors include additional IP blocks that must be turned
> off before transitioning to low power. PMFW provides an interface to
> retrieve debug information from each IP block, which is useful for
> diagnosing issues if the system fails to enter or exit low power states,
> or for profiling which IP block takes more time. Add support for using
> this information within the driver.
> 
> Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
> ---
>  drivers/platform/x86/amd/pmc/pmc.c | 42 ++++++++++++++++++++++++++++--
>  1 file changed, 40 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
> index f9900a03391a..0bf4065153da 100644
> --- a/drivers/platform/x86/amd/pmc/pmc.c
> +++ b/drivers/platform/x86/amd/pmc/pmc.c
> @@ -95,6 +95,35 @@ struct amd_pmc_bit_map {
>  	u32 bit_mask;
>  };
>  
> +static const struct amd_pmc_bit_map soc15_ip_blk_v2[] = {
> +	{"DISPLAY",     BIT(0)},
> +	{"CPU",         BIT(1)},
> +	{"GFX",         BIT(2)},
> +	{"VDD",         BIT(3)},
> +	{"VDD_CCX",     BIT(4)},
> +	{"ACP",         BIT(5)},
> +	{"VCN_0",       BIT(6)},
> +	{"VCN_1",       BIT(7)},
> +	{"ISP",         BIT(8)},
> +	{"NBIO",        BIT(9)},
> +	{"DF",          BIT(10)},
> +	{"USB3_0",      BIT(11)},
> +	{"USB3_1",      BIT(12)},
> +	{"LAPIC",       BIT(13)},
> +	{"USB3_2",      BIT(14)},
> +	{"USB4_RT0",	BIT(15)},
> +	{"USB4_RT1",	BIT(16)},
> +	{"USB4_0",      BIT(17)},
> +	{"USB4_1",      BIT(18)},
> +	{"MPM",         BIT(19)},
> +	{"JPEG_0",      BIT(20)},
> +	{"JPEG_1",      BIT(21)},
> +	{"IPU",         BIT(22)},
> +	{"UMSCH",       BIT(23)},
> +	{"VPE",         BIT(24)},
> +	{}
> +};
> +
>  static const struct amd_pmc_bit_map soc15_ip_blk[] = {
>  	{"DISPLAY",	BIT(0)},
>  	{"CPU",		BIT(1)},
> @@ -170,7 +199,10 @@ static void amd_pmc_get_ip_info(struct amd_pmc_dev *dev)
>  		break;
>  	case PCI_DEVICE_ID_AMD_1AH_M20H_ROOT:
>  	case PCI_DEVICE_ID_AMD_1AH_M60H_ROOT:
> -		dev->num_ips = 22;
> +		if (boot_cpu_data.x86_model == 0x70)
> +			dev->num_ips = 25;
> +		else
> +			dev->num_ips = 22;

Could these use ARRAY_SIZE()? They're related to that array, aren't they?

>  		dev->smu_msg = 0x938;
>  		break;
>  	}
> @@ -338,9 +370,15 @@ static int smu_fw_info_show(struct seq_file *s, void *unused)
>  
>  	seq_puts(s, "\n=== Active time (in us) ===\n");
>  	for (idx = 0 ; idx < dev->num_ips ; idx++) {
> -		if (soc15_ip_blk[idx].bit_mask & dev->active_ips)
> +		if (dev->cpu_id == PCI_DEVICE_ID_AMD_1AH_M20H_ROOT &&
> +		    boot_cpu_data.x86_model == 0x70) {
> +			if (soc15_ip_blk_v2[idx].bit_mask & dev->active_ips)
> +				seq_printf(s, "%-8s : %lld\n", soc15_ip_blk_v2[idx].name,
> +					   table.timecondition_notmet_lastcapture[idx]);
> +		} else if (soc15_ip_blk[idx].bit_mask & dev->active_ips) {
>  			seq_printf(s, "%-8s : %lld\n", soc15_ip_blk[idx].name,
>  				   table.timecondition_notmet_lastcapture[idx]);
> +		}

Why not have amd_pmc_get_ip_info() prepare a pointer into 'dev' to the 
relevant soc15_ip_blk_v2/soc15_ip_blk rather than trying to pick one here?

>  	}
>  
>  	return 0;
> 

-- 
 i.


  reply	other threads:[~2024-11-01 12:04 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29 15:54 [PATCH v2 0/8] platform/x86/amd/pmc: Updates to AMD PMC driver Shyam Sundar S K
2024-10-29 15:54 ` [PATCH v2 1/8] platform/x86/amd/pmc: Move STB functionality to a new file for better code organization Shyam Sundar S K
2024-11-01 10:15   ` Ilpo Järvinen
2024-11-05  5:08     ` Shyam Sundar S K
2024-10-29 15:54 ` [PATCH v2 2/8] platform/x86/amd/pmc: Update function names to align with new STB file Shyam Sundar S K
2024-11-01 10:22   ` Ilpo Järvinen
2024-10-29 15:54 ` [PATCH v2 3/8] platform/x86/amd/pmc: Define enum for S2D/PMC msg_port Shyam Sundar S K
2024-11-01 10:28   ` Ilpo Järvinen
2024-11-05  5:04     ` Shyam Sundar S K
2024-11-05  9:44       ` Ilpo Järvinen
2024-11-05 17:39         ` Shyam Sundar S K
2024-10-29 15:54 ` [PATCH v2 4/8] platform/x86/amd/pmc: Isolate STB code changes to a new file Shyam Sundar S K
2024-10-29 15:54 ` [PATCH v2 5/8] platform/x86/amd/pmc: Update IP information structure for newer SoCs Shyam Sundar S K
2024-11-01 12:04   ` Ilpo Järvinen [this message]
2024-11-05  5:15     ` Shyam Sundar S K
2024-11-05  9:59       ` Ilpo Järvinen
2024-11-05 10:06         ` Shyam Sundar S K
2024-10-29 15:54 ` [PATCH v2 6/8] platform/x86/amd/pmc: Update S2D message id for 1Ah Family 70h model Shyam Sundar S K
2024-10-29 16:13   ` Mario Limonciello
2024-10-29 15:54 ` [PATCH v2 7/8] platform/x86/amd/pmc: Add STB support for AMD Desktop variants Shyam Sundar S K
2024-10-29 16:14   ` Mario Limonciello
2024-11-01 12:11   ` Ilpo Järvinen
2024-10-29 15:54 ` [PATCH v2 8/8] MAINTAINERS: Change AMD PMF driver status to "Supported" Shyam Sundar S K

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