From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Vadim Pasternak <vadimp@nvidia.com>
Cc: Hans de Goede <hdegoede@redhat.com>,
michaelsh@nvidia.com, crajank@nvidia.com, fradensky@nvidia.com,
oleksandrs@nvidia.com, platform-driver-x86@vger.kernel.org
Subject: Re: [PATCH v5 10/12] platform: mellanox: mlx-platform: Add support for new Nvidia system
Date: Mon, 3 Feb 2025 16:38:05 +0200 (EET) [thread overview]
Message-ID: <cb788be2-76be-0a1b-7caa-4d94295202ad@linux.intel.com> (raw)
In-Reply-To: <20250124172632.22437-11-vadimp@nvidia.com>
On Fri, 24 Jan 2025, Vadim Pasternak wrote:
> Add support for SN5640 and SN5610 Nvidia switch.
>
> SN5640 is a 51.2Tbps switch based on Nvidia SPC-5 ASIC.
> It provides up-to 400Gbps full bidirectional bandwidth per port.
> The system supports 64 OSFP cages and fits into standard 2U racks.
>
> SN5640 Features:
> - 64 OSFP ports supporting 2.5Gbps - 400Gbps speeds.
> - Air-cooled with 4 + 1 redundant fan units.
> - 2 + 2 redundant 2000W PSUs.
> - System management board based on AMD CPU with secure-boot support.
>
> SN5610 is a 51.2Tbps switch based on Nvidia SPC-4 ASIC.
> It provides up-to 800Gbps full bidirectional bandwidth per port.
> The system supports 64 OSFP cages and fits into standard 2U racks.
>
> SN5610 Features:
> - 64 OSFP ports supporting 10Gbps - 800Gbps speeds.
> - Air-cooled with 4 + 1 redundant fan units.
> - 2 + 2 redundant 2000W PSUs.
> - System management board based on AMD CPU with secure-boot support.
>
> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com>
> Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
> ---
> v2->v3
> Comments pointed out by Ilpo:
> - Add empty lines for visibility in mlxplat_dmi_ng400_hi171_matched().
> ---
> drivers/platform/mellanox/mlx-platform.c | 97 ++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
>
> diff --git a/drivers/platform/mellanox/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c
> index ee72a53a8b06..953f92a7cf22 100644
> --- a/drivers/platform/mellanox/mlx-platform.c
> +++ b/drivers/platform/mellanox/mlx-platform.c
> @@ -3042,6 +3042,60 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_l1_switch_data = {
> .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT,
> };
>
> +/* Platform hotplug for next-generation 800G systems family data */
> +static struct mlxreg_core_item mlxplat_mlxcpld_ng800_hi171_items[] = {
> + {
> + .data = mlxplat_mlxcpld_ext_psu_items_data,
> + .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
> + .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
> + .mask = MLXPLAT_CPLD_PSU_EXT_MASK,
> + .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
> + .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_psu_items_data),
> + .inversed = 1,
> + .health = false,
> + },
> + {
> + .data = mlxplat_mlxcpld_modular_pwr_items_data,
> + .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
> + .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
> + .mask = MLXPLAT_CPLD_PWR_EXT_MASK,
> + .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET,
> + .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_pwr_items_data),
> + .inversed = 0,
> + .health = false,
> + },
> + {
> + .data = mlxplat_mlxcpld_xdr_fan_items_data,
> + .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
> + .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
> + .mask = MLXPLAT_CPLD_FAN_XDR_MASK,
> + .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET,
> + .capability_mask = MLXPLAT_CPLD_FAN_CAP_MASK,
> + .count = ARRAY_SIZE(mlxplat_mlxcpld_xdr_fan_items_data),
> + .inversed = 1,
> + .health = false,
> + },
> + {
> + .data = mlxplat_mlxcpld_default_asic_items_data,
> + .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
> + .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET,
> + .mask = MLXPLAT_CPLD_ASIC_MASK,
> + .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data),
> + .inversed = 0,
> + .health = true,
> + },
> +};
> +
> +static
> +struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ng800_hi171_data = {
> + .items = mlxplat_mlxcpld_ng800_hi171_items,
> + .count = ARRAY_SIZE(mlxplat_mlxcpld_ng800_hi171_items),
> + .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
> + .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX,
> + .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
> + .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2,
> +};
> +
> /* Platform led default data */
> static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
> {
> @@ -4528,6 +4582,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
> .mask = GENMASK(7, 0) & ~BIT(4),
> .mode = 0644,
> },
> + {
> + .label = "shutdown_unlock",
> + .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET,
> + .mask = GENMASK(7, 0) & ~BIT(5),
> + .mode = 0644,
> + },
> {
> .label = "erot1_ap_reset",
> .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET,
> @@ -7355,6 +7415,29 @@ static int __init mlxplat_dmi_smart_switch_matched(const struct dmi_system_id *d
> return mlxplat_register_platform_device();
> }
>
> +static int __init mlxplat_dmi_ng400_hi171_matched(const struct dmi_system_id *dmi)
> +{
> + int i;
unsigned int
> +
> + mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
> + mlxplat_mux_num = ARRAY_SIZE(mlxplat_ng800_mux_data);
> + mlxplat_mux_data = mlxplat_ng800_mux_data;
> + mlxplat_hotplug = &mlxplat_mlxcpld_ng800_hi171_data;
> + mlxplat_hotplug->deferred_nr =
> + mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
> + mlxplat_led = &mlxplat_default_ng_led_data;
> + mlxplat_regs_io = &mlxplat_default_ng_regs_io_data;
> + mlxplat_fan = &mlxplat_xdr_fan_data;
> +
> + for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type3); i++)
> + mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type3[i];
> +
> + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
> + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400;
> +
> + return mlxplat_register_platform_device();
> +}
> +
> static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
> {
> .callback = mlxplat_dmi_default_wc_matched,
> @@ -7455,6 +7538,20 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
> DMI_MATCH(DMI_BOARD_NAME, "VMOD0019"),
> },
> },
> + {
> + .callback = mlxplat_dmi_ng400_hi171_matched,
> + .matches = {
> + DMI_MATCH(DMI_BOARD_NAME, "VMOD0022"),
> + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI171"),
> + },
> + },
> + {
> + .callback = mlxplat_dmi_ng400_hi171_matched,
> + .matches = {
> + DMI_MATCH(DMI_BOARD_NAME, "VMOD0022"),
> + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI172"),
> + },
> + },
> {
> .callback = mlxplat_dmi_msn274x_matched,
> .matches = {
>
--
i.
next prev parent reply other threads:[~2025-02-03 14:38 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-24 17:26 [PATCH v5 00/12] platform/mellanox: Add support for new systems, amendments, relocate mlx-platform module Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 01/12] mellanox: Relocate mlx-platform driver Vadim Pasternak
2025-02-04 14:33 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 02/12] platform: mellanox: mlx-platform: Cosmetic changes Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 03/12] platform: mellanox: mlx-platform: Change register name Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 04/12] platform_data/mlxreg: Add capability bit and mask fields Vadim Pasternak
2025-02-03 13:50 ` Ilpo Järvinen
2025-02-10 20:30 ` Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 05/12] platform/mellanox: mlxreg-hotplug: Add support for new flavor of capability registers Vadim Pasternak
2025-02-03 13:47 ` Ilpo Järvinen
2025-02-10 20:30 ` Vadim Pasternak
2025-02-11 14:48 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 06/12] platform/mellanox: Rename field to improve code readability Vadim Pasternak
2025-02-03 13:52 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 07/12] platform/mellanox: mlxreg-dpu: Add initial support for Nvidia DPU Vadim Pasternak
2025-02-03 14:20 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 08/12] platform: mellanox: Introduce support of Nvidia smart switch Vadim Pasternak
2025-02-03 14:32 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 09/12] platform: mellanox: Cosmetic changes to improve code style Vadim Pasternak
2025-02-03 14:35 ` Ilpo Järvinen
2025-01-24 17:26 ` [PATCH v5 10/12] platform: mellanox: mlx-platform: Add support for new Nvidia system Vadim Pasternak
2025-02-03 14:38 ` Ilpo Järvinen [this message]
2025-01-24 17:26 ` [PATCH v5 11/12] platform: mellanox: nvsw-sn2200: Add support for new system flavour Vadim Pasternak
2025-01-24 17:26 ` [PATCH v5 12/12] Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces Vadim Pasternak
2025-02-03 14:40 ` Ilpo Järvinen
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