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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4772fabe2fbsm96917235e9.0.2025.11.03.08.55.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Nov 2025 08:55:15 -0800 (PST) Message-ID: <118d572b-e19d-4762-bcdc-f0e8204be4ea@redhat.com> Date: Mon, 3 Nov 2025 17:55:14 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 11/32] hw/arm/smmuv3: Implement get_viommu_cap() callback To: Shameer Kolothum , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, ddutile@redhat.com, berrange@redhat.com, nathanc@nvidia.com, mochs@nvidia.com, smostafa@google.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, zhangfei.gao@linaro.org, zhenzhong.duan@intel.com, yi.l.liu@intel.com, kjaju@nvidia.com References: <20251031105005.24618-1-skolothumtho@nvidia.com> <20251031105005.24618-12-skolothumtho@nvidia.com> From: Eric Auger In-Reply-To: <20251031105005.24618-12-skolothumtho@nvidia.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: 6y17TURfkYAhMa0-biJRa2SkBJlpl2xj0ZrkXp_ptAY_1762188917 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On 10/31/25 11:49 AM, Shameer Kolothum wrote: > For accelerated SMMUv3, we need nested parent domain creation. Add the > callback support so that VFIO can create a nested parent. > > Reviewed-by: Nicolin Chen > Reviewed-by: Jonathan Cameron > Signed-off-by: Shameer Kolothum > Tested-by: Zhangfei Gao > Signed-off-by: Shameer Kolothum Reviewed-by: Eric Auger Eric > --- > hw/arm/smmuv3-accel.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c > index 550a0496fe..a1d672208f 100644 > --- a/hw/arm/smmuv3-accel.c > +++ b/hw/arm/smmuv3-accel.c > @@ -10,6 +10,7 @@ > #include "qemu/error-report.h" > > #include "hw/arm/smmuv3.h" > +#include "hw/iommu.h" > #include "hw/pci/pci_bridge.h" > #include "hw/pci-host/gpex.h" > #include "hw/vfio/pci.h" > @@ -119,9 +120,21 @@ static AddressSpace *smmuv3_accel_find_add_as(PCIBus *bus, void *opaque, > } > } > > +static uint64_t smmuv3_accel_get_viommu_flags(void *opaque) > +{ > + /* > + * We return VIOMMU_FLAG_WANT_NESTING_PARENT to inform VFIO core to create a > + * nesting parent which is required for accelerated SMMUv3 support. > + * The real HW nested support should be reported from host SMMUv3 and if > + * it doesn't, the nesting parent allocation will fail anyway in VFIO core. > + */ > + return VIOMMU_FLAG_WANT_NESTING_PARENT; > +} > + > static const PCIIOMMUOps smmuv3_accel_ops = { > .supports_address_space = smmuv3_accel_supports_as, > .get_address_space = smmuv3_accel_find_add_as, > + .get_viommu_flags = smmuv3_accel_get_viommu_flags, > }; > > static void smmuv3_accel_as_init(SMMUv3State *s)