From: Eric Auger <eric.auger@linaro.org>
To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org,
qemu-arm@nongnu.org, peter.maydell@linaro.org,
alex.williamson@redhat.com, pranav.sawargaonkar@gmail.com,
p.fedin@samsung.com, pbonzini@redhat.com, agraf@suse.de
Cc: Bharat.Bhushan@freescale.com, suravee.suthikulpanit@amd.com,
christoffer.dall@linaro.org
Subject: [Qemu-devel] [RFC v2 7/8] hw: arm: virt: register reserved IOVA region
Date: Fri, 29 Jan 2016 16:53:48 +0000 [thread overview]
Message-ID: <1454086429-4373-8-git-send-email-eric.auger@linaro.org> (raw)
In-Reply-To: <1454086429-4373-1-git-send-email-eric.auger@linaro.org>
Registers a 16x64kB reserved iova region. Currently this iova
region is used by the host kernel to map host MSI controller frames
(GICv2m, GITS_TRANSLATER). The host kernel needs this iova window
since it cannot program the PCIe device with MSI frame physical
address (as opposed to x86) since the MSI write transactions go
through the IOMMU.
The reserved region is mapped on the platform bus.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
---
RFC v1 -> RFC v2:
- use the platform bus to map the reserved iova region
---
hw/arm/virt.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 3839c68..4b2a891 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -805,7 +805,7 @@ static void create_pcie_irq_map(const VirtBoardInfo *vbi, uint32_t gic_phandle,
}
static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,
- bool use_highmem)
+ bool use_highmem, MemoryRegion **reserved_reg)
{
hwaddr base_mmio = vbi->memmap[VIRT_PCIE_MMIO].base;
hwaddr size_mmio = vbi->memmap[VIRT_PCIE_MMIO].size;
@@ -920,10 +920,16 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,
qemu_fdt_setprop_cell(vbi->fdt, nodename, "#interrupt-cells", 1);
create_pcie_irq_map(vbi, vbi->gic_phandle, irq, nodename);
+ /* initialize the reserved iova region for MSI binding (16 x 64kb) */
+ *reserved_reg = g_new0(MemoryRegion, 1);
+ memory_region_init_reserved_iova(*reserved_reg, OBJECT(dev),
+ "reserved-iova",
+ 0x100000, &error_fatal);
+
g_free(nodename);
}
-static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic)
+static PlatformBusDevice *create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic)
{
DeviceState *dev;
SysBusDevice *s;
@@ -962,6 +968,7 @@ static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic)
memory_region_add_subregion(sysmem,
platform_bus_params.platform_bus_base,
sysbus_mmio_get_region(s, 0));
+ return PLATFORM_BUS_DEVICE(dev);
}
static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
@@ -1015,7 +1022,7 @@ static void machvirt_init(MachineState *machine)
VirtMachineState *vms = VIRT_MACHINE(machine);
qemu_irq pic[NUM_IRQS];
MemoryRegion *sysmem = get_system_memory();
- MemoryRegion *secure_sysmem = NULL;
+ MemoryRegion *secure_sysmem = NULL, *reserved_reg;
int gic_version = vms->gic_version;
int n, max_cpus;
MemoryRegion *ram = g_new(MemoryRegion, 1);
@@ -1024,6 +1031,7 @@ static void machvirt_init(MachineState *machine)
VirtGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);
VirtGuestInfo *guest_info = &guest_info_state->info;
char **cpustr;
+ PlatformBusDevice *pbus;
if (!cpu_model) {
cpu_model = "cortex-a15";
@@ -1161,7 +1169,7 @@ static void machvirt_init(MachineState *machine)
create_rtc(vbi, pic);
- create_pcie(vbi, pic, vms->highmem);
+ create_pcie(vbi, pic, vms->highmem, &reserved_reg);
create_gpio(vbi, pic);
@@ -1200,7 +1208,8 @@ static void machvirt_init(MachineState *machine)
* another notifier is registered which adds platform bus nodes.
* Notifiers are executed in registration reverse order.
*/
- create_platform_bus(vbi, pic);
+ pbus = create_platform_bus(vbi, pic);
+ platform_bus_map_region(pbus, reserved_reg);
}
static bool virt_get_secure(Object *obj, Error **errp)
--
1.9.1
next prev parent reply other threads:[~2016-01-29 16:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-29 16:53 [Qemu-arm] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 1/8] linux-headers: partial update for VFIO reserved IOVA registration Eric Auger
2016-01-29 16:53 ` [Qemu-devel] [RFC v2 2/8] Add a function to determine interrupt number for INTx routing Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 3/8] Generic PCIe host bridge INTx determination " Eric Auger
2016-02-16 18:14 ` Peter Maydell
2016-02-18 18:15 ` Eric Auger
2016-01-29 16:53 ` [Qemu-devel] [RFC v2 4/8] hw: vfio: common: introduce vfio_register_reserved_iova Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 5/8] memory: add reserved_iova region type Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 6/8] hw: platform-bus: enable to map any memory region onto the platform-bus Eric Auger
2016-02-16 18:16 ` Peter Maydell
2016-01-29 16:53 ` Eric Auger [this message]
2016-02-16 18:21 ` [Qemu-arm] [RFC v2 7/8] hw: arm: virt: register reserved IOVA region Peter Maydell
2016-02-18 18:48 ` Eric Auger
2016-01-29 16:53 ` [Qemu-arm] [RFC v2 8/8] hw: vfio: common: adapt vfio_listeners for reserved_iova region Eric Auger
2016-02-16 18:23 ` [Qemu-arm] [RFC v2 0/8] KVM PCI/MSI passthrough with mach-virt Peter Maydell
2016-05-04 11:18 ` [Qemu-devel] " Yehuda Yitschak
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