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Somlo" To: qemu-devel@nongnu.org Date: Thu, 11 Feb 2016 17:06:03 -0500 Message-Id: <1455228365-13666-4-git-send-email-somlo@cmu.edu> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1455228365-13666-1-git-send-email-somlo@cmu.edu> References: <1455228365-13666-1-git-send-email-somlo@cmu.edu> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Scanned-By: MIMEDefang 2.74 on 128.2.157.21 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by relay.andrew.cmu.edu id u1BM6636030587 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 128.2.157.21 Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, matt@codeblueprint.co.uk, stefanha@gmail.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, luto@amacapital.net, qemu-arm@nongnu.org, kraxel@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, lersek@redhat.com, rth@twiddle.net Subject: [Qemu-arm] [PATCH v8 3/5] acpi: pc: add fw_cfg device node to dsdt X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: 8+NicvfJosA3 Add a fw_cfg device node to the ACPI DSDT. While the guest-side firmware can't utilize this information (since it has to access the hard-coded fw_cfg device to extract ACPI tables to begin with), having fw_cfg listed in ACPI will help the guest kernel keep a more accurate inventory of in-use IO port regions. Signed-off-by: Gabriel Somlo Reviewed-by: Laszlo Ersek Reviewed-by: Marc Mar=C3=AD --- hw/i386/acpi-build.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4554eb8..4762fd2 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2190,6 +2190,35 @@ build_dsdt(GArray *table_data, GArray *linker, aml_append(scope, aml_name_decl("_S5", pkg)); aml_append(dsdt, scope); =20 + /* create fw_cfg node, unconditionally */ + { + /* when using port i/o, the 8-bit data register *always* overlap= s + * with half of the 16-bit control register. Hence, the total si= ze + * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, th= e + * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */ + uint8_t io_size =3D object_property_get_bool(OBJECT(pcms->fw_cfg= ), + "dma_enabled", NULL) = ? + ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr= _t) : + FW_CFG_CTL_SIZE; + + scope =3D aml_scope("\\_SB"); + dev =3D aml_device("FWCF"); + + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + + crs =3D aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, i= o_size) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + + aml_append(scope, dev); + aml_append(dsdt, scope); + } + if (misc->applesmc_io_base) { scope =3D aml_scope("\\_SB.PCI0.ISA"); dev =3D aml_device("SMC"); --=20 2.4.3