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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4773c2e677csm163887905e9.3.2025.11.03.08.30.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Nov 2025 08:30:35 -0800 (PST) Message-ID: <1d2570cc-02f4-41c5-ba5a-0ceca8a732e5@redhat.com> Date: Mon, 3 Nov 2025 17:30:33 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 06/32] hw/arm/smmuv3-accel: Initialize shared system address space To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Shameer Kolothum , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, ddutile@redhat.com, berrange@redhat.com, nathanc@nvidia.com, mochs@nvidia.com, smostafa@google.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, zhangfei.gao@linaro.org, zhenzhong.duan@intel.com, yi.l.liu@intel.com, kjaju@nvidia.com, Peter Xu , Mark Cave-Ayland References: <20251031105005.24618-1-skolothumtho@nvidia.com> <20251031105005.24618-7-skolothumtho@nvidia.com> From: Eric Auger In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: x6OYgwikWs6zGIRWBZ50YC7dbo5pSDiuKIpIn6q-GVE_1762187437 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On 11/3/25 2:39 PM, Philippe Mathieu-Daudé wrote: > Hi, > > On 31/10/25 11:49, Shameer Kolothum wrote: >> To support accelerated SMMUv3 instances, introduce a shared system-wide >> AddressSpace (shared_as_sysmem) that aliases the global system memory. >> This shared AddressSpace will be used in a subsequent patch for all >> vfio-pci devices behind all accelerated SMMUv3 instances within a VM. >> >> Signed-off-by: Shameer Kolothum >> --- >>   hw/arm/smmuv3-accel.c | 27 +++++++++++++++++++++++++++ >>   1 file changed, 27 insertions(+) >> >> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c >> index 99ef0db8c4..f62b6cf2c9 100644 >> --- a/hw/arm/smmuv3-accel.c >> +++ b/hw/arm/smmuv3-accel.c >> @@ -11,6 +11,15 @@ >>   #include "hw/arm/smmuv3.h" >>   #include "smmuv3-accel.h" >>   +/* >> + * The root region aliases the global system memory, and >> shared_as_sysmem >> + * provides a shared Address Space referencing it. This Address >> Space is used >> + * by all vfio-pci devices behind all accelerated SMMUv3 instances >> within a VM. >> + */ >> +MemoryRegion root; >> +MemoryRegion sysmem; > > Why can't we store that in SMMUv3State? > >> +static AddressSpace *shared_as_sysmem; We will have several instances of SMMUv3State which all share the same as, hence the choice of having a global. Eric > > FYI we have object_resolve_type_unambiguous() to check whether an > instance exists only once (singleton). > >> + >>   static SMMUv3AccelDevice *smmuv3_accel_get_dev(SMMUState *bs, >> SMMUPciBus *sbus, >>                                                  PCIBus *bus, int devfn) >>   { >> @@ -51,9 +60,27 @@ static const PCIIOMMUOps smmuv3_accel_ops = { >>       .get_address_space = smmuv3_accel_find_add_as, >>   }; >>   +static void smmuv3_accel_as_init(SMMUv3State *s) >> +{ >> + >> +    if (shared_as_sysmem) { >> +        return; >> +    } >> + >> +    memory_region_init(&root, OBJECT(s), "root", UINT64_MAX); >> +    memory_region_init_alias(&sysmem, OBJECT(s), "smmuv3-accel-sysmem", >> +                             get_system_memory(), 0, >> +                             memory_region_size(get_system_memory())); >> +    memory_region_add_subregion(&root, 0, &sysmem); >> + >> +    shared_as_sysmem = g_new0(AddressSpace, 1); >> +    address_space_init(shared_as_sysmem, &root, >> "smmuv3-accel-as-sysmem"); >> +} >> + >>   void smmuv3_accel_init(SMMUv3State *s) >>   { >>       SMMUState *bs = ARM_SMMU(s); >>         bs->iommu_ops = &smmuv3_accel_ops; >> +    smmuv3_accel_as_init(s); >>   } >