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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: qemu-arm@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Jason Wang" <jasowang@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, yurovsky@gmail.com
Subject: [Qemu-arm] [PATCH v4 11/14] ARM: Add basic code to emulate A7MPCore DAP block
Date: Mon, 15 Jan 2018 17:37:06 -0800	[thread overview]
Message-ID: <20180116013709.13830-12-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20180116013709.13830-1-andrew.smirnov@gmail.com>

Add minimal code to emulate A7MPCore DAP block needed to boot Linux
guest.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 hw/arm/Makefile.objs       |   2 +-
 hw/arm/coresight.c         | 120 +++++++++++++++++++++++++++++++++++++++++++++
 include/hw/arm/coresight.h |  24 +++++++++
 3 files changed, 145 insertions(+), 1 deletion(-)
 create mode 100644 hw/arm/coresight.c
 create mode 100644 include/hw/arm/coresight.h

diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 2794e086d6..692216e0cf 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -1,4 +1,4 @@
-obj-y += boot.o collie.o exynos4_boards.o gumstix.o highbank.o
+obj-y += boot.o collie.o exynos4_boards.o gumstix.o highbank.o coresight.o
 obj-$(CONFIG_DIGIC) += digic_boards.o
 obj-y += integratorcp.o mainstone.o musicpal.o nseries.o
 obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o
diff --git a/hw/arm/coresight.c b/hw/arm/coresight.c
new file mode 100644
index 0000000000..d0a8c1b005
--- /dev/null
+++ b/hw/arm/coresight.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * CoreSight block emulation code
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/arm/coresight.h"
+#include "qemu/log.h"
+
+static uint64_t coresight_read(void *opaque, hwaddr offset,
+                               unsigned size)
+{
+    return 0;
+}
+
+static void coresight_write(void *opaque, hwaddr offset,
+                            uint64_t value, unsigned size)
+{
+}
+
+static const struct MemoryRegionOps coresight_ops = {
+    .read = coresight_read,
+    .write = coresight_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,
+    .impl = {
+        /*
+         * Our device would not work correctly if the guest was doing
+         * unaligned access. This might not be a limitation on the real
+         * device but in practice there is no reason for a guest to access
+         * this device unaligned.
+         */
+        .min_access_size = 4,
+        .max_access_size = 4,
+        .unaligned = false,
+    },
+};
+
+static void a7mpcore_dap_init(Object *obj)
+{
+    SysBusDevice *sd = SYS_BUS_DEVICE(obj);
+    A7MPCoreDAPState *s = A7MPCORE_DAP(obj);
+
+    memory_region_init(&s->container, obj, "a7mpcore-dap-container", 0x100000);
+    sysbus_init_mmio(sd, &s->container);
+
+    memory_region_init_io(&s->ca7_atb_funnel,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".ca7-atb-funnel",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x41000, &s->ca7_atb_funnel);
+
+    memory_region_init_io(&s->cpu0_etm,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".cpu0-etm",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x7C000, &s->cpu0_etm);
+
+    memory_region_init_io(&s->atb_funnel,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".atb-funnel",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x83000, &s->atb_funnel);
+
+    memory_region_init_io(&s->tmc_etb,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".tmc-etb",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x84000, &s->tmc_etb);
+
+    memory_region_init_io(&s->tmc_etr,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".tmc-etr",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x86000, &s->tmc_etr);
+
+    memory_region_init_io(&s->tpiu,
+                          obj,
+                          &coresight_ops,
+                          s,
+                          TYPE_A7MPCORE_DAP ".tpiu",
+                          0x1000);
+    memory_region_add_subregion(&s->container, 0x87000, &s->tpiu);
+}
+
+static void a7mpcore_dap_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->desc = "A7MPCore DAP Module";
+}
+
+static const TypeInfo a7mpcore_dap_info = {
+    .name          = TYPE_A7MPCORE_DAP,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(A7MPCoreDAPState),
+    .instance_init = a7mpcore_dap_init,
+    .class_init    = a7mpcore_dap_class_init,
+};
+
+static void coresight_register_type(void)
+{
+    type_register_static(&a7mpcore_dap_info);
+}
+type_init(coresight_register_type)
diff --git a/include/hw/arm/coresight.h b/include/hw/arm/coresight.h
new file mode 100644
index 0000000000..d1480e825b
--- /dev/null
+++ b/include/hw/arm/coresight.h
@@ -0,0 +1,24 @@
+#ifndef CORESIGHT_H
+#define CORESIGHT_H
+
+#include "hw/sysbus.h"
+
+typedef struct A7MPCoreDAPState {
+    /*< private >*/
+    SysBusDevice parent_obj;
+
+    MemoryRegion container;
+
+    MemoryRegion ca7_atb_funnel;
+    MemoryRegion cpu0_etm;
+    MemoryRegion atb_funnel;
+    MemoryRegion tmc_etb;
+    MemoryRegion tmc_etr;
+    MemoryRegion tpiu;
+
+} A7MPCoreDAPState;
+
+#define TYPE_A7MPCORE_DAP "a7mpcore-dap"
+#define A7MPCORE_DAP(obj) OBJECT_CHECK(A7MPCoreDAPState, (obj), TYPE_A7MPCORE_DAP)
+
+#endif /* CORESIGHT_H */
-- 
2.14.3


  parent reply	other threads:[~2018-01-16  1:41 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-16  1:36 [Qemu-arm] [PATCH v4 00/14] Initial i.MX7 support Andrey Smirnov
2018-01-16  1:36 ` [Qemu-arm] [PATCH v4 01/14] sdhci: Add i.MX specific subtype of SDHCI Andrey Smirnov
2018-01-16  1:36 ` [Qemu-arm] [PATCH v4 02/14] hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC Andrey Smirnov
2018-01-31 17:04   ` Philippe Mathieu-Daudé
2018-01-16  1:36 ` [Qemu-arm] [PATCH v4 03/14] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Andrey Smirnov
2018-01-16 14:28   ` [Qemu-devel] " Peter Maydell
2018-01-16  1:36 ` [Qemu-arm] [PATCH v4 04/14] i.MX: Add code to emulate i.MX2 watchdog IP block Andrey Smirnov
2018-01-31 17:07   ` Philippe Mathieu-Daudé
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 05/14] i.MX: Add code to emulate i.MX7 SNVS IP-block Andrey Smirnov
2018-01-31 17:10   ` [Qemu-devel] " Philippe Mathieu-Daudé
2018-02-06 15:12     ` [Qemu-arm] " Andrey Smirnov
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 06/14] i.MX: Add code to emulate GPCv2 IP block Andrey Smirnov
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 07/14] i.MX: Add i.MX7 GPT variant Andrey Smirnov
2018-01-16  4:39   ` Philippe Mathieu-Daudé
2018-01-16 14:29   ` Peter Maydell
2018-01-16  1:37 ` [Qemu-devel] [PATCH v4 08/14] i.MX: Add implementation of i.MX7 GPR IP block Andrey Smirnov
2018-01-16  4:45   ` [Qemu-arm] " Philippe Mathieu-Daudé
2018-01-16 15:05     ` Andrey Smirnov
2018-01-16 14:30   ` Peter Maydell
2018-01-16  1:37 ` [Qemu-devel] [PATCH v4 09/14] pci: Add support for Designware " Andrey Smirnov
2018-01-16 14:34   ` [Qemu-arm] " Peter Maydell
2018-01-17 15:23     ` [Qemu-devel] " Marcel Apfelbaum
2018-01-17 15:35       ` [Qemu-arm] " Peter Maydell
2018-01-17 16:12         ` Marcel Apfelbaum
2018-01-17 16:12       ` Andrey Smirnov
2018-01-17 16:17         ` Marcel Apfelbaum
2018-01-17 16:45         ` Philippe Mathieu-Daudé
2018-01-30 13:18   ` [Qemu-arm] " Marcel Apfelbaum
2018-01-30 17:49     ` Andrey Smirnov
2018-01-31 12:13       ` Marcel Apfelbaum
2018-02-07  4:10         ` Andrey Smirnov
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 10/14] usb: Add basic code to emulate Chipidea USB IP Andrey Smirnov
2018-01-16 14:40   ` Peter Maydell
2018-01-16  1:37 ` Andrey Smirnov [this message]
2018-01-16  4:32   ` [Qemu-devel] [PATCH v4 11/14] ARM: Add basic code to emulate A7MPCore DAP block Philippe Mathieu-Daudé
2018-01-16 14:41     ` Peter Maydell
2018-01-16 15:04     ` [Qemu-arm] " Andrey Smirnov
2018-01-16 16:47       ` [Qemu-devel] " Philippe Mathieu-Daudé
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 12/14] i.MX: Add i.MX7 SOC implementation Andrey Smirnov
2018-01-16 14:42   ` Peter Maydell
2018-01-16  1:37 ` [Qemu-arm] [PATCH v4 13/14] hw/arm: Move virt's PSCI DT fixup code to arm/boot.c Andrey Smirnov
2018-01-16 14:53   ` Peter Maydell
     [not found] ` <20180116013709.13830-15-andrew.smirnov@gmail.com>
2018-01-16 14:52   ` [Qemu-devel] [PATCH v4 14/14] Implement support for i.MX7 Sabre board Peter Maydell
2018-01-16 15:08 ` [Qemu-arm] [PATCH v4 00/14] Initial i.MX7 support Peter Maydell
2018-01-16 15:17   ` [Qemu-devel] " Andrey Smirnov
2018-01-31 17:03 ` Philippe Mathieu-Daudé
2018-02-07  3:59   ` [Qemu-arm] " Andrey Smirnov

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