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Mon, 19 Mar 2018 20:35:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1521491712; bh=odc83z5pIg+u22eyWsBDYUtak6WuBePVe0y6R5fwhz0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=T+TdjxdyqomHJUDblrODahaN/DkeOhdE5UtLqqtrML6tYPxHOZm2v0E7rpbysrWxS SRimsy8dDY5YmKynLjDUkzWj+f0OOuIFKhcPBK5x4/t4t0ueWmF8MKdafDjkXzxIbp BUMR0mGVVcUzTgS8z7gWc2KA7nuAuFAsSe5Hx2Q8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E34EB60312 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=alindsay@codeaurora.org Date: Mon, 19 Mar 2018 16:35:10 -0400 From: Aaron Lindsay To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Message-ID: <20180319203509.GD24561@codeaurora.org> References: <1521232280-13089-1-git-send-email-alindsay@codeaurora.org> <1521232280-13089-2-git-send-email-alindsay@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.96 Subject: Re: [Qemu-arm] [PATCH v3 01/22] target/arm: A53: Initialize PMCEID[01] X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Michael Spradling , Digant Desai , qemu-devel@nongnu.org, Alistair Francis , qemu-arm@nongnu.org Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: XBinR7yYlXRS On Mar 18 23:35, Philippe Mathieu-Daud=E9 wrote: > Hi Aaron, >=20 > On 03/16/2018 09:30 PM, Aaron Lindsay wrote: > > A53 advertises ARM_FEATURE_PMU, but wasn't initializing pmceid[01]. > > pmceid[01] are already being initialized to zero for both A15 and A57= . > >=20 > > Signed-off-by: Aaron Lindsay > > --- > > target/arm/cpu64.c | 2 ++ > > 1 file changed, 2 insertions(+) > >=20 > > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > > index 991d764..8c4db31 100644 > > --- a/target/arm/cpu64.c > > +++ b/target/arm/cpu64.c > > @@ -201,6 +201,8 @@ static void aarch64_a53_initfn(Object *obj) > > cpu->id_isar5 =3D 0x00011121; > > cpu->id_aa64pfr0 =3D 0x00002222; > > cpu->id_aa64dfr0 =3D 0x10305106; > > + cpu->pmceid0 =3D 0x00000000; > > + cpu->pmceid1 =3D 0x00000000; > > cpu->id_aa64isar0 =3D 0x00011120; > > cpu->id_aa64mmfr0 =3D 0x00001122; /* 40 bit physical addr */ > > cpu->dbgdidr =3D 0x3516d000; > >=20 >=20 > Maybe we can move this at a single place in arm_cpu_post_init(): >=20 > if (arm_feature(&cpu->env, ARM_FEATURE_PMU)) { > cpu->pmceid0 =3D 0x00000000; > cpu->pmceid1 =3D 0x00000000; > } I like consolidating the initialization - though I think it can go in arm_cpu_realizefn() with the preexisting PMU-related id_aa64dfr0 initialization since it is constant once you've chosen a type of processor. One of the other patches in this set actually already adds some PMCEID initialization there based on PMCR.N. -Aaron >=20 > Regards, >=20 > Phil. --=20 Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies= , Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.