From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-arm] [PATCH 2/2] target/arm: Tidy condition in disas_simd_two_reg_misc
Date: Tue, 1 May 2018 11:04:55 -0700 [thread overview]
Message-ID: <20180501180455.11214-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180501180455.11214-1-richard.henderson@linaro.org>
Path analysis shows that size == 3 && !is_q has been eliminated.
Fixes: Coverity CID1385853
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 97950dce1a..6d49f30b4a 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11473,7 +11473,11 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
/* All 64-bit element operations can be shared with scalar 2misc */
int pass;
- for (pass = 0; pass < (is_q ? 2 : 1); pass++) {
+ /* Coverity claims (size == 3 && !is_q) has been eliminated
+ * from all paths leading to here.
+ */
+ tcg_debug_assert(is_q);
+ for (pass = 0; pass < 2; pass++) {
TCGv_i64 tcg_op = tcg_temp_new_i64();
TCGv_i64 tcg_res = tcg_temp_new_i64();
--
2.14.3
next prev parent reply other threads:[~2018-05-01 18:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-01 18:04 [Qemu-arm] [PATCH 0/2] target/arm: Coverity fixups Richard Henderson
2018-05-01 18:04 ` [Qemu-arm] [PATCH 1/2] target/arm: Tidy conditions in handle_vec_simd_shri Richard Henderson
2018-05-02 9:46 ` Alex Bennée
2018-05-01 18:04 ` Richard Henderson [this message]
2018-05-02 9:47 ` [Qemu-arm] [PATCH 2/2] target/arm: Tidy condition in disas_simd_two_reg_misc Alex Bennée
2018-05-03 15:05 ` [Qemu-arm] [PATCH 0/2] target/arm: Coverity fixups Peter Maydell
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