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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	David Hildenbrand <david@redhat.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	Max Filippov <jcmvbkbc@gmail.com>, Michael Clark <mjc@sifive.com>,
	Guan Xuetao <gxt@mprc.pku.edu.cn>,
	Yongbok Kim <yongbok.kim@mips.com>,
	Alexander Graf <agraf@suse.de>, "Emilio G. Cota" <cota@braap.org>,
	Richard Henderson <rth@twiddle.net>,
	Artyom Tarasenko <atar4qemu@gmail.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
	Stafford Horne <shorne@gmail.com>,
	David Gibson <david@gibson.dropbear.id.au>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	Cornelia Huck <cohuck@redhat.com>,
	Michael Walle <michael@walle.cc>,
	qemu-ppc@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-arm] [PULL 08/28] target/arm: avoid integer overflow in next_page PC check
Date: Wed,  9 May 2018 10:54:38 -0700	[thread overview]
Message-ID: <20180509175458.15642-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180509175458.15642-1-richard.henderson@linaro.org>

From: "Emilio G. Cota" <cota@braap.org>

If the PC is in the last page of the address space, next_page_start
overflows to 0. Fix it.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate.h |  2 +-
 target/arm/translate.c | 11 +++++------
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/target/arm/translate.h b/target/arm/translate.h
index 4428c98e2e..37a1bba056 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -9,7 +9,7 @@ typedef struct DisasContext {
     DisasContextBase base;
 
     target_ulong pc;
-    target_ulong next_page_start;
+    target_ulong page_start;
     uint32_t insn;
     /* Nonzero if this instruction has been conditionally skipped.  */
     int condjmp;
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ad208867a7..0f6629f745 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9930,7 +9930,7 @@ static bool thumb_insn_is_16bit(DisasContext *s, uint32_t insn)
         return false;
     }
 
-    if ((insn >> 11) == 0x1e && (s->pc < s->next_page_start - 3)) {
+    if ((insn >> 11) == 0x1e && s->pc - s->page_start < TARGET_PAGE_SIZE - 3) {
         /* 0b1111_0xxx_xxxx_xxxx : BL/BLX prefix, and the suffix
          * is not on the next page; we merge this into a 32-bit
          * insn.
@@ -12301,8 +12301,7 @@ static int arm_tr_init_disas_context(DisasContextBase *dcbase,
     dc->is_ldex = false;
     dc->ss_same_el = false; /* Can't be true since EL_d must be AArch64 */
 
-    dc->next_page_start =
-        (dc->base.pc_first & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
+    dc->page_start = dc->base.pc_first & TARGET_PAGE_MASK;
 
     /* If architectural single step active, limit to 1.  */
     if (is_singlestepping(dc)) {
@@ -12312,7 +12311,7 @@ static int arm_tr_init_disas_context(DisasContextBase *dcbase,
     /* ARM is a fixed-length ISA.  Bound the number of insns to execute
        to those left on the page.  */
     if (!dc->thumb) {
-        int bound = (dc->next_page_start - dc->base.pc_first) / 4;
+        int bound = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
         max_insns = MIN(max_insns, bound);
     }
 
@@ -12584,8 +12583,8 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
      * but isn't very efficient).
      */
     if (dc->base.is_jmp == DISAS_NEXT
-        && (dc->pc >= dc->next_page_start
-            || (dc->pc >= dc->next_page_start - 3
+        && (dc->pc - dc->page_start >= TARGET_PAGE_SIZE
+            || (dc->pc - dc->page_start >= TARGET_PAGE_SIZE - 3
                 && insn_crosses_page(env, dc)))) {
         dc->base.is_jmp = DISAS_TOO_MANY;
     }
-- 
2.17.0


  parent reply	other threads:[~2018-05-09 17:56 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-09 17:54 [Qemu-arm] [PULL 00/28] Bulk target patches Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 01/28] target/riscv: avoid integer overflow in next_page PC check Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 02/28] target/cris: " Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 03/28] target/lm32: " Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 04/28] target/xtensa: " Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 05/28] target/unicore32: " Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 06/28] target/tilegx: " Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 07/28] target/microblaze: " Richard Henderson
2018-05-09 17:54 ` Richard Henderson [this message]
2018-05-09 17:54 ` [Qemu-devel] [PULL 09/28] target/s390x: " Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 10/28] target/mips: " Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 11/28] translator: merge max_insns into DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 12/28] target/sh4: convert to TranslatorOps Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 13/28] target/sparc: convert to DisasJumpType Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 14/28] target/sparc: convert to DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 15/28] target/sparc: convert to TranslatorOps Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 16/28] target/mips: use lookup_and_goto_ptr on BS_STOP Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 17/28] target/mips: convert to DisasJumpType Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 18/28] target/mips: convert to DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 19/28] target/mips: use *ctx for DisasContext Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 20/28] target/mips: convert to TranslatorOps Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 21/28] target/s390x: convert to DisasJumpType Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 22/28] target/s390x: convert to DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 23/28] target/s390x: convert to TranslatorOps Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 24/28] target/openrisc: convert to DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 25/28] target/openrisc: convert to TranslatorOps Richard Henderson
2018-05-09 17:54 ` [Qemu-arm] [PULL 26/28] target/riscv: convert to DisasJumpType Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 27/28] target/riscv: convert to DisasContextBase Richard Henderson
2018-05-09 17:54 ` [Qemu-devel] [PULL 28/28] target/riscv: convert to TranslatorOps Richard Henderson
2018-05-11 16:30 ` [Qemu-arm] [PULL 00/28] Bulk target patches Peter Maydell

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