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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-arm] [PATCH v3b 01/18] target/arm: Extend vec_reg_offset to larger sizes
Date: Wed, 30 May 2018 11:01:03 -0700	[thread overview]
Message-ID: <20180530180120.13355-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180530180120.13355-1-richard.henderson@linaro.org>

Rearrange the arithmetic so that we are agnostic about the total size
of the vector and the size of the element.  This will allow us to index
up to the 32nd byte and with 16-byte elements.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.h | 26 +++++++++++++++++---------
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h
index dd9c09f89b..63d958cf50 100644
--- a/target/arm/translate-a64.h
+++ b/target/arm/translate-a64.h
@@ -67,18 +67,26 @@ static inline void assert_fp_access_checked(DisasContext *s)
 static inline int vec_reg_offset(DisasContext *s, int regno,
                                  int element, TCGMemOp size)
 {
-    int offs = 0;
+    int element_size = 1 << size;
+    int offs = element * element_size;
 #ifdef HOST_WORDS_BIGENDIAN
     /* This is complicated slightly because vfp.zregs[n].d[0] is
-     * still the low half and vfp.zregs[n].d[1] the high half
-     * of the 128 bit vector, even on big endian systems.
-     * Calculate the offset assuming a fully bigendian 128 bits,
-     * then XOR to account for the order of the two 64 bit halves.
+     * still the lowest and vfp.zregs[n].d[15] the highest of the
+     * 256 byte vector, even on big endian systems.
+     *
+     * Calculate the offset assuming fully little-endian,
+     * then XOR to account for the order of the 8-byte units.
+     *
+     * For 16 byte elements, the two 8 byte halves will not form a
+     * host int128 if the host is bigendian, since they're in the
+     * wrong order.  However the only 16 byte operation we have is
+     * a move, so we can ignore this for the moment.  More complicated
+     * operations will have to special case loading and storing from
+     * the zregs array.
      */
-    offs += (16 - ((element + 1) * (1 << size)));
-    offs ^= 8;
-#else
-    offs += element * (1 << size);
+    if (element_size < 8) {
+        offs ^= 8 - element_size;
+    }
 #endif
     offs += offsetof(CPUARMState, vfp.zregs[regno]);
     assert_fp_access_checked(s);
-- 
2.17.0


  reply	other threads:[~2018-05-30 18:05 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-30 18:01 [Qemu-devel] [PATCH v3b 00/18] target/arm: SVE instructions, part 2 Richard Henderson
2018-05-30 18:01 ` Richard Henderson [this message]
2018-06-04 16:47   ` [Qemu-arm] [PATCH v3b 01/18] target/arm: Extend vec_reg_offset to larger sizes Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 02/18] target/arm: Implement SVE Permute - Unpredicated Group Richard Henderson
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 03/18] target/arm: Implement SVE Permute - Predicates Group Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 04/18] target/arm: Implement SVE Permute - Interleaving Group Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 05/18] target/arm: Implement SVE compress active elements Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 06/18] target/arm: Implement SVE conditionally broadcast/extract element Richard Henderson
2018-06-04 16:46   ` [Qemu-arm] " Peter Maydell
2018-06-13  1:02     ` Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 07/18] target/arm: Implement SVE copy to vector (predicated) Richard Henderson
2018-06-04 16:51   ` [Qemu-arm] " Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 08/18] target/arm: Implement SVE reverse within elements Richard Henderson
2018-06-04 16:56   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 09/18] target/arm: Implement SVE vector splice (predicated) Richard Henderson
2018-06-04 17:08   ` [Qemu-arm] " Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 10/18] target/arm: Implement SVE Select Vectors Group Richard Henderson
2018-06-04 17:12   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 11/18] target/arm: Implement SVE Integer Compare - " Richard Henderson
2018-06-04 17:30   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 12/18] target/arm: Implement SVE Integer Compare - Immediate Group Richard Henderson
2018-06-04 17:36   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 13/18] target/arm: Implement SVE Partition Break Group Richard Henderson
2018-06-05 17:10   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 14/18] target/arm: Implement SVE Predicate Count Group Richard Henderson
2018-06-05 17:27   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 15/18] target/arm: Implement SVE Integer Compare - Scalars Group Richard Henderson
2018-06-05 18:02   ` Peter Maydell
2018-06-13  1:27     ` Richard Henderson
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 16/18] target/arm: Implement FDUP/DUP Richard Henderson
2018-06-05 18:05   ` [Qemu-arm] " Peter Maydell
2018-05-30 18:01 ` [Qemu-arm] [PATCH v3b 17/18] target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group Richard Henderson
2018-06-07  8:54   ` Peter Maydell
2018-05-30 18:01 ` [Qemu-devel] [PATCH v3b 18/18] target/arm: Implement SVE Floating Point Arithmetic " Richard Henderson
2018-06-07 10:45   ` [Qemu-arm] " Peter Maydell
2018-06-07 16:41     ` Richard Henderson
2018-05-30 18:23 ` [Qemu-arm] [Qemu-devel] [PATCH v3b 00/18] target/arm: SVE instructions, part 2 no-reply

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