From mboxrd@z Thu Jan 1 00:00:00 1970 Received: by 2002:a5d:4850:0:0:0:0:0 with SMTP id n16csp3175516wrs; Mon, 19 Aug 2019 14:45:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqwnTzR595C+WorFjQuYf1GsGwl2rRjLxKkTJGNaTbCCu9BBcgvD2JGc/tYSEFvEb2j539Pl X-Received: by 2002:a17:906:a990:: with SMTP id jr16mr3027658ejb.272.1566251129278; Mon, 19 Aug 2019 14:45:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566251129; cv=none; d=google.com; s=arc-20160816; b=WDI/LR4GDVBMyaMznFqwDEqvwndUKTEyOB+qGuqr9kL3Do+F9DXaMLFHehvoFCZqp5 3nWyI+Xko4kFdYVPZYoQQIT4EKeFqDs722f6szA1FjLKbbs/fOO39YOhzPhHKkBS00Jo yj+obem3rNHMTzuIxpnVYD31Kdi1//7x/0d2Kxi8wsOHKk1Z7ukS2D/t8zyO6zNhsQQl YJt5NC3fE4AzIX1HFvqF3UCrH2loYM2Gs6mlSN90V1jQZev0bm2ROdJyp8Jq0OqMcspX mYtYAAzcaFxABr9JKqQRc7IWPlckMXkrOU1HUhcbmP7A7gx2j8/B1CfqlwiugwrHHaMK jzpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=4Nawwn1CWQIrW/uHwTKLseXI15oBdHOjRF/v0JlzLb8=; b=ZB0Xmcv4cii9AYpU0o8Q3Mt+WT+YmEHtmQHElyPbw9kZdSwo67krB+Xe8S2GbtbFCS I+6MSkm6PzLAfNL0vV2Mg/9hoUE/wdOymP5Nx5yB0wuBKZA+uBc2ju+5cECeCeHhlDN0 3/ibjTtY9SnzyM2RHpGH7iYMjDbgj8i7DJfmuZvZ8atGxTapkn48x1i6WMsZNhKfaBEy HDcuA7VPdFlj+35zqq4AZg7idUbF4sA8dwB5LyhD0roKFI7JTzOS32Fs1B9OCJ3nj/UZ DA45THFMTjjlup2dLuOlGyt/e+e1S/CZOv2Q+qZVUDAErGh/wX+NcNBICLzsUJ/r7fuF GoKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=oRigrk3o; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m23si4413343ejj.295.2019.08.19.14.45.29 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Aug 2019 14:45:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=oRigrk3o; spf=pass (google.com: domain of qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59014 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzpSx-0002PP-JR for alex.bennee@linaro.org; Mon, 19 Aug 2019 17:45:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58586) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzpLt-0001Ln-IO for qemu-arm@nongnu.org; Mon, 19 Aug 2019 17:38:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hzpLs-00062K-5m for qemu-arm@nongnu.org; Mon, 19 Aug 2019 17:38:09 -0400 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:35165) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hzpLr-00061l-VO for qemu-arm@nongnu.org; Mon, 19 Aug 2019 17:38:08 -0400 Received: by mail-pl1-x641.google.com with SMTP id gn20so1588884plb.2 for ; Mon, 19 Aug 2019 14:38:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4Nawwn1CWQIrW/uHwTKLseXI15oBdHOjRF/v0JlzLb8=; b=oRigrk3owLUYDN0e9JS3SZYVzI3H3b3EZczrFC0wYeRZlcxirqZQhM1nkoGvs4wsQI pD2eH2Ej6Ek7FhRj2I58TTszcKI75RUSnXJw+yIIVbo873ZVhhDG62Oqdsu2gqU/JfBy RKgNjAIFLx10TT4y8nhVaYLL45ej/0j4qE8G0AFNVC35Ldpg1E4pDG1dFTHd/DpUYQ38 0SeiG1bweq+r/H1Vm7DV0ECY9nHDXeZMY4VupVvTOVC8NagFgo9RpgxwtGq4qR8r4ft2 jFoNcz7Y0msWYq2gpwGE6CZ0rUq8ERJhCAcTfEIuoI29BmH3N+EiVo1glVSUdH/0isXO SA2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4Nawwn1CWQIrW/uHwTKLseXI15oBdHOjRF/v0JlzLb8=; b=jeRKmiaI6w8Oaz2MCI4ghWv1ERALLP+b3hsKS8NdxsLoZCH32Krs652De9uUVqciK0 czu4xhs7AudZstvAyreJjBs4kCJDruxCoSGScOPZjPnXD8AKyNP3w4L54Bl+fr+xbbgx ZACPDoZ65tx+Edwy7O6Gpvb/l2G5nKYF9Aw2JDKHK+aN+TzzVOFBM/RscNZix5q3/95A Pl0PFWwZ5MRB2S0z336lUkPtLrfhOchoqJGQ4/8LYK2b9AVTj1qWOkIZKeq2ZtSfiCiG Z6a5MZQ/miUOSXm41lv6xXZakxtmQ/o7VLtOwxnO6J/GHIEVJO/pY7NZ4ErXr6MuKG38 bZ/w== X-Gm-Message-State: APjAAAUHgqFT79DLBWQFP1i7YjO3i6VuSBH1Kn7BXavuOj5QbCSIHOv1 EPJmuIn3I+OJqUDlNVVd/sIJQA== X-Received: by 2002:a17:902:2d03:: with SMTP id o3mr18043863plb.96.1566250687019; Mon, 19 Aug 2019 14:38:07 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id d2sm13446951pjs.21.2019.08.19.14.38.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Aug 2019 14:38:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 19 Aug 2019 14:36:55 -0700 Message-Id: <20190819213755.26175-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190819213755.26175-1-richard.henderson@linaro.org> References: <20190819213755.26175-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-arm] [PATCH v2 08/68] target/arm: Convert Saturating addition and subtraction X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: Ycrklu8VxzKy Signed-off-by: Richard Henderson --- target/arm/translate.c | 75 +++++++++++++++++++++++++++--------------- target/arm/a32.decode | 10 ++++++ target/arm/t32.decode | 9 +++++ 3 files changed, 67 insertions(+), 27 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 82bd207799..b731e08fe4 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8099,6 +8099,48 @@ static bool trans_UMAAL(DisasContext *s, arg_UMAAL *a) return true; } +/* + * Saturating addition and subtraction + */ + +static bool op_qaddsub(DisasContext *s, arg_rrr *a, bool add, bool doub) +{ + TCGv_i32 t0, t1; + + if (s->thumb + ? !arm_dc_feature(s, ARM_FEATURE_THUMB_DSP) + : !ENABLE_ARCH_5TE) { + return false; + } + + t0 = load_reg(s, a->rm); + t1 = load_reg(s, a->rn); + if (doub) { + gen_helper_add_saturate(t1, cpu_env, t1, t1); + } + if (add) { + gen_helper_add_saturate(t0, cpu_env, t0, t1); + } else { + gen_helper_sub_saturate(t0, cpu_env, t0, t1); + } + tcg_temp_free_i32(t1); + store_reg(s, a->rd, t0); + return true; +} + +#define DO_QADDSUB(NAME, ADD, DOUB) \ +static bool trans_##NAME(DisasContext *s, arg_rrr *a) \ +{ \ + return op_qaddsub(s, a, ADD, DOUB); \ +} + +DO_QADDSUB(QADD, true, false) +DO_QADDSUB(QSUB, false, false) +DO_QADDSUB(QDADD, true, true) +DO_QADDSUB(QDSUB, false, true) + +#undef DO_QADDSUB + /* * Legacy decoder. */ @@ -8508,21 +8550,10 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) store_reg(s, rd, tmp); break; } - case 0x5: /* saturating add/subtract */ - ARCH(5TE); - rd = (insn >> 12) & 0xf; - rn = (insn >> 16) & 0xf; - tmp = load_reg(s, rm); - tmp2 = load_reg(s, rn); - if (op1 & 2) - gen_helper_add_saturate(tmp2, cpu_env, tmp2, tmp2); - if (op1 & 1) - gen_helper_sub_saturate(tmp, cpu_env, tmp, tmp2); - else - gen_helper_add_saturate(tmp, cpu_env, tmp, tmp2); - tcg_temp_free_i32(tmp2); - store_reg(s, rd, tmp); - break; + case 0x5: + /* Saturating addition and subtraction. */ + /* All done in decodetree. Reach here for illegal ops. */ + goto illegal_op; case 0x6: /* ERET */ if (op1 != 3) { goto illegal_op; @@ -9989,18 +10020,8 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) op = ((insn >> 17) & 0x38) | ((insn >> 4) & 7); if (op < 4) { /* Saturating add/subtract. */ - if (!arm_dc_feature(s, ARM_FEATURE_THUMB_DSP)) { - goto illegal_op; - } - tmp = load_reg(s, rn); - tmp2 = load_reg(s, rm); - if (op & 1) - gen_helper_add_saturate(tmp, cpu_env, tmp, tmp); - if (op & 2) - gen_helper_sub_saturate(tmp, cpu_env, tmp2, tmp); - else - gen_helper_add_saturate(tmp, cpu_env, tmp, tmp2); - tcg_temp_free_i32(tmp2); + /* All done in decodetree. Reach here for illegal ops. */ + goto illegal_op; } else { switch (op) { case 0x0a: /* rbit */ diff --git a/target/arm/a32.decode b/target/arm/a32.decode index 87bbb2eec2..7791be5590 100644 --- a/target/arm/a32.decode +++ b/target/arm/a32.decode @@ -27,6 +27,7 @@ &s_rri_rot s rn rd imm rot &s_rrrr s rd rn rm ra &rrrr rd rn rm ra +&rrr rd rn rm # Data-processing (register) @@ -122,3 +123,12 @@ UMULL .... 0000 100 . .... .... .... 1001 .... @s_rdamn UMLAL .... 0000 101 . .... .... .... 1001 .... @s_rdamn SMULL .... 0000 110 . .... .... .... 1001 .... @s_rdamn SMLAL .... 0000 111 . .... .... .... 1001 .... @s_rdamn + +# Saturating addition and subtraction + +@rndm ---- .... .... rn:4 rd:4 .... .... rm:4 &rrr + +QADD .... 0001 0000 .... .... 0000 0101 .... @rndm +QSUB .... 0001 0010 .... .... 0000 0101 .... @rndm +QDADD .... 0001 0100 .... .... 0000 0101 .... @rndm +QDSUB .... 0001 0110 .... .... 0000 0101 .... @rndm diff --git a/target/arm/t32.decode b/target/arm/t32.decode index 40cc69aee3..7c6226e0af 100644 --- a/target/arm/t32.decode +++ b/target/arm/t32.decode @@ -24,6 +24,7 @@ &s_rri_rot !extern s rn rd imm rot &s_rrrr !extern s rd rn rm ra &rrrr !extern rd rn rm ra +&rrr !extern rd rn rm # Data-processing (register) @@ -117,6 +118,7 @@ RSB_rri 1111 0.0 1110 . .... 0 ... .... ........ @s_rri_rot @s0_rnadm .... .... .... rn:4 ra:4 rd:4 .... rm:4 &s_rrrr s=0 @s0_rn0dm .... .... .... rn:4 .... rd:4 .... rm:4 &s_rrrr ra=0 s=0 @rnadm .... .... .... rn:4 ra:4 rd:4 .... rm:4 &rrrr +@rndm .... .... .... rn:4 .... rd:4 .... rm:4 &rrr { MUL 1111 1011 0000 .... 1111 .... 0000 .... @s0_rn0dm @@ -128,3 +130,10 @@ UMULL 1111 1011 1010 .... .... .... 0000 .... @s0_rnadm SMLAL 1111 1011 1100 .... .... .... 0000 .... @s0_rnadm UMLAL 1111 1011 1110 .... .... .... 0000 .... @s0_rnadm UMAAL 1111 1011 1110 .... .... .... 0110 .... @rnadm + +# Data-processing (two source registers) + +QADD 1111 1010 1000 .... 1111 .... 1000 .... @rndm +QSUB 1111 1010 1000 .... 1111 .... 1010 .... @rndm +QDADD 1111 1010 1000 .... 1111 .... 1001 .... @rndm +QDSUB 1111 1010 1000 .... 1111 .... 1011 .... @rndm -- 2.17.1