* [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:18 ` Claudio Fontana
2021-01-31 11:50 ` [PATCH v6 02/11] exec: Restrict TCG specific headers Philippe Mathieu-Daudé
` (10 subsequent siblings)
11 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé, Markus Armbruster
Modules are registered early with type_register_static().
We would like to call tcg_enabled() when registering QOM types,
but tcg_enabled() returns tcg_allowed which is a runtime property
initialized later (See commit 2f181fbd5a9 which introduced the
MachineInitPhase in "hw/qdev-core.h" representing the different
phases of machine initialization and commit 0427b6257e2 which
document the initialization order).
As we are only interested if the TCG accelerator is builtin,
regardless of being enabled, introduce the tcg_builtin() helper.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Cc: Markus Armbruster <armbru@redhat.com>
---
include/sysemu/tcg.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h
index 00349fb18a7..6ac5c2ca89d 100644
--- a/include/sysemu/tcg.h
+++ b/include/sysemu/tcg.h
@@ -13,8 +13,10 @@ void tcg_exec_init(unsigned long tb_size, int splitwx);
#ifdef CONFIG_TCG
extern bool tcg_allowed;
#define tcg_enabled() (tcg_allowed)
+#define tcg_builtin() 1
#else
#define tcg_enabled() 0
+#define tcg_builtin() 0
#endif
#endif
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper
2021-01-31 11:50 ` [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper Philippe Mathieu-Daudé
@ 2021-01-31 14:18 ` Claudio Fontana
2021-01-31 15:23 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:18 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell, Markus Armbruster
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> Modules are registered early with type_register_static().
>
> We would like to call tcg_enabled() when registering QOM types,
Hi Philippe,
could this not be controlled by meson at this stage?
On X86, I register the tcg-specific types in tcg/* in modules that are only built for TCG.
Maybe tcg_builtin() is useful anyway, thinking long term at loadable modules,
but there we are interested in whether tcg code is available or not, regardless of whether it's builtin,
or needs to be loaded via a .so plugin..
maybe tcg_available()?
Ciao,
Claudio
> but tcg_enabled() returns tcg_allowed which is a runtime property
> initialized later (See commit 2f181fbd5a9 which introduced the
> MachineInitPhase in "hw/qdev-core.h" representing the different
> phases of machine initialization and commit 0427b6257e2 which
> document the initialization order).
>
> As we are only interested if the TCG accelerator is builtin,
> regardless of being enabled, introduce the tcg_builtin() helper.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> Cc: Markus Armbruster <armbru@redhat.com>
> ---
> include/sysemu/tcg.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h
> index 00349fb18a7..6ac5c2ca89d 100644
> --- a/include/sysemu/tcg.h
> +++ b/include/sysemu/tcg.h
> @@ -13,8 +13,10 @@ void tcg_exec_init(unsigned long tb_size, int splitwx);
> #ifdef CONFIG_TCG
> extern bool tcg_allowed;
> #define tcg_enabled() (tcg_allowed)
> +#define tcg_builtin() 1
> #else
> #define tcg_enabled() 0
> +#define tcg_builtin() 0
> #endif
>
> #endif
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper
2021-01-31 14:18 ` Claudio Fontana
@ 2021-01-31 15:23 ` Philippe Mathieu-Daudé
2021-02-01 14:29 ` Claudio Fontana
0 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 15:23 UTC (permalink / raw)
To: Claudio Fontana, qemu-devel, Eduardo Habkost, Igor Mammedov,
Markus Armbruster
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 3:18 PM, Claudio Fontana wrote:
> On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
>> Modules are registered early with type_register_static().
>>
>> We would like to call tcg_enabled() when registering QOM types,
>
>
> Hi Philippe,
>
> could this not be controlled by meson at this stage?
> On X86, I register the tcg-specific types in tcg/* in modules that are only built for TCG.
>
> Maybe tcg_builtin() is useful anyway, thinking long term at loadable modules,
> but there we are interested in whether tcg code is available or not, regardless of whether it's builtin,
> or needs to be loaded via a .so plugin..
>
> maybe tcg_available()?
The alternatives I found:
- reorder things in vl.c?
- use ugly #ifdef'ry, see this patch:
https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg08037.html
- this earlier approach I previously discarded:
-- >8 --
diff --git a/include/qom/object.h b/include/qom/object.h
index d378f13a116..30590c6fac3 100644
--- a/include/qom/object.h
+++ b/include/qom/object.h
@@ -403,9 +403,12 @@ struct Object
* parent class initialization has occurred, but before the class itself
* is initialized. This is the function to use to undo the effects of
* memcpy from the parent class to the descendants.
- * @class_data: Data to pass to the @class_init,
+ * @class_data: Data to pass to the @class_registerable, @class_init,
* @class_base_init. This can be useful when building dynamic
* classes.
+ * @registerable: This function is called when modules are registered,
+ * prior to any class initialization. When present and returning %false,
+ * the type is not registered, the class is not present (not usable).
* @interfaces: The list of interfaces associated with this type. This
* should point to a static array that's terminated with a zero filled
* element.
@@ -428,6 +431,7 @@ struct TypeInfo
void (*class_base_init)(ObjectClass *klass, void *data);
void *class_data;
+ bool (*registerable)(void *data);
InterfaceInfo *interfaces;
};
diff --git a/qom/object.c b/qom/object.c
index 2fa0119647c..0febaffa12e 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -138,6 +138,10 @@ static TypeImpl *type_new(const TypeInfo *info)
static TypeImpl *type_register_internal(const TypeInfo *info)
{
TypeImpl *ti;
+
+ if (info->registerable && !info->registerable(info->class_data)) {
+ return NULL;
+ }
ti = type_new(info);
type_table_add(ti);
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 990509d3852..1a2b1889da4 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -24,6 +24,7 @@
#include "hw/loader.h"
#include "hw/arm/boot.h"
#include "sysemu/sysemu.h"
+#include "sysemu/tcg.h"
#include "qom/object.h"
#define SMPBOOT_ADDR 0x300 /* this should leave enough space for
ATAGS */
@@ -368,18 +369,26 @@ static void raspi3b_machine_class_init(ObjectClass
*oc, void *data)
};
#endif /* TARGET_AARCH64 */
+static bool raspi_machine_requiring_tcg_accel(void *data)
+{
+ return tcg_builtin();
+}
+
static const TypeInfo raspi_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("raspi0"),
.parent = TYPE_RASPI_MACHINE,
+ .registerable = raspi_machine_requiring_tcg_accel,
.class_init = raspi0_machine_class_init,
}, {
.name = MACHINE_TYPE_NAME("raspi1ap"),
.parent = TYPE_RASPI_MACHINE,
+ .registerable = raspi_machine_requiring_tcg_accel,
.class_init = raspi1ap_machine_class_init,
}, {
.name = MACHINE_TYPE_NAME("raspi2b"),
.parent = TYPE_RASPI_MACHINE,
+ .registerable = raspi_machine_requiring_tcg_accel,
.class_init = raspi2b_machine_class_init,
#ifdef TARGET_AARCH64
}, {
---
>
> Ciao,
>
> Claudio
>
>> but tcg_enabled() returns tcg_allowed which is a runtime property
>> initialized later (See commit 2f181fbd5a9 which introduced the
>> MachineInitPhase in "hw/qdev-core.h" representing the different
>> phases of machine initialization and commit 0427b6257e2 which
>> document the initialization order).
>>
>> As we are only interested if the TCG accelerator is builtin,
>> regardless of being enabled, introduce the tcg_builtin() helper.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Cc: Markus Armbruster <armbru@redhat.com>
>> ---
>> include/sysemu/tcg.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h
>> index 00349fb18a7..6ac5c2ca89d 100644
>> --- a/include/sysemu/tcg.h
>> +++ b/include/sysemu/tcg.h
>> @@ -13,8 +13,10 @@ void tcg_exec_init(unsigned long tb_size, int splitwx);
>> #ifdef CONFIG_TCG
>> extern bool tcg_allowed;
>> #define tcg_enabled() (tcg_allowed)
>> +#define tcg_builtin() 1
>> #else
>> #define tcg_enabled() 0
>> +#define tcg_builtin() 0
>> #endif
>>
>> #endif
>>
>
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper
2021-01-31 15:23 ` Philippe Mathieu-Daudé
@ 2021-02-01 14:29 ` Claudio Fontana
0 siblings, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-02-01 14:29 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel, Eduardo Habkost,
Igor Mammedov, Markus Armbruster
Cc: Fam Zheng, Laurent Vivier, Thomas Huth, kvm, qemu-block,
Peter Maydell, Alex Bennée, Richard Henderson, John Snow,
qemu-arm, Paolo Bonzini, Philippe Mathieu-Daudé,
Richard Henderson
On 1/31/21 4:23 PM, Philippe Mathieu-Daudé wrote:
> On 1/31/21 3:18 PM, Claudio Fontana wrote:
>> On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
>>> Modules are registered early with type_register_static().
>>>
>>> We would like to call tcg_enabled() when registering QOM types,
>>
>>
>> Hi Philippe,
>>
>> could this not be controlled by meson at this stage?
>> On X86, I register the tcg-specific types in tcg/* in modules that are only built for TCG.
>>
>> Maybe tcg_builtin() is useful anyway, thinking long term at loadable modules,
>> but there we are interested in whether tcg code is available or not, regardless of whether it's builtin,
>> or needs to be loaded via a .so plugin..
>>
>> maybe tcg_available()?
>
> The alternatives I found:
>
> - reorder things in vl.c?
>
> - use ugly #ifdef'ry, see this patch:
> https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg08037.html
Not sure it's that ugly,
if it is followed (or replaced by) exporting those pieces to separate files, which are only built by meson on CONFIG_TCG.
I did not try to do it, so you know best of course.
Ciao,
Claudio
>
> - this earlier approach I previously discarded:
>
> -- >8 --
> diff --git a/include/qom/object.h b/include/qom/object.h
> index d378f13a116..30590c6fac3 100644
> --- a/include/qom/object.h
> +++ b/include/qom/object.h
> @@ -403,9 +403,12 @@ struct Object
> * parent class initialization has occurred, but before the class itself
> * is initialized. This is the function to use to undo the effects of
> * memcpy from the parent class to the descendants.
> - * @class_data: Data to pass to the @class_init,
> + * @class_data: Data to pass to the @class_registerable, @class_init,
> * @class_base_init. This can be useful when building dynamic
> * classes.
> + * @registerable: This function is called when modules are registered,
> + * prior to any class initialization. When present and returning %false,
> + * the type is not registered, the class is not present (not usable).
> * @interfaces: The list of interfaces associated with this type. This
> * should point to a static array that's terminated with a zero filled
> * element.
> @@ -428,6 +431,7 @@ struct TypeInfo
> void (*class_base_init)(ObjectClass *klass, void *data);
> void *class_data;
>
> + bool (*registerable)(void *data);
> InterfaceInfo *interfaces;
> };
>
> diff --git a/qom/object.c b/qom/object.c
> index 2fa0119647c..0febaffa12e 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -138,6 +138,10 @@ static TypeImpl *type_new(const TypeInfo *info)
> static TypeImpl *type_register_internal(const TypeInfo *info)
> {
> TypeImpl *ti;
> +
> + if (info->registerable && !info->registerable(info->class_data)) {
> + return NULL;
> + }
> ti = type_new(info);
>
> type_table_add(ti);
>
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index 990509d3852..1a2b1889da4 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -24,6 +24,7 @@
> #include "hw/loader.h"
> #include "hw/arm/boot.h"
> #include "sysemu/sysemu.h"
> +#include "sysemu/tcg.h"
> #include "qom/object.h"
>
> #define SMPBOOT_ADDR 0x300 /* this should leave enough space for
> ATAGS */
> @@ -368,18 +369,26 @@ static void raspi3b_machine_class_init(ObjectClass
> *oc, void *data)
> };
> #endif /* TARGET_AARCH64 */
>
> +static bool raspi_machine_requiring_tcg_accel(void *data)
> +{
> + return tcg_builtin();
> +}
> +
> static const TypeInfo raspi_machine_types[] = {
> {
> .name = MACHINE_TYPE_NAME("raspi0"),
> .parent = TYPE_RASPI_MACHINE,
> + .registerable = raspi_machine_requiring_tcg_accel,
> .class_init = raspi0_machine_class_init,
> }, {
> .name = MACHINE_TYPE_NAME("raspi1ap"),
> .parent = TYPE_RASPI_MACHINE,
> + .registerable = raspi_machine_requiring_tcg_accel,
> .class_init = raspi1ap_machine_class_init,
> }, {
> .name = MACHINE_TYPE_NAME("raspi2b"),
> .parent = TYPE_RASPI_MACHINE,
> + .registerable = raspi_machine_requiring_tcg_accel,
> .class_init = raspi2b_machine_class_init,
> #ifdef TARGET_AARCH64
> }, {
> ---
>
>>
>> Ciao,
>>
>> Claudio
>>
>>> but tcg_enabled() returns tcg_allowed which is a runtime property
>>> initialized later (See commit 2f181fbd5a9 which introduced the
>>> MachineInitPhase in "hw/qdev-core.h" representing the different
>>> phases of machine initialization and commit 0427b6257e2 which
>>> document the initialization order).
>>>
>>> As we are only interested if the TCG accelerator is builtin,
>>> regardless of being enabled, introduce the tcg_builtin() helper.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> Cc: Markus Armbruster <armbru@redhat.com>
>>> ---
>>> include/sysemu/tcg.h | 2 ++
>>> 1 file changed, 2 insertions(+)
>>>
>>> diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h
>>> index 00349fb18a7..6ac5c2ca89d 100644
>>> --- a/include/sysemu/tcg.h
>>> +++ b/include/sysemu/tcg.h
>>> @@ -13,8 +13,10 @@ void tcg_exec_init(unsigned long tb_size, int splitwx);
>>> #ifdef CONFIG_TCG
>>> extern bool tcg_allowed;
>>> #define tcg_enabled() (tcg_allowed)
>>> +#define tcg_builtin() 1
>>> #else
>>> #define tcg_enabled() 0
>>> +#define tcg_builtin() 0
>>> #endif
>>>
>>> #endif
>>>
>>
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 02/11] exec: Restrict TCG specific headers
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:19 ` Claudio Fontana
2021-02-01 13:24 ` Alex Bennée
2021-01-31 11:50 ` [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel Philippe Mathieu-Daudé
` (9 subsequent siblings)
11 siblings, 2 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
Fixes when building with --disable-tcg on ARM:
In file included from target/arm/helper.c:16:
include/exec/helper-proto.h:42:10: fatal error: tcg-runtime.h: No such file or directory
42 | #include "tcg-runtime.h"
| ^~~~~~~~~~~~~~~
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/exec/helper-proto.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
index 659f9298e8f..740bff3bb4d 100644
--- a/include/exec/helper-proto.h
+++ b/include/exec/helper-proto.h
@@ -39,8 +39,10 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
#include "helper.h"
#include "trace/generated-helpers.h"
+#ifdef CONFIG_TCG
#include "tcg-runtime.h"
#include "plugin-helpers.h"
+#endif /* CONFIG_TCG */
#undef IN_HELPER_PROTO
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 02/11] exec: Restrict TCG specific headers
2021-01-31 11:50 ` [PATCH v6 02/11] exec: Restrict TCG specific headers Philippe Mathieu-Daudé
@ 2021-01-31 14:19 ` Claudio Fontana
2021-02-01 13:24 ` Alex Bennée
1 sibling, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:19 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> Fixes when building with --disable-tcg on ARM:
>
> In file included from target/arm/helper.c:16:
> include/exec/helper-proto.h:42:10: fatal error: tcg-runtime.h: No such file or directory
> 42 | #include "tcg-runtime.h"
> | ^~~~~~~~~~~~~~~
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> include/exec/helper-proto.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
> index 659f9298e8f..740bff3bb4d 100644
> --- a/include/exec/helper-proto.h
> +++ b/include/exec/helper-proto.h
> @@ -39,8 +39,10 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
>
> #include "helper.h"
> #include "trace/generated-helpers.h"
> +#ifdef CONFIG_TCG
> #include "tcg-runtime.h"
> #include "plugin-helpers.h"
> +#endif /* CONFIG_TCG */
>
> #undef IN_HELPER_PROTO
>
>
Ok, this would go away when applying the refactoring to ARM though right?
Ie the file should not need including at all later on right?
Anyway:
Reviewed-by: Claudio Fontana <cfontana@suse.de>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 02/11] exec: Restrict TCG specific headers
2021-01-31 11:50 ` [PATCH v6 02/11] exec: Restrict TCG specific headers Philippe Mathieu-Daudé
2021-01-31 14:19 ` Claudio Fontana
@ 2021-02-01 13:24 ` Alex Bennée
1 sibling, 0 replies; 31+ messages in thread
From: Alex Bennée @ 2021-02-01 13:24 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Thomas Huth, Philippe Mathieu-Daudé,
Richard Henderson, Fam Zheng, Claudio Fontana, Paolo Bonzini,
qemu-block, kvm, Laurent Vivier, qemu-arm, Richard Henderson,
John Snow, Peter Maydell
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Fixes when building with --disable-tcg on ARM:
>
> In file included from target/arm/helper.c:16:
> include/exec/helper-proto.h:42:10: fatal error: tcg-runtime.h: No such file or directory
> 42 | #include "tcg-runtime.h"
> | ^~~~~~~~~~~~~~~
I think the problem here is that we have stuff in helper.c which is
needed by non-TCG builds.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> include/exec/helper-proto.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h
> index 659f9298e8f..740bff3bb4d 100644
> --- a/include/exec/helper-proto.h
> +++ b/include/exec/helper-proto.h
> @@ -39,8 +39,10 @@ dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
>
> #include "helper.h"
> #include "trace/generated-helpers.h"
> +#ifdef CONFIG_TCG
> #include "tcg-runtime.h"
> #include "plugin-helpers.h"
> +#endif /* CONFIG_TCG */
If we are including helper-proto.h then we are defining helpers which
are (should be) TCG only.
>
> #undef IN_HELPER_PROTO
--
Alex Bennée
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 01/11] sysemu/tcg: Introduce tcg_builtin() helper Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 02/11] exec: Restrict TCG specific headers Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:21 ` Claudio Fontana
` (2 more replies)
2021-01-31 11:50 ` [PATCH v6 04/11] target/arm: Restrict ARMv5 " Philippe Mathieu-Daudé
` (8 subsequent siblings)
11 siblings, 3 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
Only enable the following ARMv4 CPUs when TCG is available:
- StrongARM (SA1100/1110)
- OMAP1510 (TI925T)
The following machines are no more built when TCG is disabled:
- cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
- sx1 Siemens SX1 (OMAP310) V2
- sx1-v1 Siemens SX1 (OMAP310) V1
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
default-configs/devices/arm-softmmu.mak | 2 --
hw/arm/Kconfig | 4 ++++
target/arm/Kconfig | 4 ++++
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
index 0824e9be795..6ae964c14fd 100644
--- a/default-configs/devices/arm-softmmu.mak
+++ b/default-configs/devices/arm-softmmu.mak
@@ -14,8 +14,6 @@ CONFIG_INTEGRATOR=y
CONFIG_FSL_IMX31=y
CONFIG_MUSICPAL=y
CONFIG_MUSCA=y
-CONFIG_CHEETAH=y
-CONFIG_SX1=y
CONFIG_NSERIES=y
CONFIG_STELLARIS=y
CONFIG_REALVIEW=y
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index f3ecb73a3d8..f2957b33bee 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -31,6 +31,8 @@ config ARM_VIRT
config CHEETAH
bool
+ default y if TCG && ARM
+ select ARM_V4
select OMAP
select TSC210X
@@ -249,6 +251,8 @@ config COLLIE
config SX1
bool
+ default y if TCG && ARM
+ select ARM_V4
select OMAP
config VERSATILE
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index ae89d05c7e5..811e1e81652 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -6,6 +6,10 @@ config AARCH64
bool
select ARM
+config ARM_V4
+ bool
+ depends on TCG && ARM
+
config ARM_V7M
bool
select PTIMER
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel Philippe Mathieu-Daudé
@ 2021-01-31 14:21 ` Claudio Fontana
2021-02-01 17:10 ` Alex Bennée
2021-03-04 11:55 ` Claudio Fontana
2 siblings, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:21 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv4 CPUs when TCG is available:
>
> - StrongARM (SA1100/1110)
> - OMAP1510 (TI925T)
>
> The following machines are no more built when TCG is disabled:
>
> - cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
> - sx1 Siemens SX1 (OMAP310) V2
> - sx1-v1 Siemens SX1 (OMAP310) V1
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 2 --
> hw/arm/Kconfig | 4 ++++
> target/arm/Kconfig | 4 ++++
> 3 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 0824e9be795..6ae964c14fd 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -14,8 +14,6 @@ CONFIG_INTEGRATOR=y
> CONFIG_FSL_IMX31=y
> CONFIG_MUSICPAL=y
> CONFIG_MUSCA=y
> -CONFIG_CHEETAH=y
> -CONFIG_SX1=y
> CONFIG_NSERIES=y
> CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index f3ecb73a3d8..f2957b33bee 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -31,6 +31,8 @@ config ARM_VIRT
>
> config CHEETAH
> bool
> + default y if TCG && ARM
> + select ARM_V4
> select OMAP
> select TSC210X
>
> @@ -249,6 +251,8 @@ config COLLIE
>
> config SX1
> bool
> + default y if TCG && ARM
> + select ARM_V4
> select OMAP
>
> config VERSATILE
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index ae89d05c7e5..811e1e81652 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -6,6 +6,10 @@ config AARCH64
> bool
> select ARM
>
> +config ARM_V4
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
Looks good to me
Acked-by: Claudio Fontana <cfontana@suse.de>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel Philippe Mathieu-Daudé
2021-01-31 14:21 ` Claudio Fontana
@ 2021-02-01 17:10 ` Alex Bennée
2021-03-04 11:55 ` Claudio Fontana
2 siblings, 0 replies; 31+ messages in thread
From: Alex Bennée @ 2021-02-01 17:10 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Thomas Huth, Philippe Mathieu-Daudé,
Richard Henderson, Fam Zheng, Claudio Fontana, Paolo Bonzini,
qemu-block, kvm, Laurent Vivier, qemu-arm, Richard Henderson,
John Snow, Peter Maydell
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv4 CPUs when TCG is available:
>
> - StrongARM (SA1100/1110)
> - OMAP1510 (TI925T)
>
> The following machines are no more built when TCG is disabled:
>
> - cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
> - sx1 Siemens SX1 (OMAP310) V2
> - sx1-v1 Siemens SX1 (OMAP310) V1
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel Philippe Mathieu-Daudé
2021-01-31 14:21 ` Claudio Fontana
2021-02-01 17:10 ` Alex Bennée
@ 2021-03-04 11:55 ` Claudio Fontana
2021-03-04 19:25 ` Philippe Mathieu-Daudé
2 siblings, 1 reply; 31+ messages in thread
From: Claudio Fontana @ 2021-03-04 11:55 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Laurent Vivier, Thomas Huth, kvm, qemu-block,
Peter Maydell, Alex Bennée, Richard Henderson, John Snow,
qemu-arm, Paolo Bonzini, Philippe Mathieu-Daudé,
Richard Henderson
Hi,
I am trying to take these patches,
in the hope that they help with some of the test issues I am having with the kvm-only build,
but they fail with:
target/arm/Kconfig: does not exist in index
so I guess I need the "target/arm/Kconfig" series right, how can I find that one?
Thanks,
Claudio
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv4 CPUs when TCG is available:
>
> - StrongARM (SA1100/1110)
> - OMAP1510 (TI925T)
>
> The following machines are no more built when TCG is disabled:
>
> - cheetah Palm Tungsten|E aka. Cheetah PDA (OMAP310)
> - sx1 Siemens SX1 (OMAP310) V2
> - sx1-v1 Siemens SX1 (OMAP310) V1
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 2 --
> hw/arm/Kconfig | 4 ++++
> target/arm/Kconfig | 4 ++++
> 3 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 0824e9be795..6ae964c14fd 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -14,8 +14,6 @@ CONFIG_INTEGRATOR=y
> CONFIG_FSL_IMX31=y
> CONFIG_MUSICPAL=y
> CONFIG_MUSCA=y
> -CONFIG_CHEETAH=y
> -CONFIG_SX1=y
> CONFIG_NSERIES=y
> CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index f3ecb73a3d8..f2957b33bee 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -31,6 +31,8 @@ config ARM_VIRT
>
> config CHEETAH
> bool
> + default y if TCG && ARM
> + select ARM_V4
> select OMAP
> select TSC210X
>
> @@ -249,6 +251,8 @@ config COLLIE
>
> config SX1
> bool
> + default y if TCG && ARM
> + select ARM_V4
> select OMAP
>
> config VERSATILE
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index ae89d05c7e5..811e1e81652 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -6,6 +6,10 @@ config AARCH64
> bool
> select ARM
>
> +config ARM_V4
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel
2021-03-04 11:55 ` Claudio Fontana
@ 2021-03-04 19:25 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-03-04 19:25 UTC (permalink / raw)
To: Claudio Fontana, qemu-devel
Cc: Fam Zheng, Laurent Vivier, Thomas Huth, kvm, qemu-block,
Peter Maydell, Alex Bennée, Richard Henderson, John Snow,
qemu-arm, Paolo Bonzini, Philippe Mathieu-Daudé,
Richard Henderson
On 3/4/21 12:55 PM, Claudio Fontana wrote:
> Hi,
>
> I am trying to take these patches,
> in the hope that they help with some of the test issues I am having with the kvm-only build,
>
> but they fail with:
>
> target/arm/Kconfig: does not exist in index
>
> so I guess I need the "target/arm/Kconfig" series right, how can I find that one?
See the Based-on in the cover ;)
https://www.mail-archive.com/qemu-block@nongnu.org/msg79924.html
Regards,
Phil.
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 04/11] target/arm: Restrict ARMv5 cpus to TCG accel
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 03/11] target/arm: Restrict ARMv4 cpus to TCG accel Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:22 ` Claudio Fontana
2021-01-31 11:50 ` [PATCH v6 05/11] target/arm: Restrict ARMv6 " Philippe Mathieu-Daudé
` (7 subsequent siblings)
11 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
Only enable the following ARMv5 CPUs when TCG is available:
- ARM926
- ARM946
- ARM1026
- XScale (PXA250/255/260/261/262/270)
The following machines are no more built when TCG is disabled:
- akita Sharp SL-C1000 (Akita) PDA (PXA270)
- ast2500-evb Aspeed AST2500 EVB (ARM1176)
- ast2600-evb Aspeed AST2600 EVB (Cortex A7)
- borzoi Sharp SL-C3100 (Borzoi) PDA (PXA270)
- canon-a1100 Canon PowerShot A1100 IS (ARM946)
- collie Sharp SL-5500 (Collie) PDA (SA-1110)
- connex Gumstix Connex (PXA255)
- g220a-bmc Bytedance G220A BMC (ARM1176)
- imx25-pdk ARM i.MX25 PDK board (ARM926)
- integratorcp ARM Integrator/CP (ARM926EJ-S)
- mainstone Mainstone II (PXA27x)
- musicpal Marvell 88w8618 / MusicPal (ARM926EJ-S)
- palmetto-bmc OpenPOWER Palmetto BMC (ARM926EJ-S)
- realview-eb ARM RealView Emulation Baseboard (ARM926EJ-S)
- romulus-bmc OpenPOWER Romulus BMC (ARM1176)
- sonorapass-bmc OCP SonoraPass BMC (ARM1176)
- spitz Sharp SL-C3000 (Spitz) PDA (PXA270)
- supermicrox11-bmc Supermicro X11 BMC (ARM926EJ-S)
- swift-bmc OpenPOWER Swift BMC (ARM1176)
- tacoma-bmc OpenPOWER Tacoma BMC (Cortex A7)
- terrier Sharp SL-C3200 (Terrier) PDA (PXA270)
- tosa Sharp SL-6000 (Tosa) PDA (PXA255)
- verdex Gumstix Verdex (PXA270)
- versatileab ARM Versatile/AB (ARM926EJ-S)
- versatilepb ARM Versatile/PB (ARM926EJ-S)
- witherspoon-bmc OpenPOWER Witherspoon BMC (ARM1176)
- z2 Zipit Z2 (PXA27x)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
default-configs/devices/arm-softmmu.mak | 12 ------------
hw/arm/realview.c | 5 ++++-
tests/qtest/cdrom-test.c | 6 +++++-
hw/arm/Kconfig | 19 +++++++++++++++++++
target/arm/Kconfig | 4 ++++
5 files changed, 32 insertions(+), 14 deletions(-)
diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
index 6ae964c14fd..0aad35da0c4 100644
--- a/default-configs/devices/arm-softmmu.mak
+++ b/default-configs/devices/arm-softmmu.mak
@@ -10,33 +10,21 @@ CONFIG_ARM_VIRT=y
CONFIG_CUBIEBOARD=y
CONFIG_EXYNOS4=y
CONFIG_HIGHBANK=y
-CONFIG_INTEGRATOR=y
CONFIG_FSL_IMX31=y
-CONFIG_MUSICPAL=y
CONFIG_MUSCA=y
CONFIG_NSERIES=y
CONFIG_STELLARIS=y
CONFIG_REALVIEW=y
-CONFIG_VERSATILE=y
CONFIG_VEXPRESS=y
CONFIG_ZYNQ=y
-CONFIG_MAINSTONE=y
-CONFIG_GUMSTIX=y
-CONFIG_SPITZ=y
-CONFIG_TOSA=y
-CONFIG_Z2=y
CONFIG_NPCM7XX=y
-CONFIG_COLLIE=y
-CONFIG_ASPEED_SOC=y
CONFIG_NETDUINO2=y
CONFIG_NETDUINOPLUS2=y
CONFIG_MPS2=y
CONFIG_RASPI=y
-CONFIG_DIGIC=y
CONFIG_SABRELITE=y
CONFIG_EMCRAFT_SF2=y
CONFIG_MICROBIT=y
-CONFIG_FSL_IMX25=y
CONFIG_FSL_IMX7=y
CONFIG_FSL_IMX6UL=y
CONFIG_ALLWINNER_H3=y
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 0831159d158..2dcf0a4c23e 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -18,6 +18,7 @@
#include "hw/pci/pci.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
+#include "sysemu/tcg.h"
#include "hw/boards.h"
#include "hw/i2c/i2c.h"
#include "exec/address-spaces.h"
@@ -460,7 +461,9 @@ static const TypeInfo realview_pbx_a9_type = {
static void realview_machine_init(void)
{
- type_register_static(&realview_eb_type);
+ if (tcg_builtin()) {
+ type_register_static(&realview_eb_type);
+ }
type_register_static(&realview_eb_mpcore_type);
type_register_static(&realview_pb_a8_type);
type_register_static(&realview_pbx_a9_type);
diff --git a/tests/qtest/cdrom-test.c b/tests/qtest/cdrom-test.c
index 5af944a5fb7..1f1bc26fa7a 100644
--- a/tests/qtest/cdrom-test.c
+++ b/tests/qtest/cdrom-test.c
@@ -222,7 +222,11 @@ int main(int argc, char **argv)
add_cdrom_param_tests(mips64machines);
} else if (g_str_equal(arch, "arm") || g_str_equal(arch, "aarch64")) {
const char *armmachines[] = {
- "realview-eb", "realview-eb-mpcore", "realview-pb-a8",
+#ifdef CONFIG_TCG
+ "realview-eb",
+#endif /* CONFIG_TCG */
+ "realview-eb-mpcore",
+ "realview-pb-a8",
"realview-pbx-a9", "versatileab", "versatilepb", "vexpress-a15",
"vexpress-a9", "virt", NULL
};
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index f2957b33bee..560442bfc5c 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -42,6 +42,8 @@ config CUBIEBOARD
config DIGIC
bool
+ default y if TCG && ARM
+ select ARM_V5
select PTIMER
select PFLASH_CFI02
@@ -72,6 +74,8 @@ config HIGHBANK
config INTEGRATOR
bool
+ default y if TCG && ARM
+ select ARM_V5
select ARM_TIMER
select INTEGRATOR_DEBUG
select PL011 # UART
@@ -84,6 +88,7 @@ config INTEGRATOR
config MAINSTONE
bool
+ default y if TCG && ARM
select PXA2XX
select PFLASH_CFI01
select SMC91C111
@@ -98,6 +103,8 @@ config MUSCA
config MUSICPAL
bool
+ default y if TCG && ARM
+ select ARM_V5
select OR_IRQ
select BITBANG_I2C
select MARVELL_88W8618
@@ -138,6 +145,7 @@ config OMAP
config PXA2XX
bool
+ select ARM_V5
select FRAMEBUFFER
select I2C
select SERIAL
@@ -147,12 +155,14 @@ config PXA2XX
config GUMSTIX
bool
+ default y if TCG && ARM
select PFLASH_CFI01
select SMC91C111
select PXA2XX
config TOSA
bool
+ default y if TCG && ARM
select ZAURUS # scoop
select MICRODRIVE
select PXA2XX
@@ -160,6 +170,7 @@ config TOSA
config SPITZ
bool
+ default y if TCG && ARM
select ADS7846 # touch-screen controller
select MAX111X # A/D converter
select WM8750 # audio codec
@@ -172,6 +183,7 @@ config SPITZ
config Z2
bool
+ default y if TCG && ARM
select PFLASH_CFI01
select WM8750
select PL011 # UART
@@ -245,6 +257,7 @@ config STRONGARM
config COLLIE
bool
+ default y if TCG && ARM
select PFLASH_CFI01
select ZAURUS # scoop
select STRONGARM
@@ -257,6 +270,8 @@ config SX1
config VERSATILE
bool
+ default y if TCG && ARM
+ select ARM_V5
select ARM_TIMER # sp804
select PFLASH_CFI01
select LSI_SCSI_PCI
@@ -376,6 +391,8 @@ config NPCM7XX
config FSL_IMX25
bool
+ default y if TCG && ARM
+ select ARM_V5
select IMX
select IMX_FEC
select IMX_I2C
@@ -402,6 +419,8 @@ config FSL_IMX6
config ASPEED_SOC
bool
+ default y if TCG && ARM
+ select ARM_V5
select DS1338
select FTGMAC100
select I2C
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index 811e1e81652..9b3635617dc 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -10,6 +10,10 @@ config ARM_V4
bool
depends on TCG && ARM
+config ARM_V5
+ bool
+ depends on TCG && ARM
+
config ARM_V7M
bool
select PTIMER
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 04/11] target/arm: Restrict ARMv5 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 04/11] target/arm: Restrict ARMv5 " Philippe Mathieu-Daudé
@ 2021-01-31 14:22 ` Claudio Fontana
0 siblings, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:22 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv5 CPUs when TCG is available:
>
> - ARM926
> - ARM946
> - ARM1026
> - XScale (PXA250/255/260/261/262/270)
>
> The following machines are no more built when TCG is disabled:
>
> - akita Sharp SL-C1000 (Akita) PDA (PXA270)
> - ast2500-evb Aspeed AST2500 EVB (ARM1176)
> - ast2600-evb Aspeed AST2600 EVB (Cortex A7)
> - borzoi Sharp SL-C3100 (Borzoi) PDA (PXA270)
> - canon-a1100 Canon PowerShot A1100 IS (ARM946)
> - collie Sharp SL-5500 (Collie) PDA (SA-1110)
> - connex Gumstix Connex (PXA255)
> - g220a-bmc Bytedance G220A BMC (ARM1176)
> - imx25-pdk ARM i.MX25 PDK board (ARM926)
> - integratorcp ARM Integrator/CP (ARM926EJ-S)
> - mainstone Mainstone II (PXA27x)
> - musicpal Marvell 88w8618 / MusicPal (ARM926EJ-S)
> - palmetto-bmc OpenPOWER Palmetto BMC (ARM926EJ-S)
> - realview-eb ARM RealView Emulation Baseboard (ARM926EJ-S)
> - romulus-bmc OpenPOWER Romulus BMC (ARM1176)
> - sonorapass-bmc OCP SonoraPass BMC (ARM1176)
> - spitz Sharp SL-C3000 (Spitz) PDA (PXA270)
> - supermicrox11-bmc Supermicro X11 BMC (ARM926EJ-S)
> - swift-bmc OpenPOWER Swift BMC (ARM1176)
> - tacoma-bmc OpenPOWER Tacoma BMC (Cortex A7)
> - terrier Sharp SL-C3200 (Terrier) PDA (PXA270)
> - tosa Sharp SL-6000 (Tosa) PDA (PXA255)
> - verdex Gumstix Verdex (PXA270)
> - versatileab ARM Versatile/AB (ARM926EJ-S)
> - versatilepb ARM Versatile/PB (ARM926EJ-S)
> - witherspoon-bmc OpenPOWER Witherspoon BMC (ARM1176)
> - z2 Zipit Z2 (PXA27x)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 12 ------------
> hw/arm/realview.c | 5 ++++-
> tests/qtest/cdrom-test.c | 6 +++++-
> hw/arm/Kconfig | 19 +++++++++++++++++++
> target/arm/Kconfig | 4 ++++
> 5 files changed, 32 insertions(+), 14 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 6ae964c14fd..0aad35da0c4 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -10,33 +10,21 @@ CONFIG_ARM_VIRT=y
> CONFIG_CUBIEBOARD=y
> CONFIG_EXYNOS4=y
> CONFIG_HIGHBANK=y
> -CONFIG_INTEGRATOR=y
> CONFIG_FSL_IMX31=y
> -CONFIG_MUSICPAL=y
> CONFIG_MUSCA=y
> CONFIG_NSERIES=y
> CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> -CONFIG_VERSATILE=y
> CONFIG_VEXPRESS=y
> CONFIG_ZYNQ=y
> -CONFIG_MAINSTONE=y
> -CONFIG_GUMSTIX=y
> -CONFIG_SPITZ=y
> -CONFIG_TOSA=y
> -CONFIG_Z2=y
> CONFIG_NPCM7XX=y
> -CONFIG_COLLIE=y
> -CONFIG_ASPEED_SOC=y
> CONFIG_NETDUINO2=y
> CONFIG_NETDUINOPLUS2=y
> CONFIG_MPS2=y
> CONFIG_RASPI=y
> -CONFIG_DIGIC=y
> CONFIG_SABRELITE=y
> CONFIG_EMCRAFT_SF2=y
> CONFIG_MICROBIT=y
> -CONFIG_FSL_IMX25=y
> CONFIG_FSL_IMX7=y
> CONFIG_FSL_IMX6UL=y
> CONFIG_ALLWINNER_H3=y
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 0831159d158..2dcf0a4c23e 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -18,6 +18,7 @@
> #include "hw/pci/pci.h"
> #include "net/net.h"
> #include "sysemu/sysemu.h"
> +#include "sysemu/tcg.h"
> #include "hw/boards.h"
> #include "hw/i2c/i2c.h"
> #include "exec/address-spaces.h"
> @@ -460,7 +461,9 @@ static const TypeInfo realview_pbx_a9_type = {
>
> static void realview_machine_init(void)
> {
> - type_register_static(&realview_eb_type);
> + if (tcg_builtin()) {
> + type_register_static(&realview_eb_type);
> + }
> type_register_static(&realview_eb_mpcore_type);
> type_register_static(&realview_pb_a8_type);
> type_register_static(&realview_pbx_a9_type);
> diff --git a/tests/qtest/cdrom-test.c b/tests/qtest/cdrom-test.c
> index 5af944a5fb7..1f1bc26fa7a 100644
> --- a/tests/qtest/cdrom-test.c
> +++ b/tests/qtest/cdrom-test.c
> @@ -222,7 +222,11 @@ int main(int argc, char **argv)
> add_cdrom_param_tests(mips64machines);
> } else if (g_str_equal(arch, "arm") || g_str_equal(arch, "aarch64")) {
> const char *armmachines[] = {
> - "realview-eb", "realview-eb-mpcore", "realview-pb-a8",
> +#ifdef CONFIG_TCG
> + "realview-eb",
> +#endif /* CONFIG_TCG */
> + "realview-eb-mpcore",
> + "realview-pb-a8",
> "realview-pbx-a9", "versatileab", "versatilepb", "vexpress-a15",
> "vexpress-a9", "virt", NULL
> };
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index f2957b33bee..560442bfc5c 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -42,6 +42,8 @@ config CUBIEBOARD
>
> config DIGIC
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select PTIMER
> select PFLASH_CFI02
>
> @@ -72,6 +74,8 @@ config HIGHBANK
>
> config INTEGRATOR
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select ARM_TIMER
> select INTEGRATOR_DEBUG
> select PL011 # UART
> @@ -84,6 +88,7 @@ config INTEGRATOR
>
> config MAINSTONE
> bool
> + default y if TCG && ARM
> select PXA2XX
> select PFLASH_CFI01
> select SMC91C111
> @@ -98,6 +103,8 @@ config MUSCA
>
> config MUSICPAL
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select OR_IRQ
> select BITBANG_I2C
> select MARVELL_88W8618
> @@ -138,6 +145,7 @@ config OMAP
>
> config PXA2XX
> bool
> + select ARM_V5
> select FRAMEBUFFER
> select I2C
> select SERIAL
> @@ -147,12 +155,14 @@ config PXA2XX
>
> config GUMSTIX
> bool
> + default y if TCG && ARM
> select PFLASH_CFI01
> select SMC91C111
> select PXA2XX
>
> config TOSA
> bool
> + default y if TCG && ARM
> select ZAURUS # scoop
> select MICRODRIVE
> select PXA2XX
> @@ -160,6 +170,7 @@ config TOSA
>
> config SPITZ
> bool
> + default y if TCG && ARM
> select ADS7846 # touch-screen controller
> select MAX111X # A/D converter
> select WM8750 # audio codec
> @@ -172,6 +183,7 @@ config SPITZ
>
> config Z2
> bool
> + default y if TCG && ARM
> select PFLASH_CFI01
> select WM8750
> select PL011 # UART
> @@ -245,6 +257,7 @@ config STRONGARM
>
> config COLLIE
> bool
> + default y if TCG && ARM
> select PFLASH_CFI01
> select ZAURUS # scoop
> select STRONGARM
> @@ -257,6 +270,8 @@ config SX1
>
> config VERSATILE
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select ARM_TIMER # sp804
> select PFLASH_CFI01
> select LSI_SCSI_PCI
> @@ -376,6 +391,8 @@ config NPCM7XX
>
> config FSL_IMX25
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select IMX
> select IMX_FEC
> select IMX_I2C
> @@ -402,6 +419,8 @@ config FSL_IMX6
>
> config ASPEED_SOC
> bool
> + default y if TCG && ARM
> + select ARM_V5
> select DS1338
> select FTGMAC100
> select I2C
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index 811e1e81652..9b3635617dc 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -10,6 +10,10 @@ config ARM_V4
> bool
> depends on TCG && ARM
>
> +config ARM_V5
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
Looks good to me
Acked-by: Claudio Fontana <cfontana@suse.de>
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 05/11] target/arm: Restrict ARMv6 cpus to TCG accel
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 04/11] target/arm: Restrict ARMv5 " Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:29 ` Claudio Fontana
2021-02-01 17:18 ` Alex Bennée
2021-01-31 11:50 ` [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile " Philippe Mathieu-Daudé
` (6 subsequent siblings)
11 siblings, 2 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
Only enable the following ARMv6 CPUs when TCG is available:
- ARM1136
- ARM1176
- ARM11MPCore
- Cortex-M0
The following machines are no more built when TCG is disabled:
- kzm ARM KZM Emulation Baseboard (ARM1136)
- microbit BBC micro:bit (Cortex-M0)
- n800 Nokia N800 tablet aka. RX-34 (OMAP2420)
- n810 Nokia N810 tablet aka. RX-44 (OMAP2420)
- realview-eb-mpcore ARM RealView Emulation Baseboard (ARM11MPCore)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
default-configs/devices/arm-softmmu.mak | 2 --
hw/arm/realview.c | 2 +-
tests/qtest/cdrom-test.c | 2 +-
hw/arm/Kconfig | 6 ++++++
target/arm/Kconfig | 4 ++++
5 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
index 0aad35da0c4..175530595ce 100644
--- a/default-configs/devices/arm-softmmu.mak
+++ b/default-configs/devices/arm-softmmu.mak
@@ -10,9 +10,7 @@ CONFIG_ARM_VIRT=y
CONFIG_CUBIEBOARD=y
CONFIG_EXYNOS4=y
CONFIG_HIGHBANK=y
-CONFIG_FSL_IMX31=y
CONFIG_MUSCA=y
-CONFIG_NSERIES=y
CONFIG_STELLARIS=y
CONFIG_REALVIEW=y
CONFIG_VEXPRESS=y
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 2dcf0a4c23e..0606d22da14 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -463,8 +463,8 @@ static void realview_machine_init(void)
{
if (tcg_builtin()) {
type_register_static(&realview_eb_type);
+ type_register_static(&realview_eb_mpcore_type);
}
- type_register_static(&realview_eb_mpcore_type);
type_register_static(&realview_pb_a8_type);
type_register_static(&realview_pbx_a9_type);
}
diff --git a/tests/qtest/cdrom-test.c b/tests/qtest/cdrom-test.c
index 1f1bc26fa7a..cb0409c5a11 100644
--- a/tests/qtest/cdrom-test.c
+++ b/tests/qtest/cdrom-test.c
@@ -224,8 +224,8 @@ int main(int argc, char **argv)
const char *armmachines[] = {
#ifdef CONFIG_TCG
"realview-eb",
-#endif /* CONFIG_TCG */
"realview-eb-mpcore",
+#endif /* CONFIG_TCG */
"realview-pb-a8",
"realview-pbx-a9", "versatileab", "versatilepb", "vexpress-a15",
"vexpress-a9", "virt", NULL
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 560442bfc5c..6c4bce4d637 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -123,6 +123,8 @@ config NETDUINOPLUS2
config NSERIES
bool
+ default y if TCG && ARM
+ select ARM_V6
select OMAP
select TMP105 # tempature sensor
select BLIZZARD # LCD/TV controller
@@ -401,6 +403,8 @@ config FSL_IMX25
config FSL_IMX31
bool
+ default y if TCG && ARM
+ select ARM_V6
select SERIAL
select IMX
select IMX_I2C
@@ -478,11 +482,13 @@ config FSL_IMX6UL
config MICROBIT
bool
+ default y if TCG && ARM
select NRF51_SOC
config NRF51_SOC
bool
select I2C
+ select ARM_V6
select ARM_V7M
select UNIMP
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index 9b3635617dc..fbb7bba9018 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -14,6 +14,10 @@ config ARM_V5
bool
depends on TCG && ARM
+config ARM_V6
+ bool
+ depends on TCG && ARM
+
config ARM_V7M
bool
select PTIMER
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 05/11] target/arm: Restrict ARMv6 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 05/11] target/arm: Restrict ARMv6 " Philippe Mathieu-Daudé
@ 2021-01-31 14:29 ` Claudio Fontana
2021-02-01 17:18 ` Alex Bennée
1 sibling, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:29 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell, Eduardo Habkost
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv6 CPUs when TCG is available:
>
> - ARM1136
> - ARM1176
> - ARM11MPCore
> - Cortex-M0
>
> The following machines are no more built when TCG is disabled:
>
> - kzm ARM KZM Emulation Baseboard (ARM1136)
> - microbit BBC micro:bit (Cortex-M0)
> - n800 Nokia N800 tablet aka. RX-34 (OMAP2420)
> - n810 Nokia N810 tablet aka. RX-44 (OMAP2420)
> - realview-eb-mpcore ARM RealView Emulation Baseboard (ARM11MPCore)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 2 --
> hw/arm/realview.c | 2 +-
> tests/qtest/cdrom-test.c | 2 +-
> hw/arm/Kconfig | 6 ++++++
> target/arm/Kconfig | 4 ++++
> 5 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 0aad35da0c4..175530595ce 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -10,9 +10,7 @@ CONFIG_ARM_VIRT=y
> CONFIG_CUBIEBOARD=y
> CONFIG_EXYNOS4=y
> CONFIG_HIGHBANK=y
> -CONFIG_FSL_IMX31=y
> CONFIG_MUSCA=y
> -CONFIG_NSERIES=y
> CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> CONFIG_VEXPRESS=y
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 2dcf0a4c23e..0606d22da14 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -463,8 +463,8 @@ static void realview_machine_init(void)
> {
> if (tcg_builtin()) {
> type_register_static(&realview_eb_type);
> + type_register_static(&realview_eb_mpcore_type);
> }
> - type_register_static(&realview_eb_mpcore_type);
> type_register_static(&realview_pb_a8_type);
> type_register_static(&realview_pbx_a9_type);
> }
> diff --git a/tests/qtest/cdrom-test.c b/tests/qtest/cdrom-test.c
> index 1f1bc26fa7a..cb0409c5a11 100644
> --- a/tests/qtest/cdrom-test.c
> +++ b/tests/qtest/cdrom-test.c
> @@ -224,8 +224,8 @@ int main(int argc, char **argv)
> const char *armmachines[] = {
> #ifdef CONFIG_TCG
> "realview-eb",
> -#endif /* CONFIG_TCG */
> "realview-eb-mpcore",
> +#endif /* CONFIG_TCG */
> "realview-pb-a8",
> "realview-pbx-a9", "versatileab", "versatilepb", "vexpress-a15",
> "vexpress-a9", "virt", NULL
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 560442bfc5c..6c4bce4d637 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -123,6 +123,8 @@ config NETDUINOPLUS2
>
> config NSERIES
> bool
> + default y if TCG && ARM
> + select ARM_V6
> select OMAP
> select TMP105 # tempature sensor
> select BLIZZARD # LCD/TV controller
> @@ -401,6 +403,8 @@ config FSL_IMX25
>
> config FSL_IMX31
> bool
> + default y if TCG && ARM
> + select ARM_V6
> select SERIAL
> select IMX
> select IMX_I2C
> @@ -478,11 +482,13 @@ config FSL_IMX6UL
>
> config MICROBIT
> bool
> + default y if TCG && ARM
> select NRF51_SOC
>
> config NRF51_SOC
> bool
> select I2C
> + select ARM_V6
> select ARM_V7M
> select UNIMP
>
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index 9b3635617dc..fbb7bba9018 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -14,6 +14,10 @@ config ARM_V5
> bool
> depends on TCG && ARM
>
> +config ARM_V6
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
Added Cc: Eduardo,
Looks good to me in general,
Acked-by: Claudio Fontana <cfontana@suse.de>
I am just wondering about that if (tcg_builtin()) / (or _available() as I suggest elsewhere),
should we instead use the build system already at this stage, so no such check is necessary?
It could be a successive change, but then tcg_builtin() would be introduced, only to become useless after the proper refactoring is done,
and the build system is used to select the right modules to compile, which would do the registration.
Ciao,
Claudio
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v6 05/11] target/arm: Restrict ARMv6 cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 05/11] target/arm: Restrict ARMv6 " Philippe Mathieu-Daudé
2021-01-31 14:29 ` Claudio Fontana
@ 2021-02-01 17:18 ` Alex Bennée
1 sibling, 0 replies; 31+ messages in thread
From: Alex Bennée @ 2021-02-01 17:18 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, Thomas Huth, Philippe Mathieu-Daudé,
Richard Henderson, Fam Zheng, Claudio Fontana, Paolo Bonzini,
qemu-block, kvm, Laurent Vivier, qemu-arm, Richard Henderson,
John Snow, Peter Maydell
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Only enable the following ARMv6 CPUs when TCG is available:
>
> - ARM1136
> - ARM1176
> - ARM11MPCore
> - Cortex-M0
>
> The following machines are no more built when TCG is disabled:
>
> - kzm ARM KZM Emulation Baseboard (ARM1136)
> - microbit BBC micro:bit (Cortex-M0)
> - n800 Nokia N800 tablet aka. RX-34 (OMAP2420)
> - n810 Nokia N810 tablet aka. RX-44 (OMAP2420)
> - realview-eb-mpcore ARM RealView Emulation Baseboard (ARM11MPCore)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 2 --
> hw/arm/realview.c | 2 +-
> tests/qtest/cdrom-test.c | 2 +-
> hw/arm/Kconfig | 6 ++++++
> target/arm/Kconfig | 4 ++++
> 5 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 0aad35da0c4..175530595ce 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -10,9 +10,7 @@ CONFIG_ARM_VIRT=y
> CONFIG_CUBIEBOARD=y
> CONFIG_EXYNOS4=y
> CONFIG_HIGHBANK=y
> -CONFIG_FSL_IMX31=y
> CONFIG_MUSCA=y
> -CONFIG_NSERIES=y
> CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> CONFIG_VEXPRESS=y
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 2dcf0a4c23e..0606d22da14 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -463,8 +463,8 @@ static void realview_machine_init(void)
> {
> if (tcg_builtin()) {
> type_register_static(&realview_eb_type);
> + type_register_static(&realview_eb_mpcore_type);
> }
> - type_register_static(&realview_eb_mpcore_type);
> type_register_static(&realview_pb_a8_type);
> type_register_static(&realview_pbx_a9_type);
> }
This confuses me - are we even able to run a realview image under KVM?
Surely the whole of realview should be TCG only?
The rest looks fine to me though:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile cpus to TCG accel
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 05/11] target/arm: Restrict ARMv6 " Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 12:42 ` Philippe Mathieu-Daudé
2021-01-31 14:29 ` Claudio Fontana
2021-01-31 11:50 ` [PATCH v6 07/11] target/arm: Restrict ARMv7 M-profile " Philippe Mathieu-Daudé
` (5 subsequent siblings)
11 siblings, 2 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
Beside, KVM only supports A-profile, thus won't be able to run
R-profile cpus.
Only enable the following ARMv7 R-Profile CPUs when TCG is available:
- Cortex-R5
- Cortex-R5F
The following machine is no more built when TCG is disabled:
- xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
default-configs/devices/aarch64-softmmu.mak | 1 -
hw/arm/Kconfig | 2 ++
target/arm/Kconfig | 4 ++++
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/default-configs/devices/aarch64-softmmu.mak b/default-configs/devices/aarch64-softmmu.mak
index 958b1e08e40..a4202f56817 100644
--- a/default-configs/devices/aarch64-softmmu.mak
+++ b/default-configs/devices/aarch64-softmmu.mak
@@ -3,6 +3,5 @@
# We support all the 32 bit boards so need all their config
include arm-softmmu.mak
-CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_XLNX_VERSAL=y
CONFIG_SBSA_REF=y
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 6c4bce4d637..4baf1f97694 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -360,8 +360,10 @@ config STM32F405_SOC
config XLNX_ZYNQMP_ARM
bool
+ default y if TCG && ARM
select AHCI
select ARM_GIC
+ select ARM_V7R
select CADENCE
select DDC
select DPCD
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index fbb7bba9018..4dc96c46520 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -18,6 +18,10 @@ config ARM_V6
bool
depends on TCG && ARM
+config ARM_V7R
+ bool
+ depends on TCG && ARM
+
config ARM_V7M
bool
select PTIMER
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile " Philippe Mathieu-Daudé
@ 2021-01-31 12:42 ` Philippe Mathieu-Daudé
2021-02-01 17:37 ` Alex Bennée
2021-01-31 14:29 ` Claudio Fontana
1 sibling, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 12:42 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Richard Henderson, Fam Zheng, Claudio Fontana,
Paolo Bonzini, qemu-block, Alex Bennée, kvm, Laurent Vivier,
qemu-arm, Richard Henderson, John Snow, Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Beside, KVM only supports A-profile, thus won't be able to run
> R-profile cpus.
>
> Only enable the following ARMv7 R-Profile CPUs when TCG is available:
>
> - Cortex-R5
> - Cortex-R5F
>
> The following machine is no more built when TCG is disabled:
>
> - xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/aarch64-softmmu.mak | 1 -
> hw/arm/Kconfig | 2 ++
> target/arm/Kconfig | 4 ++++
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/default-configs/devices/aarch64-softmmu.mak b/default-configs/devices/aarch64-softmmu.mak
> index 958b1e08e40..a4202f56817 100644
> --- a/default-configs/devices/aarch64-softmmu.mak
> +++ b/default-configs/devices/aarch64-softmmu.mak
> @@ -3,6 +3,5 @@
> # We support all the 32 bit boards so need all their config
> include arm-softmmu.mak
>
> -CONFIG_XLNX_ZYNQMP_ARM=y
> CONFIG_XLNX_VERSAL=y
> CONFIG_SBSA_REF=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 6c4bce4d637..4baf1f97694 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -360,8 +360,10 @@ config STM32F405_SOC
>
> config XLNX_ZYNQMP_ARM
> bool
> + default y if TCG && ARM
The correct line is:
"default y if TCG && AARCH64"
> select AHCI
> select ARM_GIC
> + select ARM_V7R
> select CADENCE
> select DDC
> select DPCD
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index fbb7bba9018..4dc96c46520 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -18,6 +18,10 @@ config ARM_V6
> bool
> depends on TCG && ARM
>
> +config ARM_V7R
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile cpus to TCG accel
2021-01-31 12:42 ` Philippe Mathieu-Daudé
@ 2021-02-01 17:37 ` Alex Bennée
0 siblings, 0 replies; 31+ messages in thread
From: Alex Bennée @ 2021-02-01 17:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Philippe Mathieu-Daudé, qemu-devel, Thomas Huth,
Richard Henderson, Fam Zheng, Claudio Fontana, Paolo Bonzini,
qemu-block, kvm, Laurent Vivier, qemu-arm, Richard Henderson,
John Snow, Peter Maydell
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
>> KVM requires the target cpu to be at least ARMv8 architecture
>> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
>> "target/arm: Remove KVM support for 32-bit Arm hosts").
>>
>> Beside, KVM only supports A-profile, thus won't be able to run
>> R-profile cpus.
>>
>> Only enable the following ARMv7 R-Profile CPUs when TCG is available:
>>
>> - Cortex-R5
>> - Cortex-R5F
>>
>> The following machine is no more built when TCG is disabled:
>>
>> - xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> default-configs/devices/aarch64-softmmu.mak | 1 -
>> hw/arm/Kconfig | 2 ++
>> target/arm/Kconfig | 4 ++++
>> 3 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/default-configs/devices/aarch64-softmmu.mak b/default-configs/devices/aarch64-softmmu.mak
>> index 958b1e08e40..a4202f56817 100644
>> --- a/default-configs/devices/aarch64-softmmu.mak
>> +++ b/default-configs/devices/aarch64-softmmu.mak
>> @@ -3,6 +3,5 @@
>> # We support all the 32 bit boards so need all their config
>> include arm-softmmu.mak
>>
>> -CONFIG_XLNX_ZYNQMP_ARM=y
>> CONFIG_XLNX_VERSAL=y
>> CONFIG_SBSA_REF=y
>> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
>> index 6c4bce4d637..4baf1f97694 100644
>> --- a/hw/arm/Kconfig
>> +++ b/hw/arm/Kconfig
>> @@ -360,8 +360,10 @@ config STM32F405_SOC
>>
>> config XLNX_ZYNQMP_ARM
>> bool
>> + default y if TCG && ARM
>
> The correct line is:
>
> "default y if TCG && AARCH64"
Ahh yes, TIL we had some R-profile cores in QEMU ;-)
with the fix:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile " Philippe Mathieu-Daudé
2021-01-31 12:42 ` Philippe Mathieu-Daudé
@ 2021-01-31 14:29 ` Claudio Fontana
1 sibling, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:29 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Beside, KVM only supports A-profile, thus won't be able to run
> R-profile cpus.
>
> Only enable the following ARMv7 R-Profile CPUs when TCG is available:
>
> - Cortex-R5
> - Cortex-R5F
>
> The following machine is no more built when TCG is disabled:
>
> - xlnx-zcu102 Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/aarch64-softmmu.mak | 1 -
> hw/arm/Kconfig | 2 ++
> target/arm/Kconfig | 4 ++++
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/default-configs/devices/aarch64-softmmu.mak b/default-configs/devices/aarch64-softmmu.mak
> index 958b1e08e40..a4202f56817 100644
> --- a/default-configs/devices/aarch64-softmmu.mak
> +++ b/default-configs/devices/aarch64-softmmu.mak
> @@ -3,6 +3,5 @@
> # We support all the 32 bit boards so need all their config
> include arm-softmmu.mak
>
> -CONFIG_XLNX_ZYNQMP_ARM=y
> CONFIG_XLNX_VERSAL=y
> CONFIG_SBSA_REF=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 6c4bce4d637..4baf1f97694 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -360,8 +360,10 @@ config STM32F405_SOC
>
> config XLNX_ZYNQMP_ARM
> bool
> + default y if TCG && ARM
> select AHCI
> select ARM_GIC
> + select ARM_V7R
> select CADENCE
> select DDC
> select DPCD
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index fbb7bba9018..4dc96c46520 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -18,6 +18,10 @@ config ARM_V6
> bool
> depends on TCG && ARM
>
> +config ARM_V7R
> + bool
> + depends on TCG && ARM
> +
> config ARM_V7M
> bool
> select PTIMER
>
Acked-by: Claudio Fontana <cfontana@suse.de>
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 07/11] target/arm: Restrict ARMv7 M-profile cpus to TCG accel
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 06/11] target/arm: Restrict ARMv7 R-profile " Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 14:30 ` Claudio Fontana
2021-01-31 11:50 ` [PATCH v6 08/11] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M Philippe Mathieu-Daudé
` (4 subsequent siblings)
11 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
KVM requires the target cpu to be at least ARMv8 architecture
(support on ARMv7 has been dropped in commit 82bf7ae84ce:
"target/arm: Remove KVM support for 32-bit Arm hosts").
Beside, KVM only supports A-profile, thus won't be able to run
M-profile cpus.
Only enable the following ARMv7 M-Profile CPUs when TCG is available:
- Cortex-M0
- Cortex-M3
- Cortex-M4
- Cortex-M33
The following machines are no more built when TCG is disabled:
- emcraft-sf2 SmartFusion2 SOM kit from Emcraft (M2S010)
- highbank Calxeda Highbank (ECX-1000)
- lm3s6965evb Stellaris LM3S6965EVB (Cortex-M3)
- lm3s811evb Stellaris LM3S811EVB (Cortex-M3)
- midway Calxeda Midway (ECX-2000)
- mps2-an385 ARM MPS2 with AN385 FPGA image for Cortex-M3
- mps2-an386 ARM MPS2 with AN386 FPGA image for Cortex-M4
- mps2-an500 ARM MPS2 with AN500 FPGA image for Cortex-M7
- mps2-an505 ARM MPS2 with AN505 FPGA image for Cortex-M33
- mps2-an511 ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3
- mps2-an521 ARM MPS2 with AN521 FPGA image for dual Cortex-M33
- musca-a ARM Musca-A board (dual Cortex-M33)
- musca-b1 ARM Musca-B1 board (dual Cortex-M33)
- netduino2 Netduino 2 Machine (Cortex-M3)
- netduinoplus2 Netduino Plus 2 Machine(Cortex-M4)
We don't need to enforce CONFIG_ARM_V7M in default-configs anymore.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
default-configs/devices/arm-softmmu.mak | 11 -----------
hw/arm/Kconfig | 7 +++++++
target/arm/Kconfig | 1 +
3 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
index 175530595ce..0fc80d7d6df 100644
--- a/default-configs/devices/arm-softmmu.mak
+++ b/default-configs/devices/arm-softmmu.mak
@@ -1,28 +1,17 @@
# Default configuration for arm-softmmu
-# TODO: ARM_V7M is currently always required - make this more flexible!
-CONFIG_ARM_V7M=y
-
# CONFIG_PCI_DEVICES=n
# CONFIG_TEST_DEVICES=n
CONFIG_ARM_VIRT=y
CONFIG_CUBIEBOARD=y
CONFIG_EXYNOS4=y
-CONFIG_HIGHBANK=y
-CONFIG_MUSCA=y
-CONFIG_STELLARIS=y
CONFIG_REALVIEW=y
CONFIG_VEXPRESS=y
CONFIG_ZYNQ=y
CONFIG_NPCM7XX=y
-CONFIG_NETDUINO2=y
-CONFIG_NETDUINOPLUS2=y
-CONFIG_MPS2=y
CONFIG_RASPI=y
CONFIG_SABRELITE=y
-CONFIG_EMCRAFT_SF2=y
-CONFIG_MICROBIT=y
CONFIG_FSL_IMX7=y
CONFIG_FSL_IMX6UL=y
CONFIG_ALLWINNER_H3=y
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 4baf1f97694..62f8b0d24e7 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -60,6 +60,7 @@ config EXYNOS4
config HIGHBANK
bool
+ default y if TCG && ARM
select A9MPCORE
select A15MPCORE
select AHCI
@@ -95,6 +96,7 @@ config MAINSTONE
config MUSCA
bool
+ default y if TCG && ARM
select ARMSSE
select PL011
select PL031
@@ -115,10 +117,12 @@ config MUSICPAL
config NETDUINO2
bool
+ default y if TCG && ARM
select STM32F205_SOC
config NETDUINOPLUS2
bool
+ default y if TCG && ARM
select STM32F405_SOC
config NSERIES
@@ -240,6 +244,7 @@ config SABRELITE
config STELLARIS
bool
+ default y if TCG && ARM
select ARM_V7M
select CMSDK_APB_WATCHDOG
select I2C
@@ -443,6 +448,7 @@ config ASPEED_SOC
config MPS2
bool
+ default y if TCG && ARM
select ARMSSE
select LAN9118
select MPS2_FPGAIO
@@ -496,6 +502,7 @@ config NRF51_SOC
config EMCRAFT_SF2
bool
+ default y if TCG && ARM
select MSF2
select SSI_M25P80
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index 4dc96c46520..07a2fad7a2b 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -24,4 +24,5 @@ config ARM_V7R
config ARM_V7M
bool
+ depends on TCG && ARM
select PTIMER
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 07/11] target/arm: Restrict ARMv7 M-profile cpus to TCG accel
2021-01-31 11:50 ` [PATCH v6 07/11] target/arm: Restrict ARMv7 M-profile " Philippe Mathieu-Daudé
@ 2021-01-31 14:30 ` Claudio Fontana
0 siblings, 0 replies; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:30 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Paolo Bonzini, qemu-block, Alex Bennée, kvm,
Laurent Vivier, qemu-arm, Richard Henderson, John Snow,
Peter Maydell
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> KVM requires the target cpu to be at least ARMv8 architecture
> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
> "target/arm: Remove KVM support for 32-bit Arm hosts").
>
> Beside, KVM only supports A-profile, thus won't be able to run
> M-profile cpus.
>
> Only enable the following ARMv7 M-Profile CPUs when TCG is available:
>
> - Cortex-M0
> - Cortex-M3
> - Cortex-M4
> - Cortex-M33
>
> The following machines are no more built when TCG is disabled:
>
> - emcraft-sf2 SmartFusion2 SOM kit from Emcraft (M2S010)
> - highbank Calxeda Highbank (ECX-1000)
> - lm3s6965evb Stellaris LM3S6965EVB (Cortex-M3)
> - lm3s811evb Stellaris LM3S811EVB (Cortex-M3)
> - midway Calxeda Midway (ECX-2000)
> - mps2-an385 ARM MPS2 with AN385 FPGA image for Cortex-M3
> - mps2-an386 ARM MPS2 with AN386 FPGA image for Cortex-M4
> - mps2-an500 ARM MPS2 with AN500 FPGA image for Cortex-M7
> - mps2-an505 ARM MPS2 with AN505 FPGA image for Cortex-M33
> - mps2-an511 ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3
> - mps2-an521 ARM MPS2 with AN521 FPGA image for dual Cortex-M33
> - musca-a ARM Musca-A board (dual Cortex-M33)
> - musca-b1 ARM Musca-B1 board (dual Cortex-M33)
> - netduino2 Netduino 2 Machine (Cortex-M3)
> - netduinoplus2 Netduino Plus 2 Machine(Cortex-M4)
>
> We don't need to enforce CONFIG_ARM_V7M in default-configs anymore.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> default-configs/devices/arm-softmmu.mak | 11 -----------
> hw/arm/Kconfig | 7 +++++++
> target/arm/Kconfig | 1 +
> 3 files changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/default-configs/devices/arm-softmmu.mak b/default-configs/devices/arm-softmmu.mak
> index 175530595ce..0fc80d7d6df 100644
> --- a/default-configs/devices/arm-softmmu.mak
> +++ b/default-configs/devices/arm-softmmu.mak
> @@ -1,28 +1,17 @@
> # Default configuration for arm-softmmu
>
> -# TODO: ARM_V7M is currently always required - make this more flexible!
> -CONFIG_ARM_V7M=y
> -
> # CONFIG_PCI_DEVICES=n
> # CONFIG_TEST_DEVICES=n
>
> CONFIG_ARM_VIRT=y
> CONFIG_CUBIEBOARD=y
> CONFIG_EXYNOS4=y
> -CONFIG_HIGHBANK=y
> -CONFIG_MUSCA=y
> -CONFIG_STELLARIS=y
> CONFIG_REALVIEW=y
> CONFIG_VEXPRESS=y
> CONFIG_ZYNQ=y
> CONFIG_NPCM7XX=y
> -CONFIG_NETDUINO2=y
> -CONFIG_NETDUINOPLUS2=y
> -CONFIG_MPS2=y
> CONFIG_RASPI=y
> CONFIG_SABRELITE=y
> -CONFIG_EMCRAFT_SF2=y
> -CONFIG_MICROBIT=y
> CONFIG_FSL_IMX7=y
> CONFIG_FSL_IMX6UL=y
> CONFIG_ALLWINNER_H3=y
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index 4baf1f97694..62f8b0d24e7 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -60,6 +60,7 @@ config EXYNOS4
>
> config HIGHBANK
> bool
> + default y if TCG && ARM
> select A9MPCORE
> select A15MPCORE
> select AHCI
> @@ -95,6 +96,7 @@ config MAINSTONE
>
> config MUSCA
> bool
> + default y if TCG && ARM
> select ARMSSE
> select PL011
> select PL031
> @@ -115,10 +117,12 @@ config MUSICPAL
>
> config NETDUINO2
> bool
> + default y if TCG && ARM
> select STM32F205_SOC
>
> config NETDUINOPLUS2
> bool
> + default y if TCG && ARM
> select STM32F405_SOC
>
> config NSERIES
> @@ -240,6 +244,7 @@ config SABRELITE
>
> config STELLARIS
> bool
> + default y if TCG && ARM
> select ARM_V7M
> select CMSDK_APB_WATCHDOG
> select I2C
> @@ -443,6 +448,7 @@ config ASPEED_SOC
>
> config MPS2
> bool
> + default y if TCG && ARM
> select ARMSSE
> select LAN9118
> select MPS2_FPGAIO
> @@ -496,6 +502,7 @@ config NRF51_SOC
>
> config EMCRAFT_SF2
> bool
> + default y if TCG && ARM
> select MSF2
> select SSI_M25P80
>
> diff --git a/target/arm/Kconfig b/target/arm/Kconfig
> index 4dc96c46520..07a2fad7a2b 100644
> --- a/target/arm/Kconfig
> +++ b/target/arm/Kconfig
> @@ -24,4 +24,5 @@ config ARM_V7R
>
> config ARM_V7M
> bool
> + depends on TCG && ARM
> select PTIMER
>
Acked-by: Claudio Fontana <cfontana@suse.de>
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v6 08/11] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 07/11] target/arm: Restrict ARMv7 M-profile " Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 09/11] target/arm: Reorder meson.build rules Philippe Mathieu-Daudé
` (3 subsequent siblings)
11 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell,
Philippe Mathieu-Daudé
From: Thomas Huth <thuth@redhat.com>
We've already got the CONFIG_ARM_V7M switch, but it currently can
not be disabled yet. The m_helper.c code should not be compiled
into the binary if the switch is not enabled. We also have to
provide some stubs in a separate file to make sure that we still
can link the other code without CONFIG_ARM_V7M.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20190903154810.27365-4-thuth@redhat.com>
[PMD: Keep m_helper-stub.c but extend it, rewrite the rest]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
Rewrite since v3, therefore removed Richard R-b tag.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/cpu.h | 12 -------
target/arm/cpu_tcg.c | 4 ++-
target/arm/helper.c | 7 ----
target/arm/m_helper-stub.c | 73 ++++++++++++++++++++++++++++++++++++++
target/arm/meson.build | 4 ++-
5 files changed, 79 insertions(+), 21 deletions(-)
create mode 100644 target/arm/m_helper-stub.c
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index d080239863c..0bd0e51e498 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2281,12 +2281,6 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
/* Interface between CPU and Interrupt controller. */
#ifndef CONFIG_USER_ONLY
bool armv7m_nvic_can_take_pending_exception(void *opaque);
-#else
-static inline bool armv7m_nvic_can_take_pending_exception(void *opaque)
-{
- return true;
-}
-#endif
/**
* armv7m_nvic_set_pending: mark the specified exception as pending
* @opaque: the NVIC
@@ -2392,13 +2386,7 @@ int armv7m_nvic_raw_execution_priority(void *opaque);
* @secure: the security state to test
* This corresponds to the pseudocode IsReqExecPriNeg().
*/
-#ifndef CONFIG_USER_ONLY
bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure);
-#else
-static inline bool armv7m_nvic_neg_prio_requested(void *opaque, bool secure)
-{
- return false;
-}
#endif
/* Interface for defining coprocessor registers.
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index 98544db2df3..3e1c9b40353 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -15,6 +15,7 @@
/* CPU models. These are not needed for the AArch64 linux-user build. */
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+#ifndef CONFIG_USER_ONLY
static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
@@ -38,6 +39,7 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
return ret;
}
+#endif /* CONFIG_USER_ONLY */
static void arm926_initfn(Object *obj)
{
@@ -666,9 +668,9 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
acc->info = data;
#ifndef CONFIG_USER_ONLY
cc->do_interrupt = arm_v7m_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
#endif
- cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
cc->gdb_core_xml_file = "arm-m-profile.xml";
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 47e266d7e64..fe3d0291f9c 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12825,13 +12825,6 @@ int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
}
}
-#ifndef CONFIG_TCG
-ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
-{
- g_assert_not_reached();
-}
-#endif
-
ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el)
{
ARMMMUIdx idx;
diff --git a/target/arm/m_helper-stub.c b/target/arm/m_helper-stub.c
new file mode 100644
index 00000000000..6d751424e86
--- /dev/null
+++ b/target/arm/m_helper-stub.c
@@ -0,0 +1,73 @@
+/*
+ * ARM V7M related stubs.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+#include "internals.h"
+
+void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest)
+{
+ g_assert_not_reached();
+}
+
+void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
+{
+ g_assert_not_reached();
+}
+
+uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
+{
+ g_assert_not_reached();
+}
+
+void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val)
+{
+ g_assert_not_reached();
+}
+
+uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op)
+{
+ g_assert_not_reached();
+}
+
+void HELPER(v7m_preserve_fp_state)(CPUARMState *env)
+{
+ g_assert_not_reached();
+}
+
+void write_v7m_exception(CPUARMState *env, uint32_t new_exc)
+{
+ g_assert_not_reached();
+}
+
+void HELPER(v7m_vlldm)(CPUARMState *env, uint32_t fptr)
+{
+ g_assert_not_reached();
+}
+
+void HELPER(v7m_vlstm)(CPUARMState *env, uint32_t fptr)
+{
+ g_assert_not_reached();
+}
+
+ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
+{
+ g_assert_not_reached();
+}
+
+#ifndef CONFIG_USER_ONLY
+
+bool armv7m_nvic_can_take_pending_exception(void *opaque)
+{
+ g_assert_not_reached();
+}
+
+void arm_v7m_cpu_do_interrupt(CPUState *cs)
+{
+ g_assert_not_reached();
+}
+
+#endif /* CONFIG_USER_ONLY */
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 15b936c1010..6c6081966cd 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -21,7 +21,6 @@
'gdbstub.c',
'helper.c',
'iwmmxt_helper.c',
- 'm_helper.c',
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
@@ -32,6 +31,9 @@
))
arm_ss.add(zlib)
+arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c'))
+arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c'))
+
arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c'))
arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH v6 09/11] target/arm: Reorder meson.build rules
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 08/11] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 10/11] target/arm: Do not build TCG objects when TCG is off Philippe Mathieu-Daudé
` (2 subsequent siblings)
11 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Reorder the rules to make this file easier to modify.
No logical change introduced in this commit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
target/arm/meson.build | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 6c6081966cd..aac9a383a61 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -14,31 +14,36 @@
arm_ss = ss.source_set()
arm_ss.add(gen)
+arm_ss.add(zlib)
arm_ss.add(files(
'cpu.c',
- 'crypto_helper.c',
- 'debug_helper.c',
'gdbstub.c',
'helper.c',
+ 'vfp_helper.c',
+))
+
+arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
+ 'cpu64.c',
+ 'gdbstub64.c',
+))
+
+arm_ss.add(files(
+ 'crypto_helper.c',
+ 'debug_helper.c',
'iwmmxt_helper.c',
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
'translate.c',
'vec_helper.c',
- 'vfp_helper.c',
'cpu_tcg.c',
))
-arm_ss.add(zlib)
-
arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c'))
arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c'))
arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c'))
arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
- 'cpu64.c',
- 'gdbstub64.c',
'helper-a64.c',
'mte_helper.c',
'pauth_helper.c',
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH v6 10/11] target/arm: Do not build TCG objects when TCG is off
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 09/11] target/arm: Reorder meson.build rules Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 11:50 ` [PATCH v6 11/11] .travis.yml: Add a KVM-only Aarch64 job Philippe Mathieu-Daudé
2021-01-31 14:40 ` [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Claudio Fontana
11 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell, Samuel Ortiz,
Philippe Mathieu-Daudé
From: Samuel Ortiz <sameo@linux.intel.com>
We can now safely turn all TCG dependent build off when CONFIG_TCG is
off. This allows building ARM binaries with --disable-tcg.
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
[PMD: Heavily rebased during more than 2 years then finally rewritten]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/meson.build | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index aac9a383a61..11b7c0e18fe 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -27,7 +27,8 @@
'gdbstub64.c',
))
-arm_ss.add(files(
+arm_tcg_ss = ss.source_set()
+arm_tcg_ss.add(files(
'crypto_helper.c',
'debug_helper.c',
'iwmmxt_helper.c',
@@ -38,12 +39,12 @@
'vec_helper.c',
'cpu_tcg.c',
))
-arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c'))
+arm_tcg_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('m_helper.c'), if_false: files('m_helper-stub.c'))
arm_ss.add(when: 'CONFIG_TCG', if_false: files('m_helper-stub.c'))
arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c'))
-arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
+arm_tcg_ss.add(when: 'TARGET_AARCH64', if_true: files(
'helper-a64.c',
'mte_helper.c',
'pauth_helper.c',
@@ -52,14 +53,16 @@
'translate-sve.c',
))
+arm_ss.add_all(when: 'CONFIG_TCG', if_true: arm_tcg_ss)
+
arm_softmmu_ss = ss.source_set()
arm_softmmu_ss.add(files(
'arch_dump.c',
'arm-powerctl.c',
'machine.c',
'monitor.c',
- 'psci.c',
))
+arm_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('psci.c'))
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PATCH v6 11/11] .travis.yml: Add a KVM-only Aarch64 job
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 10/11] target/arm: Do not build TCG objects when TCG is off Philippe Mathieu-Daudé
@ 2021-01-31 11:50 ` Philippe Mathieu-Daudé
2021-01-31 11:57 ` Philippe Mathieu-Daudé
2021-01-31 14:40 ` [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Claudio Fontana
11 siblings, 1 reply; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:50 UTC (permalink / raw)
To: qemu-devel
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini, qemu-block,
Alex Bennée, kvm, Laurent Vivier, qemu-arm,
Richard Henderson, John Snow, Peter Maydell
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Add a job to build QEMU on Aarch64 with TCG disabled, so
this configuration won't bitrot over time.
We explicitly modify default-configs/aarch64-softmmu.mak to
only select the 'virt' and 'SBSA-REF' machines.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
Job ran for 7 min 30 sec
https://travis-ci.org/github/philmd/qemu/jobs/731428859
---
.travis.yml | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index 5f1dea873ec..4f1d662b5fc 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -264,6 +264,38 @@ jobs:
- CONFIG="--disable-containers --target-list=${MAIN_SOFTMMU_TARGETS}"
- UNRELIABLE=true
+ - name: "[aarch64] GCC (disable-tcg)"
+ arch: arm64
+ dist: focal
+ addons:
+ apt_packages:
+ - libaio-dev
+ - libattr1-dev
+ - libbrlapi-dev
+ - libcap-ng-dev
+ - libgcrypt20-dev
+ - libgnutls28-dev
+ - libgtk-3-dev
+ - libiscsi-dev
+ - liblttng-ust-dev
+ - libncurses5-dev
+ - libnfs-dev
+ - libnss3-dev
+ - libpixman-1-dev
+ - libpng-dev
+ - librados-dev
+ - libsdl2-dev
+ - libseccomp-dev
+ - liburcu-dev
+ - libusb-1.0-0-dev
+ - libvdeplug-dev
+ - libvte-2.91-dev
+ - ninja-build
+ env:
+ - CONFIG="--disable-containers --disable-tcg --enable-kvm --disable-xen --disable-tools --disable-docs"
+ - TEST_CMD="make check-unit"
+ - CACHE_NAME="${TRAVIS_BRANCH}-linux-gcc-aarch64"
+
- name: "[ppc64] GCC check-tcg"
arch: ppc64le
dist: focal
--
2.26.2
^ permalink raw reply related [flat|nested] 31+ messages in thread* Re: [PATCH v6 11/11] .travis.yml: Add a KVM-only Aarch64 job
2021-01-31 11:50 ` [PATCH v6 11/11] .travis.yml: Add a KVM-only Aarch64 job Philippe Mathieu-Daudé
@ 2021-01-31 11:57 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 11:57 UTC (permalink / raw)
To: qemu-devel@nongnu.org Developers
Cc: Thomas Huth, Philippe Mathieu-Daudé, Richard Henderson,
Fam Zheng, Claudio Fontana, Paolo Bonzini,
open list:Block layer core, Alex Bennée, kvm, Laurent Vivier,
qemu-arm, Richard Henderson, John Snow, Peter Maydell
On Sun, Jan 31, 2021 at 12:51 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> From: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> Add a job to build QEMU on Aarch64 with TCG disabled, so
> this configuration won't bitrot over time.
>
> We explicitly modify default-configs/aarch64-softmmu.mak to
> only select the 'virt' and 'SBSA-REF' machines.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> Job ran for 7 min 30 sec
> https://travis-ci.org/github/philmd/qemu/jobs/731428859
BTW I added this patch for completeness but I couldn't test it again
as I don't have anymore Travis-CI credit. I however tested it on a similar
Ubuntu Aarch64 host.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v6 00/11] Support disabling TCG on ARM (part 2)
2021-01-31 11:50 [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
` (10 preceding siblings ...)
2021-01-31 11:50 ` [PATCH v6 11/11] .travis.yml: Add a KVM-only Aarch64 job Philippe Mathieu-Daudé
@ 2021-01-31 14:40 ` Claudio Fontana
2021-01-31 15:23 ` Philippe Mathieu-Daudé
11 siblings, 1 reply; 31+ messages in thread
From: Claudio Fontana @ 2021-01-31 14:40 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Laurent Vivier, Thomas Huth, kvm, qemu-block,
Peter Maydell, Alex Bennée, Richard Henderson, John Snow,
qemu-arm, Paolo Bonzini, Philippe Mathieu-Daudé
On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
> Cover from Samuel Ortiz from (part 1) [1]:
>
> This patchset allows for building and running ARM targets with TCG
> disabled. [...]
>
> The rationale behind this work comes from the NEMU project where
> we're trying to only support x86 and ARM 64-bit architectures,
> without including the TCG code base. We can only do so if we can
> build and run ARM binaries with TCG disabled.
>
> Peter mentioned in v5 [6] that since 32-bit host has been removed,
> we have to remove v7 targets. This is not done in this series, as
> linking succeeds, and there is enough material to review (no need
> to spend time on that extra patch if the current approach is not
> accepted).
>
> CI: https://gitlab.com/philmd/qemu/-/pipelines/249272441
>
> v6:
> - rebased on "target/arm/Kconfig" series
> - introduce/use tcg_builtin() for realview machines
>
> v5:
> - addressed Paolo/Richard/Thomas review comments from v4 [5].
>
> v4 almost 2 years later... [2]:
> - Rebased on Meson
> - Addressed Richard review comments
> - Addressed Claudio review comments
>
> v3 almost 18 months later [3]:
> - Rebased
> - Addressed Thomas review comments
> - Added Travis-CI job to keep building --disable-tcg on ARM
>
> v2 [4]:
> - Addressed review comments from Richard and Thomas from v1 [1]
>
> Regards,
>
> Phil.
>
> [1]: https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg02451.html
> [2]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg689168.html
> [3]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg641796.html
> [4]: https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg05003.html
> [5]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg746041.html
> [6]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg777669.html
>
> Based-on: <20210131111316.232778-1-f4bug@amsat.org>
> "target: Provide target-specific Kconfig"
>
> Philippe Mathieu-Daudé (9):
> sysemu/tcg: Introduce tcg_builtin() helper
> exec: Restrict TCG specific headers
> target/arm: Restrict ARMv4 cpus to TCG accel
> target/arm: Restrict ARMv5 cpus to TCG accel
> target/arm: Restrict ARMv6 cpus to TCG accel
> target/arm: Restrict ARMv7 R-profile cpus to TCG accel
> target/arm: Restrict ARMv7 M-profile cpus to TCG accel
> target/arm: Reorder meson.build rules
> .travis.yml: Add a KVM-only Aarch64 job
>
> Samuel Ortiz (1):
> target/arm: Do not build TCG objects when TCG is off
>
> Thomas Huth (1):
> target/arm: Make m_helper.c optional via CONFIG_ARM_V7M
>
> default-configs/devices/aarch64-softmmu.mak | 1 -
> default-configs/devices/arm-softmmu.mak | 27 --------
> include/exec/helper-proto.h | 2 +
> include/sysemu/tcg.h | 2 +
> target/arm/cpu.h | 12 ----
> hw/arm/realview.c | 7 +-
> target/arm/cpu_tcg.c | 4 +-
> target/arm/helper.c | 7 --
> target/arm/m_helper-stub.c | 73 +++++++++++++++++++++
> tests/qtest/cdrom-test.c | 6 +-
> .travis.yml | 32 +++++++++
> hw/arm/Kconfig | 38 +++++++++++
> target/arm/Kconfig | 17 +++++
> target/arm/meson.build | 28 +++++---
> 14 files changed, 196 insertions(+), 60 deletions(-)
> create mode 100644 target/arm/m_helper-stub.c
>
Looking at this series, just my 2 cents on how I would suggest to go forward:
I could again split my series in two parts, with only the TCG Ops in the first part.
Then this series could be merged, enabling --disable-tcg for ARM,
then I could extend the second part of my series to include ARM as well.
Wdyt? (Probably Richard?)
Thanks,
Claudio
^ permalink raw reply [flat|nested] 31+ messages in thread* Re: [PATCH v6 00/11] Support disabling TCG on ARM (part 2)
2021-01-31 14:40 ` [PATCH v6 00/11] Support disabling TCG on ARM (part 2) Claudio Fontana
@ 2021-01-31 15:23 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 31+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-31 15:23 UTC (permalink / raw)
To: Claudio Fontana, qemu-devel
Cc: Fam Zheng, Laurent Vivier, Thomas Huth, kvm, qemu-block,
Peter Maydell, Alex Bennée, Richard Henderson, John Snow,
qemu-arm, Paolo Bonzini, Philippe Mathieu-Daudé
On 1/31/21 3:40 PM, Claudio Fontana wrote:
> On 1/31/21 12:50 PM, Philippe Mathieu-Daudé wrote:
>> Cover from Samuel Ortiz from (part 1) [1]:
>>
>> This patchset allows for building and running ARM targets with TCG
>> disabled. [...]
>>
>> The rationale behind this work comes from the NEMU project where
>> we're trying to only support x86 and ARM 64-bit architectures,
>> without including the TCG code base. We can only do so if we can
>> build and run ARM binaries with TCG disabled.
>>
>> Peter mentioned in v5 [6] that since 32-bit host has been removed,
>> we have to remove v7 targets. This is not done in this series, as
>> linking succeeds, and there is enough material to review (no need
>> to spend time on that extra patch if the current approach is not
>> accepted).
>>
>> CI: https://gitlab.com/philmd/qemu/-/pipelines/249272441
>>
>> v6:
>> - rebased on "target/arm/Kconfig" series
>> - introduce/use tcg_builtin() for realview machines
>>
>> v5:
>> - addressed Paolo/Richard/Thomas review comments from v4 [5].
>>
>> v4 almost 2 years later... [2]:
>> - Rebased on Meson
>> - Addressed Richard review comments
>> - Addressed Claudio review comments
>>
>> v3 almost 18 months later [3]:
>> - Rebased
>> - Addressed Thomas review comments
>> - Added Travis-CI job to keep building --disable-tcg on ARM
>>
>> v2 [4]:
>> - Addressed review comments from Richard and Thomas from v1 [1]
>>
>> Regards,
>>
>> Phil.
>>
>> [1]: https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg02451.html
>> [2]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg689168.html
>> [3]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg641796.html
>> [4]: https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg05003.html
>> [5]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg746041.html
>> [6]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg777669.html
>>
>> Based-on: <20210131111316.232778-1-f4bug@amsat.org>
>> "target: Provide target-specific Kconfig"
>>
>> Philippe Mathieu-Daudé (9):
>> sysemu/tcg: Introduce tcg_builtin() helper
>> exec: Restrict TCG specific headers
>> target/arm: Restrict ARMv4 cpus to TCG accel
>> target/arm: Restrict ARMv5 cpus to TCG accel
>> target/arm: Restrict ARMv6 cpus to TCG accel
>> target/arm: Restrict ARMv7 R-profile cpus to TCG accel
>> target/arm: Restrict ARMv7 M-profile cpus to TCG accel
>> target/arm: Reorder meson.build rules
>> .travis.yml: Add a KVM-only Aarch64 job
>>
>> Samuel Ortiz (1):
>> target/arm: Do not build TCG objects when TCG is off
>>
>> Thomas Huth (1):
>> target/arm: Make m_helper.c optional via CONFIG_ARM_V7M
>>
>> default-configs/devices/aarch64-softmmu.mak | 1 -
>> default-configs/devices/arm-softmmu.mak | 27 --------
>> include/exec/helper-proto.h | 2 +
>> include/sysemu/tcg.h | 2 +
>> target/arm/cpu.h | 12 ----
>> hw/arm/realview.c | 7 +-
>> target/arm/cpu_tcg.c | 4 +-
>> target/arm/helper.c | 7 --
>> target/arm/m_helper-stub.c | 73 +++++++++++++++++++++
>> tests/qtest/cdrom-test.c | 6 +-
>> .travis.yml | 32 +++++++++
>> hw/arm/Kconfig | 38 +++++++++++
>> target/arm/Kconfig | 17 +++++
>> target/arm/meson.build | 28 +++++---
>> 14 files changed, 196 insertions(+), 60 deletions(-)
>> create mode 100644 target/arm/m_helper-stub.c
>>
>
> Looking at this series, just my 2 cents on how I would suggest to go forward:
> I could again split my series in two parts, with only the TCG Ops in the first part.
>
> Then this series could be merged, enabling --disable-tcg for ARM,
>
> then I could extend the second part of my series to include ARM as well.
>
> Wdyt? (Probably Richard?)
¯\_(ツ)_/¯
I respun because Richard unqueue your series, and it looks
there is no big clashing.
Anyhow meanwhile peer review is useful, and thanks for yours ;)
>
> Thanks,
>
> Claudio
>
>
>
>
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