From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id h9sm1793301wmm.33.2021.06.04.08.53.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 08:53:17 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 05F101FF93; Fri, 4 Jun 2021 16:53:13 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Andrew Jones , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Peter Maydell , Thomas Huth , Laurent Vivier , Paolo Bonzini Subject: [PATCH v16 07/99] qtest/arm-cpu-features: Use generic qtest_has_accel() to check for TCG Date: Fri, 4 Jun 2021 16:51:40 +0100 Message-Id: <20210604155312.15902-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210604155312.15902-1-alex.bennee@linaro.org> References: <20210604155312.15902-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-TUID: JFaOw1SZgrSx From: Philippe Mathieu-Daudé Now than we can probe if the TCG accelerator is available at runtime with a QMP command, only run these tests if TCG is built into the QEMU binary. Suggested-by: Andrew Jones Reviewed-by: Andrew Jones Reviewed-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20210505125806.1263441-8-philmd@redhat.com> --- tests/qtest/arm-cpu-features.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index b1d406542f..0d9145dd16 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -20,7 +20,7 @@ */ #define SVE_MAX_VQ 16 -#define MACHINE "-machine virt,gic-version=max -accel tcg " +#define MACHINE_TCG "-machine virt,gic-version=max -accel tcg " #define MACHINE_KVM "-machine virt,gic-version=max -accel kvm " #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \ " 'arguments': { 'type': 'full', " @@ -337,7 +337,7 @@ static void sve_tests_sve_max_vq_8(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max,sve-max-vq=8"); + qts = qtest_init(MACHINE_TCG "-cpu max,sve-max-vq=8"); assert_sve_vls(qts, "max", BIT_ULL(8) - 1, NULL); @@ -372,7 +372,7 @@ static void sve_tests_sve_off(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max,sve=off"); + qts = qtest_init(MACHINE_TCG "-cpu max,sve=off"); /* SVE is off, so the map should be empty. */ assert_sve_vls(qts, "max", 0, NULL); @@ -428,7 +428,7 @@ static void test_query_cpu_model_expansion(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max"); + qts = qtest_init(MACHINE_TCG "-cpu max"); /* Test common query-cpu-model-expansion input validation */ assert_type_full(qts); @@ -593,8 +593,10 @@ int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); - qtest_add_data_func("/arm/query-cpu-model-expansion", - NULL, test_query_cpu_model_expansion); + if (qtest_has_accel("tcg")) { + qtest_add_data_func("/arm/query-cpu-model-expansion", + NULL, test_query_cpu_model_expansion); + } /* * For now we only run KVM specific tests with AArch64 QEMU in @@ -608,7 +610,7 @@ int main(int argc, char **argv) NULL, sve_tests_sve_off_kvm); } - if (g_str_equal(qtest_get_arch(), "aarch64")) { + if (g_str_equal(qtest_get_arch(), "aarch64") && qtest_has_accel("tcg")) { qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-max-vq-8", NULL, sve_tests_sve_max_vq_8); qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-off", -- 2.20.1