From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH] target/arm: Replace magic GIC values by proper definitions
Date: Thu, 25 Sep 2025 05:21:51 +0200 [thread overview]
Message-ID: <20250925032151.73250-1-philmd@linaro.org> (raw)
Prefer the FIELD_DP64() macro and self-describing GIC
definitions over magic values.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c44294711f8..da8aa7b9d08 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5184,7 +5184,7 @@ static uint64_t id_pfr1_read(CPUARMState *env, const ARMCPRegInfo *ri)
uint64_t pfr1 = GET_IDREG(&cpu->isar, ID_PFR1);
if (env->gicv3state) {
- pfr1 |= 1 << 28;
+ pfr1 = FIELD_DP64(pfr1, ID_PFR1, GIC, 1);
}
return pfr1;
}
@@ -5195,7 +5195,7 @@ static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
uint64_t pfr0 = GET_IDREG(&cpu->isar, ID_AA64PFR0);
if (env->gicv3state) {
- pfr0 |= 1 << 24;
+ pfr0 = FIELD_DP64(pfr0, ID_AA64PFR0, GIC, 1);
}
return pfr0;
}
--
2.51.0
next reply other threads:[~2025-09-25 3:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 3:21 Philippe Mathieu-Daudé [this message]
2025-09-25 19:19 ` [PATCH] target/arm: Replace magic GIC values by proper definitions Richard Henderson
2025-09-26 10:06 ` Peter Maydell
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