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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e6199f17asm43113885e9.6.2025.10.01.08.06.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 01 Oct 2025 08:06:32 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Richard Henderson , qemu-riscv@nongnu.org, Peter Maydell , qemu-ppc@nongnu.org, Paolo Bonzini , Pierrick Bouvier , Peter Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Helge Deller Subject: [PATCH 12/22] target/hppa: Get cpu first addr space with cpu_get_address_space() Date: Wed, 1 Oct 2025 17:05:17 +0200 Message-ID: <20251001150529.14122-13-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251001150529.14122-1-philmd@linaro.org> References: <20251001150529.14122-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org In order to remove the convenient CPUState::as field, access the vcpu first address space using the cpu_get_address_space() helper. Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/int_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index 191ae19404b..4dd281e6c95 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -160,6 +160,7 @@ void hppa_cpu_do_interrupt(CPUState *cs) /* ??? An alternate fool-proof method would be to store the instruction data into the unwind info. That's probably a bit too much in the way of extra storage required. */ + AddressSpace *as = cpu_get_address_space(cs, 0); vaddr vaddr = env->iaoq_f & -4; hwaddr paddr = vaddr; @@ -176,7 +177,7 @@ void hppa_cpu_do_interrupt(CPUState *cs) break; } } - env->cr[CR_IIR] = ldl_phys(cs->as, paddr); + env->cr[CR_IIR] = ldl_phys(as, paddr); if (i == EXCP_ASSIST) { /* stuff insn code into bits of FP exception register #1 */ env->fr[0] |= (env->cr[CR_IIR] & 0x03ffffff); -- 2.51.0