From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Anton Johansson" <anjo@rev.ng>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Zhang Chen" <zhangckid@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: [PATCH v6 23/30] hw/arm/virt: Get default CPU type at runtime
Date: Tue, 21 Oct 2025 00:15:01 +0200 [thread overview]
Message-ID: <20251020221508.67413-8-philmd@linaro.org> (raw)
In-Reply-To: <20251020220941.65269-1-philmd@linaro.org>
Prefer MachineClass::get_default_cpu_type() over
MachineClass::default_cpu_type to get CPU type,
evaluating TCG availability at runtime calling
tcg_enabled().
It's worth noting that this is a behavior change:
- Previously only
./configure --disable-tcg --enable-kvm
./qemu-system-aarch64 -M virt -accel kvm
would default to 'max' and
./configure --enable-tcg --enable-kvm
./qemu-system-aarch64 -M virt -accel kvm
would default to 'cortex-a15'.
- Afterward, -accel kvm will always default to 'max'.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhang Chen <zhangckid@gmail.com>
---
hw/arm/virt.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index dda8edb2745..d07cfe16512 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3257,6 +3257,12 @@ static int virt_hvf_get_physical_address_range(MachineState *ms)
return requested_ipa_size;
}
+static const char *virt_get_default_cpu_type(const MachineState *ms)
+{
+ return tcg_enabled() ? ARM_CPU_TYPE_NAME("cortex-a15")
+ : ARM_CPU_TYPE_NAME("max");
+}
+
static GPtrArray *virt_get_valid_cpu_types(const MachineState *ms)
{
GPtrArray *vct = g_ptr_array_new_with_free_func(g_free);
@@ -3312,11 +3318,7 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
mc->minimum_page_bits = 12;
mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = virt_cpu_index_to_props;
-#ifdef CONFIG_TCG
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
-#else
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
-#endif
+ mc->get_default_cpu_type = virt_get_default_cpu_type;
mc->get_valid_cpu_types = virt_get_valid_cpu_types;
mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
mc->kvm_type = virt_kvm_type;
--
2.51.0
next prev parent reply other threads:[~2025-10-20 22:16 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 22:09 [PATCH v6 00/30] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 01/30] hw/core: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-10-20 23:02 ` Pierrick Bouvier
2025-10-20 22:09 ` [PATCH v6 02/30] hw/boards: Move DEFINE_MACHINE() definition closer to its doc string Philippe Mathieu-Daudé
2025-10-20 23:02 ` Pierrick Bouvier
2025-10-20 22:09 ` [PATCH v6 03/30] hw/boards: Extend DEFINE_MACHINE macro to cover more use cases Philippe Mathieu-Daudé
2025-10-20 23:03 ` Pierrick Bouvier
2025-10-20 22:09 ` [PATCH v6 04/30] hw/boards: Introduce DEFINE_MACHINE_WITH_INTERFACE_ARRAY() macro Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 05/30] hw/arm: Register TYPE_TARGET_ARM/AARCH64_MACHINE QOM interfaces Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 06/30] hw/core: Allow ARM/Aarch64 binaries to use the 'none' machine Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 07/30] hw/arm: Add DEFINE_MACHINE_[ARM_]AARCH64() macros Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 08/30] hw/arm: Filter machine types for qemu-system-arm/aarch64 binaries Philippe Mathieu-Daudé
2025-10-21 5:41 ` Jan Kiszka
2025-10-21 7:55 ` Philippe Mathieu-Daudé
2025-10-20 22:09 ` [PATCH v6 09/30] qemu/target-info: Include missing 'qapi-types-common.h' header Philippe Mathieu-Daudé
2025-10-20 23:04 ` Pierrick Bouvier
2025-10-20 22:09 ` [PATCH v6 10/30] meson: Prepare to accept per-binary TargetInfo structure implementation Philippe Mathieu-Daudé
2025-10-20 22:13 ` [PATCH 11/30] config/target: Implement per-binary TargetInfo structure (ARM, AARCH64) Philippe Mathieu-Daudé
2025-10-20 22:13 ` [PATCH 12/30] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2025-10-20 22:13 ` [PATCH 13/30] hw/arm/raspi: " Philippe Mathieu-Daudé
2025-10-20 22:13 ` [PATCH 14/30] hw/core/machine: Allow dynamic registration of valid CPU types Philippe Mathieu-Daudé
2025-10-20 22:13 ` [PATCH 15/30] hw/arm/virt: Register valid CPU types dynamically Philippe Mathieu-Daudé
2025-10-20 22:14 ` [PATCH v6 16/30] hw/arm/virt: Check accelerator availability at runtime Philippe Mathieu-Daudé
2025-10-20 22:14 ` [PATCH v6 17/30] qemu/target_info: Add target_arm() helper Philippe Mathieu-Daudé
2025-10-20 23:08 ` Pierrick Bouvier
2025-10-20 22:14 ` [PATCH v6 18/30] qemu/target_info: Add target_aarch64() helper Philippe Mathieu-Daudé
2025-10-20 23:08 ` Pierrick Bouvier
2025-10-20 22:14 ` [PATCH v6 19/30] qemu/target-info: Add target_base_arch() Philippe Mathieu-Daudé
2025-10-20 23:15 ` Pierrick Bouvier
2025-10-21 7:53 ` Philippe Mathieu-Daudé
2025-10-20 22:14 ` [PATCH v6 20/30] qemu/target_info: Add target_base_arm() helper Philippe Mathieu-Daudé
2025-10-20 23:16 ` Pierrick Bouvier
2025-10-20 22:14 ` [PATCH v6 21/30] hw/arm/virt: Replace TARGET_AARCH64 -> target_aarch64() Philippe Mathieu-Daudé
2025-10-20 23:16 ` Pierrick Bouvier
2025-10-20 22:15 ` [PATCH v6 22/30] hw/core: Introduce MachineClass::get_default_cpu_type() helper Philippe Mathieu-Daudé
2025-10-20 22:15 ` Philippe Mathieu-Daudé [this message]
2025-10-20 23:37 ` [PATCH v6 23/30] hw/arm/virt: Get default CPU type at runtime Pierrick Bouvier
2025-10-20 22:15 ` [PATCH v6 24/30] hw/arm/sbsa-ref: Include missing 'cpu.h' header Philippe Mathieu-Daudé
2025-10-20 23:38 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 25/30] hw/arm/sbsa-ref: Build only once Philippe Mathieu-Daudé
2025-10-20 23:39 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 26/30] hw/arm/virt-acpi-build: Include missing 'cpu.h' header Philippe Mathieu-Daudé
2025-10-20 23:40 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 27/30] hw/arm/virt-acpi-build: Build only once Philippe Mathieu-Daudé
2025-10-20 23:40 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 28/30] hw/arm/virt: " Philippe Mathieu-Daudé
2025-10-20 23:40 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 29/30] hw/arm/meson: Move Xen files to arm_common_ss[] Philippe Mathieu-Daudé
2025-10-20 23:41 ` Pierrick Bouvier
2025-10-20 22:20 ` [PATCH v6 30/30] hw/arm/meson: Remove now unused arm_ss[] source set Philippe Mathieu-Daudé
2025-10-20 23:41 ` Pierrick Bouvier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251020221508.67413-8-philmd@linaro.org \
--to=philmd@linaro.org \
--cc=anjo@rev.ng \
--cc=peter.maydell@linaro.org \
--cc=pierrick.bouvier@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=zhangckid@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).