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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475cae9253bsm35607955e9.1.2025.10.23.06.06.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 23 Oct 2025 06:06:53 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , Mohamed Mediouni , Stefan Hajnoczi , Alexander Graf , Peter Collingbourne , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Cameron Esfahani , qemu-arm@nongnu.org, Mads Ynddal , Phil Dennis-Jordan , Peter Maydell , Roman Bolshakov Subject: [PATCH v2 47/58] accel/hvf: Introduce hvf_arch_cpu_synchronize_[pre/post]exec() hooks Date: Thu, 23 Oct 2025 15:06:23 +0200 Message-ID: <20251023130625.9157-6-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251023114638.5667-1-philmd@linaro.org> References: <20251023114638.5667-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- include/system/hvf_int.h | 4 ++++ accel/hvf/hvf-accel-ops.c | 3 +++ target/arm/hvf/hvf.c | 8 ++++++++ target/i386/hvf/hvf.c | 8 ++++++++ 4 files changed, 23 insertions(+) diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index c8e407a1463..eab443aa91f 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -71,6 +71,10 @@ int hvf_arch_put_registers(CPUState *); int hvf_arch_get_registers(CPUState *); /* Must be called by the owning thread */ void hvf_arch_update_guest_debug(CPUState *cpu); +/* Must be called by the owning thread */ +void hvf_arch_cpu_synchronize_pre_exec(CPUState *cpu); +/* Must be called by the owning thread */ +void hvf_arch_cpu_synchronize_post_exec(CPUState *cpu); void hvf_protect_clean_range(hwaddr addr, size_t size); void hvf_unprotect_dirty_range(hwaddr addr, size_t size); diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index e9dd2d24745..744a5288298 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -181,10 +181,13 @@ static void *hvf_cpu_thread_fn(void *arg) do { qemu_process_cpu_events(cpu); if (cpu_can_run(cpu)) { + + hvf_arch_cpu_synchronize_pre_exec(cpu); r = hvf_arch_vcpu_exec(cpu); if (r == EXCP_DEBUG) { cpu_handle_guest_debug(cpu); } + hvf_arch_cpu_synchronize_post_exec(cpu); } } while (!cpu->unplug || cpu_can_run(cpu)); diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index b0918de5f92..c83bffe46ad 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -2009,6 +2009,14 @@ static int hvf_handle_vmexit(CPUState *cpu, hv_vcpu_exit_t *exit) return ret; } +void hvf_arch_cpu_synchronize_pre_exec(CPUState *cpu) +{ +} + +void hvf_arch_cpu_synchronize_post_exec(CPUState *cpu) +{ +} + int hvf_arch_vcpu_exec(CPUState *cpu) { int ret; diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 4597d191f9d..de5e8b45d19 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -722,6 +722,14 @@ void hvf_simulate_wrmsr(CPUState *cs) printf("write msr %llx\n", RCX(cs));*/ } +void hvf_arch_cpu_synchronize_pre_exec(CPUState *cpu) +{ +} + +void hvf_arch_cpu_synchronize_post_exec(CPUState *cpu) +{ +} + static int hvf_handle_vmexit(CPUState *cpu) { X86CPU *x86_cpu = env_archcpu(cpu_env(cpu)); -- 2.51.0