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[185.104.138.122]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429c13ebfe8sm20110383f8f.35.2025.11.03.02.20.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 03 Nov 2025 02:20:20 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Roman Bolshakov , Alexander Graf , Phil Dennis-Jordan , qemu-arm@nongnu.org, Paolo Bonzini , Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Akihiko Odaki , Peter Collingbourne , Cameron Esfahani , Mads Ynddal , Mohamed Mediouni Subject: [PATCH v4 22/23] target/arm/hvf: Flush vCPU registers once before vcpu_exec() loop Date: Mon, 3 Nov 2025 11:10:31 +0100 Message-ID: <20251103101034.59039-23-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251103101034.59039-1-philmd@linaro.org> References: <20251103101034.59039-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/arm/hvf/hvf.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 8d0a528dceb..268a0bcd8ea 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -2019,6 +2019,7 @@ static int hvf_handle_vmexit(CPUState *cpu, hv_vcpu_exit_t *exit) void hvf_arch_cpu_synchronize_pre_exec(CPUState *cpu) { + flush_cpu_state(cpu); } void hvf_arch_cpu_synchronize_post_exec(CPUState *cpu) @@ -2034,8 +2035,6 @@ int hvf_arch_vcpu_exec(CPUState *cpu) return EXCP_HLT; } - flush_cpu_state(cpu); - do { if (!(cpu->singlestep_enabled & SSTEP_NOIRQ) && hvf_inject_interrupts(cpu)) { -- 2.51.0