* [PULL 01/30] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible Cédric Le Goater
` (28 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Aspeed machines will be moved into split C files for better
modularization and future maintenance.
To allow all machine implementations to reuse the same
AspeedMachineState structure, the struct definition is moved
from aspeed.c to the shared header aspeed.h.
This change centralizes the common state structure used across
all Aspeed machine models, reduces redundancy, and simplifies
future refactoring work for new machines.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 12 ++++++++++++
hw/arm/aspeed.c | 14 --------------
2 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 6c364556565a..9d34be68b2b3 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -11,6 +11,7 @@
#include "hw/boards.h"
#include "qom/object.h"
+#include "hw/arm/aspeed_soc.h"
typedef struct AspeedMachineState AspeedMachineState;
@@ -24,6 +25,17 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
#define ASPEED_MAC2_ON (1 << 2)
#define ASPEED_MAC3_ON (1 << 3)
+struct AspeedMachineState {
+ MachineState parent_obj;
+
+ AspeedSoCState *soc;
+ MemoryRegion boot_rom;
+ bool mmio_exec;
+ uint32_t uart_chosen;
+ char *fmc_model;
+ char *spi_model;
+ uint32_t hw_strap1;
+};
struct AspeedMachineClass {
MachineClass parent_obj;
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ecc7272e67c2..4c92f1e1d953 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -36,20 +36,6 @@ static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
};
-struct AspeedMachineState {
- /* Private */
- MachineState parent_obj;
- /* Public */
-
- AspeedSoCState *soc;
- MemoryRegion boot_rom;
- bool mmio_exec;
- uint32_t uart_chosen;
- char *fmc_model;
- char *spi_model;
- uint32_t hw_strap1;
-};
-
/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
#if HOST_LONG_BITS == 32
#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
2025-11-04 8:31 ` [PULL 01/30] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 03/30] hw/arm/aspeed: Export and rename create_pca9552() for reuse Cédric Le Goater
` (27 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The function aspeed_machine_class_init_cpus_defaults() is now made
globally visible so that it can be used by other Aspeed machine C files.
Previously, this function was declared as static, restricting its
visibility to aspeed.c. Since future machine split files will also
need to call this helper to initialize default CPU settings, its
declaration has been moved to the common header aspeed.h and the
static keyword has been removed.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 10 ++++++++++
hw/arm/aspeed.c | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 9d34be68b2b3..712014497e90 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -57,5 +57,15 @@ struct AspeedMachineClass {
bool vbootrom;
};
+/*
+ * aspeed_machine_class_init_cpus_defaults:
+ * @mc: the #MachineClass to be initialized.
+ *
+ * Initialize the default CPU configuration for an Aspeed machine class.
+ * This function sets the default, minimum, and maximum CPU counts
+ * to match the number of CPUs defined in the associated SoC class,
+ * and copies its list of valid CPU types.
+ */
+void aspeed_machine_class_init_cpus_defaults(MachineClass *mc);
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 4c92f1e1d953..f23af5bf8c39 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1339,7 +1339,7 @@ static void aspeed_machine_class_props_init(ObjectClass *oc)
"Change the SPI Flash model");
}
-static void aspeed_machine_class_init_cpus_defaults(MachineClass *mc)
+void aspeed_machine_class_init_cpus_defaults(MachineClass *mc)
{
AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(mc);
AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name));
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 03/30] hw/arm/aspeed: Export and rename create_pca9552() for reuse
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
2025-11-04 8:31 ` [PULL 01/30] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse Cédric Le Goater
2025-11-04 8:31 ` [PULL 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 04/30] hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554() Cédric Le Goater
` (26 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The helper function create_pca9552() has been renamed to
aspeed_create_pca9552() and made non-static for reuse by other Aspeed
machine source files. A corresponding prototype is now declared in
aspeed.h.
This allows multiple Aspeed platforms to share PCA9552 I2C LED controller
initialization logic, improving code reuse and reducing duplication.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 12 +++++++++++
hw/arm/aspeed.c | 44 ++++++++++++++++++++---------------------
2 files changed, 34 insertions(+), 22 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 712014497e90..9b765295d906 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -68,4 +68,16 @@ struct AspeedMachineClass {
*/
void aspeed_machine_class_init_cpus_defaults(MachineClass *mc);
+/*
+ * aspeed_create_pca9552:
+ * @soc: pointer to the #AspeedSoCState.
+ * @bus_id: the I2C bus index to attach the device.
+ * @addr: the I2C address of the PCA9552 device.
+ *
+ * Create and attach a PCA9552 LED controller device to the specified I2C bus
+ * of the given Aspeed SoC. The device is instantiated using
+ * i2c_slave_create_simple() with the PCA9552 device type.
+ */
+void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr);
+
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index f23af5bf8c39..c6f272d9865d 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -537,7 +537,7 @@ static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e);
}
-static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
+void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
{
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
TYPE_PCA9552, addr);
@@ -565,9 +565,9 @@ static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
eeprom4_54);
/* PCA9539 @ 0x76, but PCA9552 is compatible */
- create_pca9552(soc, 4, 0x76);
+ aspeed_create_pca9552(soc, 4, 0x76);
/* PCA9539 @ 0x77, but PCA9552 is compatible */
- create_pca9552(soc, 4, 0x77);
+ aspeed_create_pca9552(soc, 4, 0x77);
/* bus 6 : */
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
@@ -578,8 +578,8 @@ static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
eeprom8_56);
- create_pca9552(soc, 8, 0x60);
- create_pca9552(soc, 8, 0x61);
+ aspeed_create_pca9552(soc, 8, 0x60);
+ aspeed_create_pca9552(soc, 8, 0x61);
/* bus 8 : adc128d818 @ 0x1d */
/* bus 8 : adc128d818 @ 0x1f */
@@ -710,7 +710,7 @@ static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
/* It expects a pca9555 but a pca9552 is compatible */
- create_pca9552(soc, 8, 0x30);
+ aspeed_create_pca9552(soc, 8, 0x30);
}
static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
@@ -720,7 +720,7 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
- create_pca9552(soc, 3, 0x61);
+ aspeed_create_pca9552(soc, 3, 0x61);
/* The rainier expects a TMP275 but a TMP105 is compatible */
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
@@ -734,14 +734,14 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
- create_pca9552(soc, 4, 0x60);
+ aspeed_create_pca9552(soc, 4, 0x60);
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
0x48);
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
0x49);
- create_pca9552(soc, 5, 0x60);
- create_pca9552(soc, 5, 0x61);
+ aspeed_create_pca9552(soc, 5, 0x60);
+ aspeed_create_pca9552(soc, 5, 0x61);
i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
"pca9546", 0x70);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
@@ -760,12 +760,12 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
- create_pca9552(soc, 7, 0x30);
- create_pca9552(soc, 7, 0x31);
- create_pca9552(soc, 7, 0x32);
- create_pca9552(soc, 7, 0x33);
- create_pca9552(soc, 7, 0x60);
- create_pca9552(soc, 7, 0x61);
+ aspeed_create_pca9552(soc, 7, 0x30);
+ aspeed_create_pca9552(soc, 7, 0x31);
+ aspeed_create_pca9552(soc, 7, 0x32);
+ aspeed_create_pca9552(soc, 7, 0x33);
+ aspeed_create_pca9552(soc, 7, 0x60);
+ aspeed_create_pca9552(soc, 7, 0x61);
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
/* Bus 7: TODO si7021-a20@20 */
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
@@ -782,8 +782,8 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len);
at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51,
64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len);
- create_pca9552(soc, 8, 0x60);
- create_pca9552(soc, 8, 0x61);
+ aspeed_create_pca9552(soc, 8, 0x60);
+ aspeed_create_pca9552(soc, 8, 0x61);
/* Bus 8: ucd90320@11 */
/* Bus 8: ucd90320@b */
/* Bus 8: ucd90320@c */
@@ -804,17 +804,17 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
"pca9546", 0x70);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
- create_pca9552(soc, 11, 0x60);
+ aspeed_create_pca9552(soc, 11, 0x60);
at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
- create_pca9552(soc, 13, 0x60);
+ aspeed_create_pca9552(soc, 13, 0x60);
at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
- create_pca9552(soc, 14, 0x60);
+ aspeed_create_pca9552(soc, 14, 0x60);
at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
- create_pca9552(soc, 15, 0x60);
+ aspeed_create_pca9552(soc, 15, 0x60);
}
static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 04/30] hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554()
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (2 preceding siblings ...)
2025-11-04 8:31 ` [PULL 03/30] hw/arm/aspeed: Export and rename create_pca9552() for reuse Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 05/30] hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance Cédric Le Goater
` (25 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The helper function create_pca9554() has been renamed to
aspeed_create_pca9554() and made globally available.
Previously, the function was declared static inside aspeed.c, restricting
its visibility to that file. As more Aspeed machine implementations
require PCA9554 I2C expander setup, it makes sense to rename it with the
aspeed_ prefix and export its declaration in aspeed.h for shared use.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 14 ++++++++++++++
hw/arm/aspeed.c | 8 ++++----
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 9b765295d906..16b24e68870a 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -80,4 +80,18 @@ void aspeed_machine_class_init_cpus_defaults(MachineClass *mc);
*/
void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr);
+/*
+ * aspeed_create_pca9554:
+ * @soc: pointer to the #AspeedSoCState.
+ * @bus_id: the I2C bus index to attach the device.
+ * @addr: the I2C address of the PCA9554 device.
+ *
+ * Create and attach a PCA9554 I/O expander to the specified I2C bus
+ * of the given Aspeed SoC. The device is created via
+ * i2c_slave_create_simple() and returned as an #I2CSlave pointer.
+ *
+ * Returns: a pointer to the newly created #I2CSlave instance.
+ */
+I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr);
+
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c6f272d9865d..59416eb5ae6c 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -543,7 +543,7 @@ void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
TYPE_PCA9552, addr);
}
-static I2CSlave *create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
+I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
{
return i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
TYPE_PCA9554, addr);
@@ -1142,7 +1142,7 @@ static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
}
/* Bus 5 Expander */
- create_pca9554(soc, 4, 0x21);
+ aspeed_create_pca9554(soc, 4, 0x21);
/* Mux I2c Expanders */
i2c_slave_create_simple(i2c[5], "pca9546", 0x71);
@@ -1153,12 +1153,12 @@ static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
i2c_slave_create_simple(i2c[5], "pca9546", 0x77);
/* Bus 10 */
- dev = DEVICE(create_pca9554(soc, 9, 0x20));
+ dev = DEVICE(aspeed_create_pca9554(soc, 9, 0x20));
/* Set FPGA_READY */
object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal);
- create_pca9554(soc, 9, 0x21);
+ aspeed_create_pca9554(soc, 9, 0x21);
at24c_eeprom_init(i2c[9], 0x50, 64 * KiB);
at24c_eeprom_init(i2c[9], 0x51, 64 * KiB);
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 05/30] hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (3 preceding siblings ...)
2025-11-04 8:31 ` [PULL 04/30] hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554() Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 06/30] hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance Cédric Le Goater
` (24 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the FP5280G2 BMC machine implementation from
aspeed.c into a new standalone file aspeed_ast2500_fp5280g2.c.
The change improves code organization and prepares the Aspeed
machine framework for future expansion and easier maintenance.
Key updates include:
- Moved fp5280g2_bmc_i2c_init() and related machine class init
functions into aspeed_ast2500_fp5280g2.c.
- Added new file to hw/arm/meson.build for compilation.
- Removed obsolete FP5280G2 definitions from aspeed.c
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 66 ------------------------
hw/arm/aspeed_ast2500_fp5280g2.c | 88 ++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 89 insertions(+), 66 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_fp5280g2.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 59416eb5ae6c..3dcd5fc54040 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -131,21 +131,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \
SCU_AST2500_HW_STRAP_RESERVED1)
-/* FP5280G2 hardware value: 0XF100D286 */
-#define FP5280G2_BMC_HW_STRAP1 ( \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_RESERVED28 | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_LPC_RESET_PIN | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
- SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_MAC1_RGMII | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
- SCU_AST2500_HW_STRAP_RESERVED1)
-
/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
@@ -686,33 +671,6 @@ static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
eeprom_buf);
}
-static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CSlave *i2c_mux;
-
- /* The at24c256 */
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768);
-
- /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
- 0x49);
-
- i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
- "pca9546", 0x70);
- /* It expects a TMP112 but a TMP105 is compatible */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105,
- 0x4a);
-
- /* It expects a ds3232 but a ds1338 is good enough */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
-
- /* It expects a pca9555 but a pca9552 is compatible */
- aspeed_create_pca9552(soc, 8, 0x30);
-}
-
static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1608,25 +1566,6 @@ static void aspeed_machine_g220a_class_init(ObjectClass *oc, const void *data)
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Inspur FP5280G2 BMC (ARM1176)";
- mc->deprecation_reason = "use 'ast2500-evb' instead";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1;
- amc->fmc_model = "n25q512a";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = fp5280g2_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -2015,11 +1954,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_firework_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_fp5280g2_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_fp5280g2.c b/hw/arm/aspeed_ast2500_fp5280g2.c
new file mode 100644
index 000000000000..858e0388714b
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_fp5280g2.c
@@ -0,0 +1,88 @@
+/*
+ * Inspur FP5280G2
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/sensor/tmp105.h"
+
+/* FP5280G2 hardware value: 0XF100D286 */
+#define FP5280G2_BMC_HW_STRAP1 ( \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_RESERVED28 | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
+ SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_MAC1_RGMII | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
+ SCU_AST2500_HW_STRAP_RESERVED1)
+
+static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CSlave *i2c_mux;
+
+ /* The at24c256 */
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 1), 0x50, 32768);
+
+ /* The fp5280g2 expects a TMP112 but a TMP105 is compatible */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), TYPE_TMP105,
+ 0x49);
+
+ i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "pca9546", 0x70);
+ /* It expects a TMP112 but a TMP105 is compatible */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0), TYPE_TMP105,
+ 0x4a);
+
+ /* It expects a ds3232 but a ds1338 is good enough */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "ds1338", 0x68);
+
+ /* It expects a pca9555 but a pca9552 is compatible */
+ aspeed_create_pca9552(soc, 8, 0x30);
+}
+
+static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Inspur FP5280G2 BMC (ARM1176)";
+ mc->deprecation_reason = "use 'ast2500-evb' instead";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = FP5280G2_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q512a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = fp5280g2_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_fp5280g2_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("fp5280g2-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_fp5280g2_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_fp5280g2_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 61c66ee2d0bc..ed637f268725 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -44,6 +44,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
+ 'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 06/30] hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (4 preceding siblings ...)
2025-11-04 8:31 ` [PULL 05/30] hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 07/30] hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup Cédric Le Goater
` (23 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit refactors the Bytedance G220A BMC machine by moving its
implementation from aspeed.c into a new dedicated file
aspeed_ast2500_g220a.c.
The goal is to improve modularity and maintainability of Aspeed
machine definitions by isolating each platform into its own source
file. This aligns with ongoing efforts to simplify aspeed.c,
which previously contained all machine configurations.
Key updates include:
- Moved G220A_BMC_HW_STRAP1 definition and
g220a_bmc_i2c_init() function into aspeed_ast2500_g220a.c.
- Moved aspeed_machine_g220a_class_init() and related type
registration to the new file.
- Added the new file to the build system (meson.build).
- Removed all G220A-specific code from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 72 ---------------------------
hw/arm/aspeed_ast2500_g220a.c | 92 +++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 93 insertions(+), 72 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_g220a.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 3dcd5fc54040..ed8ef6a2d01a 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -117,20 +117,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2500_HW_STRAP_RESERVED1)
-#define G220A_BMC_HW_STRAP1 ( \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_RESERVED28 | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_2ND_BOOT_WDT | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_LPC_RESET_PIN | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
- SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \
- SCU_AST2500_HW_STRAP_RESERVED1)
-
/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
@@ -635,42 +621,6 @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
/* Bus 11: TODO ucd90160@64 */
}
-static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- DeviceState *dev;
-
- dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
- "emc1413", 0x4c));
- object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
-
- dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12),
- "emc1413", 0x4c));
- object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
-
- dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13),
- "emc1413", 0x4c));
- object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
-
- static uint8_t eeprom_buf[2 * 1024] = {
- 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe,
- 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65,
- 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32,
- 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42,
- 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45,
- 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
- };
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
- eeprom_buf);
-}
-
static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1549,23 +1499,6 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
aspeed_machine_ast2600_class_emmc_init(oc);
};
-static void aspeed_machine_g220a_class_init(ObjectClass *oc, const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Bytedance G220A BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = G220A_BMC_HW_STRAP1;
- amc->fmc_model = "n25q512a";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = g220a_bmc_i2c_init;
- mc->default_ram_size = 1024 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -1939,11 +1872,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_tiogapass_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("g220a-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_g220a_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_g220a.c b/hw/arm/aspeed_ast2500_g220a.c
new file mode 100644
index 000000000000..3f979a78e572
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_g220a.c
@@ -0,0 +1,92 @@
+/*
+ * Bytedance G220A
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+#define G220A_BMC_HW_STRAP1 ( \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_RESERVED28 | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_2ND_BOOT_WDT | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
+ SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_64M_DRAM) | \
+ SCU_AST2500_HW_STRAP_RESERVED1)
+
+static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
+ "emc1413", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12),
+ "emc1413", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 13),
+ "emc1413", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+
+ static uint8_t eeprom_buf[2 * 1024] = {
+ 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xfe,
+ 0x01, 0x06, 0x00, 0xc9, 0x42, 0x79, 0x74, 0x65,
+ 0x64, 0x61, 0x6e, 0x63, 0x65, 0xc5, 0x47, 0x32,
+ 0x32, 0x30, 0x41, 0xc4, 0x41, 0x41, 0x42, 0x42,
+ 0xc4, 0x43, 0x43, 0x44, 0x44, 0xc4, 0x45, 0x45,
+ 0x46, 0x46, 0xc4, 0x48, 0x48, 0x47, 0x47, 0xc1,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
+ };
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x57,
+ eeprom_buf);
+}
+
+static void aspeed_machine_g220a_class_init(ObjectClass *oc, const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Bytedance G220A BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = G220A_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q512a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = g220a_bmc_i2c_init;
+ mc->default_ram_size = 1024 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_g220a_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("g220a-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_g220a_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_g220a_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ed637f268725..91bdefd2037f 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -45,6 +45,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_soc_common.c',
'aspeed_ast2400.c',
'aspeed_ast2500_fp5280g2.c',
+ 'aspeed_ast2500_g220a.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 07/30] hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (5 preceding siblings ...)
2025-11-04 8:31 ` [PULL 06/30] hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 08/30] hw/arm/aspeed: Split YosemiteV2 machine into a separate source file for maintainability Cédric Le Goater
` (22 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Tiogapass BMC machine implementation out of
aspeed.c into a new dedicated file aspeed_ast2500_tiogapass.c.
To support splitting Tiogapass into a dedicated source file,
a new TIOGAPASS_BMC_HW_STRAP1 macro is added as a copy of
AST2500_EVB_HW_STRAP1.
The change follows the ongoing effort to modularize Aspeed platform
support by splitting each machine definition into its own source file.
This makes aspeed.c cleaner, easier to maintain, and simplifies
future feature additions or refactoring for individual machines.
Key updates include:
- Removed tiogapass_bmc_i2c_init() and its FRU data from aspeed.c
and aspeed_eeprom.c.
- Removed Tiogapass type registration from aspeed_machine_types[].
- Added new source file aspeed_ast2500_tiogapass.c to meson.build.
- Removed unused Tiogapass FRUID declarations from aspeed_eeprom.h.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_eeprom.h | 4 --
hw/arm/aspeed.c | 36 -------------
hw/arm/aspeed_ast2500_tiogapass.c | 90 +++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 22 --------
hw/arm/meson.build | 1 +
5 files changed, 91 insertions(+), 62 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_tiogapass.c
diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h
index 3ed9bc1d9a82..a9ae95940c5f 100644
--- a/hw/arm/aspeed_eeprom.h
+++ b/hw/arm/aspeed_eeprom.h
@@ -7,10 +7,6 @@
#ifndef ASPEED_EEPROM_H
#define ASPEED_EEPROM_H
-
-extern const uint8_t tiogapass_bmc_fruid[];
-extern const size_t tiogapass_bmc_fruid_len;
-
extern const uint8_t fby35_nic_fruid[];
extern const uint8_t fby35_bb_fruid[];
extern const uint8_t fby35_bmc_fruid[];
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ed8ef6a2d01a..42f4203f9d85 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -495,19 +495,6 @@ static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
}
-static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB);
- at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB,
- tiogapass_bmc_fruid, tiogapass_bmc_fruid_len);
- /* TMP421 */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e);
-}
-
void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
{
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
@@ -1424,24 +1411,6 @@ static void aspeed_machine_romulus_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_tiogapass_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook Tiogapass BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
- amc->hw_strap2 = 0;
- amc->fmc_model = "n25q256a";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 2;
- amc->i2c_init = tiogapass_bmc_i2c_init;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_sonorapass_class_init(ObjectClass *oc,
const void *data)
{
@@ -1867,11 +1836,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_yosemitev2_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("tiogapass-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_tiogapass_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_tiogapass.c b/hw/arm/aspeed_ast2500_tiogapass.c
new file mode 100644
index 000000000000..186dbc1da30b
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_tiogapass.c
@@ -0,0 +1,90 @@
+/*
+ * Facebook Tiogapass
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+
+/* value: 0xF100C2E6 */
+#define TIOGAPASS_BMC_HW_STRAP1 (( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_MAC1_RGMII | \
+ SCU_HW_STRAP_MAC0_RGMII) & \
+ ~SCU_HW_STRAP_2ND_BOOT_WDT)
+
+/* Tiogapass BMC FRU */
+static const uint8_t tiogapass_bmc_fruid[] = {
+ 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
+ 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d,
+ 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f,
+ 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
+ 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x54, 0x69, 0x6f, 0x67, 0x61,
+ 0x20, 0x50, 0x61, 0x73, 0x73, 0x20, 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65,
+ 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xc4, 0x58, 0x58, 0x58, 0x32, 0xcd, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
+ 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
+};
+
+static const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid);
+
+static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB);
+ at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB,
+ tiogapass_bmc_fruid, tiogapass_bmc_fruid_len);
+ /* TMP421 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "tmp421", 0x1f);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4f);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4e);
+}
+
+static void aspeed_machine_tiogapass_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook Tiogapass BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = TIOGAPASS_BMC_HW_STRAP1;
+ amc->hw_strap2 = 0;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 2;
+ amc->i2c_init = tiogapass_bmc_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_tiogapass_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("tiogapass-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_tiogapass_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_tiogapass_types)
diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c
index 8bbbdec8349b..f0ced29cf15b 100644
--- a/hw/arm/aspeed_eeprom.c
+++ b/hw/arm/aspeed_eeprom.c
@@ -7,27 +7,6 @@
#include "qemu/osdep.h"
#include "aspeed_eeprom.h"
-/* Tiogapass BMC FRU */
-const uint8_t tiogapass_bmc_fruid[] = {
- 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
- 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d,
- 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f,
- 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
- 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x54, 0x69, 0x6f, 0x67, 0x61,
- 0x20, 0x50, 0x61, 0x73, 0x73, 0x20, 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65,
- 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xc4, 0x58, 0x58, 0x58, 0x32, 0xcd, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
- 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
-};
-
const uint8_t fby35_nic_fruid[] = {
0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7,
0x5e, 0xcf, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd,
@@ -181,7 +160,6 @@ const uint8_t gb200nvl_bmc_fruid[] = {
};
-const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid);
const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid);
const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid);
const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid);
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 91bdefd2037f..870202ce8530 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -46,6 +46,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2400.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
+ 'aspeed_ast2500_tiogapass.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 08/30] hw/arm/aspeed: Split YosemiteV2 machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (6 preceding siblings ...)
2025-11-04 8:31 ` [PULL 07/30] hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 09/30] hw/arm/aspeed: Split Witherspoon " Cédric Le Goater
` (21 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the YosemiteV2 BMC machine implementation from
aspeed.c into a new standalone file aspeed_ast2500_yosemitev2.c.
To support splitting YosemiteV2 into a dedicated source file,
a new YOSEMITEV2_BMC_HW_STRAP1 macro is added as a copy of
AST2500_EVB_HW_STRAP1.
The refactor is part of an ongoing effort to modularize Aspeed
machine definitions by separating each board into its own source
file. This improves code readability, maintainability, and simplifies
future platform-specific changes.
Key updates include:
- Moved yosemitev2_bmc_i2c_init() and its FRU data into a new file.
- Removed aspeed_machine_yosemitev2_class_init() and type registration
from aspeed.c.
- Removed YosemiteV2 FRUID data and declarations from
aspeed_eeprom.c and aspeed_eeprom.h.
- Added aspeed_ast2500_yosemitev2.c to the build system
(meson.build).
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_eeprom.h | 3 -
hw/arm/aspeed.c | 37 ------------
hw/arm/aspeed_ast2500_yosemitev2.c | 91 ++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 22 --------
hw/arm/meson.build | 1 +
5 files changed, 92 insertions(+), 62 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_yosemitev2.c
diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h
index a9ae95940c5f..5448eeeab7ab 100644
--- a/hw/arm/aspeed_eeprom.h
+++ b/hw/arm/aspeed_eeprom.h
@@ -14,9 +14,6 @@ extern const size_t fby35_nic_fruid_len;
extern const size_t fby35_bb_fruid_len;
extern const size_t fby35_bmc_fruid_len;
-extern const uint8_t yosemitev2_bmc_fruid[];
-extern const size_t yosemitev2_bmc_fruid_len;
-
extern const uint8_t rainier_bb_fruid[];
extern const size_t rainier_bb_fruid_len;
extern const uint8_t rainier_bmc_fruid[];
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 42f4203f9d85..731ca7a1aa59 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -470,20 +470,6 @@ static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
TYPE_TMP105, 0x4d);
}
-static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB);
- at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB,
- yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len);
- /* TMP421 */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f);
-
-}
-
static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1376,24 +1362,6 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook YosemiteV2 BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
- amc->hw_strap2 = 0;
- amc->fmc_model = "n25q256a";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 2;
- amc->i2c_init = yosemitev2_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_romulus_class_init(ObjectClass *oc,
const void *data)
{
@@ -1831,11 +1799,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_yosemitev2_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_yosemitev2.c b/hw/arm/aspeed_ast2500_yosemitev2.c
new file mode 100644
index 000000000000..eaa75bcccbbc
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_yosemitev2.c
@@ -0,0 +1,91 @@
+/*
+ * Facebook YosemiteV2
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+
+/* value: 0xF100C2E6 */
+#define YOSEMITEV2_BMC_HW_STRAP1 (( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_MAC1_RGMII | \
+ SCU_HW_STRAP_MAC0_RGMII) & \
+ ~SCU_HW_STRAP_2ND_BOOT_WDT)
+
+/* Yosemite V2 BMC FRU */
+static const uint8_t yosemitev2_bmc_fruid[] = {
+ 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
+ 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x61,
+ 0x73, 0x65, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x4d, 0x50, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
+ 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
+ 0x69, 0x74, 0x65, 0x20, 0x56, 0x32, 0x20, 0x4d, 0x50, 0x00, 0x00, 0x00,
+ 0x00, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
+ 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
+};
+
+static const size_t yosemitev2_bmc_fruid_len = sizeof(yosemitev2_bmc_fruid);
+
+static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB);
+ at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB,
+ yosemitev2_bmc_fruid, yosemitev2_bmc_fruid_len);
+ /* TMP421 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "tmp421", 0x1f);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4e);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp421", 0x4f);
+
+}
+
+static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook YosemiteV2 BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = YOSEMITEV2_BMC_HW_STRAP1;
+ amc->hw_strap2 = 0;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 2;
+ amc->i2c_init = yosemitev2_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_yosemitev2_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("yosemitev2-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_yosemitev2_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_yosemitev2_types)
diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c
index f0ced29cf15b..124277eaca1a 100644
--- a/hw/arm/aspeed_eeprom.c
+++ b/hw/arm/aspeed_eeprom.c
@@ -78,27 +78,6 @@ const uint8_t fby35_bmc_fruid[] = {
0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
};
-/* Yosemite V2 BMC FRU */
-const uint8_t yosemitev2_bmc_fruid[] = {
- 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
- 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x61,
- 0x73, 0x65, 0x62, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x4d, 0x50, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
- 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
- 0x69, 0x74, 0x65, 0x20, 0x56, 0x32, 0x20, 0x4d, 0x50, 0x00, 0x00, 0x00,
- 0x00, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
- 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
-};
-
const uint8_t rainier_bb_fruid[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
@@ -163,7 +142,6 @@ const uint8_t gb200nvl_bmc_fruid[] = {
const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid);
const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid);
const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid);
-const size_t yosemitev2_bmc_fruid_len = sizeof(yosemitev2_bmc_fruid);
const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid);
const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid);
const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid);
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 870202ce8530..8d9f1e160908 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -47,6 +47,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_tiogapass.c',
+ 'aspeed_ast2500_yosemitev2.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 09/30] hw/arm/aspeed: Split Witherspoon machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (7 preceding siblings ...)
2025-11-04 8:31 ` [PULL 08/30] hw/arm/aspeed: Split YosemiteV2 machine into a separate source file for maintainability Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 10/30] hw/arm/aspeed: Split Sonorapass " Cédric Le Goater
` (20 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Witherspoon BMC machine implementation out of
aspeed.c and into a new dedicated file aspeed_ast2500_witherspoon.c.
To support splitting Witherspoon into a dedicated source file,
a new WITHERSPOON_BMC_HW_STRAP1 macro is added as a copy of
ROMULUS_BMC_HW_STRAP1.
The change is part of a broader effort to modularize Aspeed board
definitions, allowing each machine type to be maintained and updated
independently. By isolating Witherspoon logic, the aspeed.c file
becomes cleaner and easier to manage as more platforms are added.
Key updates include:
- Moved witherspoon_bmc_i2c_init() and related LED setup code into
aspeed_ast2500_witherspoon.c.
- Added WITHERSPOON_BMC_HW_STRAP1 replacement macro for local use.
- Removed aspeed_machine_witherspoon_class_init() and type
registration from aspeed.c.
- Added the new file to meson.build for compilation.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 82 --------------------
hw/arm/aspeed_ast2500_witherspoon.c | 112 ++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 113 insertions(+), 82 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_witherspoon.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 731ca7a1aa59..74eb8077da7d 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -117,9 +117,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2500_HW_STRAP_RESERVED1)
-/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
-#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
-
/* Quanta-Q71l hardware value */
#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
@@ -537,63 +534,6 @@ static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
}
-static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
-{
- static const struct {
- unsigned gpio_id;
- LEDColor color;
- const char *description;
- bool gpio_polarity;
- } pca1_leds[] = {
- {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW},
- {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},
- {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},
- };
- AspeedSoCState *soc = bmc->soc;
- uint8_t *eeprom_buf = g_malloc0(8 * 1024);
- DeviceState *dev;
- LEDState *led;
-
- /* Bus 3: TODO bmp280@77 */
- dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
- qdev_prop_set_string(dev, "description", "pca1");
- i2c_slave_realize_and_unref(I2C_SLAVE(dev),
- aspeed_i2c_get_bus(&soc->i2c, 3),
- &error_fatal);
-
- for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) {
- led = led_create_simple(OBJECT(bmc),
- pca1_leds[i].gpio_polarity,
- pca1_leds[i].color,
- pca1_leds[i].description);
- qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id,
- qdev_get_gpio_in(DEVICE(led), 0));
- }
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c);
-
- /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105,
- 0x4a);
-
- /*
- * The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
- * good enough
- */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
-
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51,
- eeprom_buf);
- dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
- qdev_prop_set_string(dev, "description", "pca0");
- i2c_slave_realize_and_unref(I2C_SLAVE(dev),
- aspeed_i2c_get_bus(&soc->i2c, 11),
- &error_fatal);
- /* Bus 11: TODO ucd90160@64 */
-}
-
static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1397,23 +1337,6 @@ static void aspeed_machine_sonorapass_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_witherspoon_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
- amc->fmc_model = "mx25l25635f";
- amc->spi_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->i2c_init = witherspoon_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1789,11 +1712,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_sonorapass_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_witherspoon_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_witherspoon.c b/hw/arm/aspeed_ast2500_witherspoon.c
new file mode 100644
index 000000000000..28d437fec086
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_witherspoon.c
@@ -0,0 +1,112 @@
+/*
+ * OpenPOWER Witherspoon
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/misc/led.h"
+#include "hw/sensor/tmp105.h"
+#include "hw/i2c/smbus_eeprom.h"
+#include "hw/gpio/pca9552.h"
+
+/* Witherspoon hardware value: 0xF10AD216 */
+#define WITHERSPOON_BMC_HW_STRAP1 ( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
+
+static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ static const struct {
+ unsigned gpio_id;
+ LEDColor color;
+ const char *description;
+ bool gpio_polarity;
+ } pca1_leds[] = {
+ {13, LED_COLOR_GREEN, "front-fault-4", GPIO_POLARITY_ACTIVE_LOW},
+ {14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},
+ {15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},
+ };
+ AspeedSoCState *soc = bmc->soc;
+ uint8_t *eeprom_buf = g_malloc0(8 * 1024);
+ DeviceState *dev;
+ LEDState *led;
+
+ /* Bus 3: TODO bmp280@77 */
+ dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
+ qdev_prop_set_string(dev, "description", "pca1");
+ i2c_slave_realize_and_unref(I2C_SLAVE(dev),
+ aspeed_i2c_get_bus(&soc->i2c, 3),
+ &error_fatal);
+
+ for (size_t i = 0; i < ARRAY_SIZE(pca1_leds); i++) {
+ led = led_create_simple(OBJECT(bmc),
+ pca1_leds[i].gpio_polarity,
+ pca1_leds[i].color,
+ pca1_leds[i].description);
+ qdev_connect_gpio_out(dev, pca1_leds[i].gpio_id,
+ qdev_get_gpio_in(DEVICE(led), 0));
+ }
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "dps310", 0x76);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3), "max31785", 0x52);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), "tmp423", 0x4c);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), "tmp423", 0x4c);
+
+ /* The Witherspoon expects a TMP275 but a TMP105 is compatible */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), TYPE_TMP105,
+ 0x4a);
+
+ /*
+ * The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is
+ * good enough
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 11), 0x51,
+ eeprom_buf);
+ dev = DEVICE(i2c_slave_new(TYPE_PCA9552, 0x60));
+ qdev_prop_set_string(dev, "description", "pca0");
+ i2c_slave_realize_and_unref(I2C_SLAVE(dev),
+ aspeed_i2c_get_bus(&soc->i2c, 11),
+ &error_fatal);
+ /* Bus 11: TODO ucd90160@64 */
+}
+
+static void aspeed_machine_witherspoon_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635f";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = witherspoon_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_witherspoon_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("witherspoon-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_witherspoon_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_witherspoon_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 8d9f1e160908..c235c8aed34d 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -47,6 +47,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_tiogapass.c',
+ 'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
'aspeed_ast2600.c',
'aspeed_ast10x0.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 10/30] hw/arm/aspeed: Split Sonorapass machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (8 preceding siblings ...)
2025-11-04 8:31 ` [PULL 09/30] hw/arm/aspeed: Split Witherspoon " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 11/30] hw/arm/aspeed: Split Romulus " Cédric Le Goater
` (19 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Sonorapass BMC machine implementation out of
aspeed.c and into a new standalone file aspeed_ast2500_sonorapass.c.
The refactor continues the effort to modularize Aspeed platform support
by separating each board’s implementation into its own source file.
This improves maintainability, readability, and simplifies future
updates to individual machine configurations.
Key updates include:
- Moved SONORAPASS_BMC_HW_STRAP1 definition into the new file.
- Moved sonorapass_bmc_i2c_init() and all I²C device initialization
logic from aspeed.c into aspeed_ast2500_sonorapass.c.
- Moved aspeed_machine_sonorapass_class_init() and type registration
into the new file.
- Added the new file to the build system (meson.build).
- Removed all Sonorapass-specific code and definitions from aspeed.c
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 82 -----------------------
hw/arm/aspeed_ast2500_sonorapass.c | 102 +++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 103 insertions(+), 82 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_sonorapass.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 74eb8077da7d..df1a37ca3df7 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -102,21 +102,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
-/* Sonorapass hardware value: 0xF100D216 */
-#define SONORAPASS_BMC_HW_STRAP1 ( \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_RESERVED28 | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_LPC_RESET_PIN | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
- SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_VGA_BIOS_ROM | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
- SCU_AST2500_HW_STRAP_RESERVED1)
-
/* Quanta-Q71l hardware value */
#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
@@ -490,50 +475,6 @@ I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
TYPE_PCA9554, addr);
}
-static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- /* bus 2 : */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49);
- /* bus 2 : pca9546 @ 0x73 */
-
- /* bus 3 : pca9548 @ 0x70 */
-
- /* bus 4 : */
- uint8_t *eeprom4_54 = g_malloc0(8 * 1024);
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
- eeprom4_54);
- /* PCA9539 @ 0x76, but PCA9552 is compatible */
- aspeed_create_pca9552(soc, 4, 0x76);
- /* PCA9539 @ 0x77, but PCA9552 is compatible */
- aspeed_create_pca9552(soc, 4, 0x77);
-
- /* bus 6 : */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49);
- /* bus 6 : pca9546 @ 0x73 */
-
- /* bus 8 : */
- uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
- eeprom8_56);
- aspeed_create_pca9552(soc, 8, 0x60);
- aspeed_create_pca9552(soc, 8, 0x61);
- /* bus 8 : adc128d818 @ 0x1d */
- /* bus 8 : adc128d818 @ 0x1f */
-
- /*
- * bus 13 : pca9548 @ 0x71
- * - channel 3:
- * - tmm421 @ 0x4c
- * - tmp421 @ 0x4e
- * - tmp421 @ 0x4f
- */
-
-}
-
static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1319,24 +1260,6 @@ static void aspeed_machine_romulus_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_sonorapass_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "OCP SonoraPass BMC (ARM1176)";
- mc->deprecation_reason = "use 'ast2500-evb' instead";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1;
- amc->fmc_model = "mx66l1g45g";
- amc->spi_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->i2c_init = sonorapass_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1707,11 +1630,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_romulus_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("sonorapass-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_sonorapass_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_sonorapass.c b/hw/arm/aspeed_ast2500_sonorapass.c
new file mode 100644
index 000000000000..84de4f56b376
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_sonorapass.c
@@ -0,0 +1,102 @@
+/*
+ * OCP SonoraPass
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* Sonorapass hardware value: 0xF100D216 */
+#define SONORAPASS_BMC_HW_STRAP1 ( \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_RESERVED28 | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER) | \
+ SCU_AST2500_HW_STRAP_SET_AXI_AHB_RATIO(AXI_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_VGA_BIOS_ROM | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
+ SCU_AST2500_HW_STRAP_RESERVED1)
+
+static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /* bus 2 : */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x49);
+ /* bus 2 : pca9546 @ 0x73 */
+
+ /* bus 3 : pca9548 @ 0x70 */
+
+ /* bus 4 : */
+ uint8_t *eeprom4_54 = g_malloc0(8 * 1024);
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54,
+ eeprom4_54);
+ /* PCA9539 @ 0x76, but PCA9552 is compatible */
+ aspeed_create_pca9552(soc, 4, 0x76);
+ /* PCA9539 @ 0x77, but PCA9552 is compatible */
+ aspeed_create_pca9552(soc, 4, 0x77);
+
+ /* bus 6 : */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49);
+ /* bus 6 : pca9546 @ 0x73 */
+
+ /* bus 8 : */
+ uint8_t *eeprom8_56 = g_malloc0(8 * 1024);
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 8), 0x56,
+ eeprom8_56);
+ aspeed_create_pca9552(soc, 8, 0x60);
+ aspeed_create_pca9552(soc, 8, 0x61);
+ /* bus 8 : adc128d818 @ 0x1d */
+ /* bus 8 : adc128d818 @ 0x1f */
+
+ /*
+ * bus 13 : pca9548 @ 0x71
+ * - channel 3:
+ * - tmm421 @ 0x4c
+ * - tmp421 @ 0x4e
+ * - tmp421 @ 0x4f
+ */
+
+}
+
+static void aspeed_machine_sonorapass_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OCP SonoraPass BMC (ARM1176)";
+ mc->deprecation_reason = "use 'ast2500-evb' instead";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = SONORAPASS_BMC_HW_STRAP1;
+ amc->fmc_model = "mx66l1g45g";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = sonorapass_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_sonorapass_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("sonorapass-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_sonorapass_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_sonorapass_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index c235c8aed34d..f59bfe5029dc 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -46,6 +46,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2400.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
+ 'aspeed_ast2500_sonorapass.c',
'aspeed_ast2500_tiogapass.c',
'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 11/30] hw/arm/aspeed: Split Romulus machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (9 preceding siblings ...)
2025-11-04 8:31 ` [PULL 10/30] hw/arm/aspeed: Split Sonorapass " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate " Cédric Le Goater
` (18 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Romulus BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2500_romulus.c.
The refactor continues the modularization of Aspeed platform
definitions, separating each board into its own C source file to
improve maintainability, readability, and reduce code clutter in
aspeed.c.
Key updates include:
- Moved ROMULUS_BMC_HW_STRAP1 definition to the new file.
- Moved romulus_bmc_i2c_init() and related I²C device setup.
- Moved aspeed_machine_romulus_class_init() and type registration
to aspeed_ast2500_romulus.c.
- Added the new file to the build system (meson.build).
- Removed all Romulus-specific code from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-12-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 43 -----------------------
hw/arm/aspeed_ast2500_romulus.c | 62 +++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 63 insertions(+), 43 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_romulus.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index df1a37ca3df7..c31b281f5584 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -92,16 +92,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_MAC0_RGMII) & \
~SCU_HW_STRAP_2ND_BOOT_WDT)
-/* Romulus hardware value: 0xF10AD206 */
-#define ROMULUS_BMC_HW_STRAP1 ( \
- AST2500_HW_STRAP1_DEFAULTS | \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
-
/* Quanta-Q71l hardware value */
#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
@@ -452,17 +442,6 @@ static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
TYPE_TMP105, 0x4d);
}
-static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- /*
- * The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
- * good enough
- */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
-}
-
void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
{
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
@@ -1243,23 +1222,6 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_romulus_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
- amc->fmc_model = "n25q256a";
- amc->spi_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->i2c_init = romulus_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1625,11 +1587,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2500_evb_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("romulus-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_romulus_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_romulus.c b/hw/arm/aspeed_ast2500_romulus.c
new file mode 100644
index 000000000000..91b660e74bba
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_romulus.c
@@ -0,0 +1,62 @@
+/*
+ * OpenPOWER Romulus
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+
+/* Romulus hardware value: 0xF10AD206 */
+#define ROMULUS_BMC_HW_STRAP1 ( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_AST2500_HW_STRAP_ACPI_ENABLE | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
+
+static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /*
+ * The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
+ * good enough
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32);
+}
+
+static void aspeed_machine_romulus_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->i2c_init = romulus_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_romulus_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("romulus-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_romulus_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_romulus_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index f59bfe5029dc..ff6a856523d9 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -46,6 +46,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2400.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
+ 'aspeed_ast2500_romulus.c',
'aspeed_ast2500_sonorapass.c',
'aspeed_ast2500_tiogapass.c',
'aspeed_ast2500_witherspoon.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (10 preceding siblings ...)
2025-11-04 8:31 ` [PULL 11/30] hw/arm/aspeed: Split Romulus " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 13/30] hw/arm/aspeed: Split AST2500 EVB machine into a separate source " Cédric Le Goater
` (17 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Supermicro X11SPI BMC machine definition from
aspeed.c into a new standalone file aspeed_ast2500_supermicro-x11spi.c,
and adds a dedicated I²C initialization function for the platform.
The refactor continues the effort to modularize Aspeed platform support,
ensuring each machine model is defined in its own source file. This improves
code organization, readability, and simplifies maintenance when adding or
modifying platform-specific behavior.
Previously, the Supermicro X11SPI machine reused
palmetto_bmc_i2c_init() for its I²C setup. To make the machine
definition fully self-contained, the function was copied and renamed
to supermicro_x11spi_bmc_i2c_init(). This ensures that the machine
can evolve independently without depending on Palmetto’s board logi
Key updates include:
- Moved SUPERMICRO_X11SPI_BMC_HW_STRAP1 macro and machine class init
(aspeed_machine_supermicro_x11spi_bmc_class_init) into a new file.
- Added new function supermicro_x11spi_bmc_i2c_init() copied from
palmetto_bmc_i2c_init() for independent control.
- Updated the machine definition to use the new I²C init function.
- Registered the new source file in meson.build.
- Removed all Supermicro X11SPI-related definitions from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-13-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 33 ----------
hw/arm/aspeed_ast2500_supermicro-x11spi.c | 77 +++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 78 insertions(+), 33 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_supermicro-x11spi.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index c31b281f5584..e1fa95b2c3ae 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -71,16 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* TODO: Find the actual hardware value */
-#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
- AST2500_HW_STRAP1_DEFAULTS | \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
-
/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 (( \
AST2500_HW_STRAP1_DEFAULTS | \
@@ -1187,24 +1177,6 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
- amc->fmc_model = "mx25l25635e";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = palmetto_bmc_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1577,11 +1549,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2500-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
new file mode 100644
index 000000000000..a2450aa96239
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c
@@ -0,0 +1,77 @@
+/*
+ * Supermicro X11 SPI
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* TODO: Find the actual hardware value */
+#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN))
+
+static void supermicro_x11spi_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+
+ /*
+ * The palmetto platform expects a ds3231 RTC but a ds1338 is
+ * enough to provide basic RTC features. Alarms will be missing
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
+ eeprom_buf);
+
+ /* add a TMP423 temperature sensor */
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "tmp423", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
+}
+
+static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Supermicro X11 SPI BMC (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = supermicro_x11spi_bmc_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_supermicro_x11spi_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ff6a856523d9..76a456c33fc7 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -48,6 +48,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_romulus.c',
'aspeed_ast2500_sonorapass.c',
+ 'aspeed_ast2500_supermicro-x11spi.c',
'aspeed_ast2500_tiogapass.c',
'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 13/30] hw/arm/aspeed: Split AST2500 EVB machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (11 preceding siblings ...)
2025-11-04 8:31 ` [PULL 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 14/30] hw/arm/aspeed: Split Quanta-Q71L " Cédric Le Goater
` (16 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the AST2500 EVB machine implementation out of
aspeed.c into a new standalone file aspeed_ast2500_evb.c.
This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future
development for new platforms without cluttering aspeed.c.
Key updates include:
- Moved AST2500_EVB_HW_STRAP1 macro definition into the new file.
- Moved ast2500_evb_i2c_init() I²C initialization logic.
- Moved aspeed_machine_ast2500_evb_class_init() and type registration.
- Added aspeed_ast2500_evb.c to the build system (meson.build).
- Removed all AST2500 EVB–specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-14-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 46 -------------------------
hw/arm/aspeed_ast2500_evb.c | 67 +++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 68 insertions(+), 46 deletions(-)
create mode 100644 hw/arm/aspeed_ast2500_evb.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index e1fa95b2c3ae..7d26d9241cb2 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -71,17 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* AST2500 evb hardware value: 0xF100C2E6 */
-#define AST2500_EVB_HW_STRAP1 (( \
- AST2500_HW_STRAP1_DEFAULTS | \
- SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
- SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
- SCU_AST2500_HW_STRAP_UART_DEBUG | \
- SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
- SCU_HW_STRAP_MAC1_RGMII | \
- SCU_HW_STRAP_MAC0_RGMII) & \
- ~SCU_HW_STRAP_2ND_BOOT_WDT)
-
/* Quanta-Q71l hardware value */
#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
@@ -406,19 +395,6 @@ static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
/* TODO: i2c-8: Add BMC FRU eeprom@50 */
}
-static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- uint8_t *eeprom_buf = g_malloc0(8 * 1024);
-
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
- eeprom_buf);
-
- /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
- TYPE_TMP105, 0x4d);
-}
-
static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1177,23 +1153,6 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Aspeed AST2500 EVB (ARM1176)";
- amc->soc_name = "ast2500-a1";
- amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
- amc->fmc_model = "mx25l25635e";
- amc->spi_model = "mx25l25635f";
- amc->num_cs = 1;
- amc->i2c_init = ast2500_evb_i2c_init;
- mc->default_ram_size = 512 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1549,11 +1508,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_supermicrox11_bmc_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("ast2500-evb"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_ast2500_evb_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2500_evb.c b/hw/arm/aspeed_ast2500_evb.c
new file mode 100644
index 000000000000..8b5cb67be9bf
--- /dev/null
+++ b/hw/arm/aspeed_ast2500_evb.c
@@ -0,0 +1,67 @@
+/*
+ * ASPEED AST2500 EVB
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+#include "hw/sensor/tmp105.h"
+
+/* AST2500 evb hardware value: 0xF100C2E6 */
+#define AST2500_EVB_HW_STRAP1 (( \
+ AST2500_HW_STRAP1_DEFAULTS | \
+ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \
+ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \
+ SCU_AST2500_HW_STRAP_UART_DEBUG | \
+ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \
+ SCU_HW_STRAP_MAC1_RGMII | \
+ SCU_HW_STRAP_MAC0_RGMII) & \
+ ~SCU_HW_STRAP_2ND_BOOT_WDT)
+
+static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ uint8_t *eeprom_buf = g_malloc0(8 * 1024);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
+ eeprom_buf);
+
+ /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
+ TYPE_TMP105, 0x4d);
+}
+
+static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2500 EVB (ARM1176)";
+ amc->soc_name = "ast2500-a1";
+ amc->hw_strap1 = AST2500_EVB_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx25l25635f";
+ amc->num_cs = 1;
+ amc->i2c_init = ast2500_evb_i2c_init;
+ mc->default_ram_size = 512 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2500_evb_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("ast2500-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2500_evb_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2500_evb_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 76a456c33fc7..021daba2865a 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -44,6 +44,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
+ 'aspeed_ast2500_evb.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
'aspeed_ast2500_romulus.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 14/30] hw/arm/aspeed: Split Quanta-Q71L machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (12 preceding siblings ...)
2025-11-04 8:31 ` [PULL 13/30] hw/arm/aspeed: Split AST2500 EVB machine into a separate source " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 15/30] hw/arm/aspeed: Split Supermicro X11 " Cédric Le Goater
` (15 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Quanta-Q71L BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_quanta-q71l.c.
This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future
development for new platforms without cluttering aspeed.c
Key updates include:
- Moved QUANTA_Q71L_BMC_HW_STRAP1 macro definition into the new file.
- Moved quanta_q71l_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_quanta_q71l_class_init() and type registration.
- Added aspeed_ast2400_quanta-q71l.c to the build system (meson.build).
- Removed all Quanta-Q71L–specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-15-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 67 ----------------------
hw/arm/aspeed_ast2400_quanta-q71l.c | 86 +++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 87 insertions(+), 67 deletions(-)
create mode 100644 hw/arm/aspeed_ast2400_quanta-q71l.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 7d26d9241cb2..f9e6d8c4c6dc 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -71,19 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* Quanta-Q71l hardware value */
-#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
- SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
- SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
- SCU_AST2400_HW_STRAP_ACPI_DIS | \
- SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
- SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
- SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-
/* AST2600 evb hardware value */
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
@@ -363,38 +350,6 @@ static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
}
-static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- /*
- * The quanta-q71l platform expects tmp75s which are compatible with
- * tmp105s.
- */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
-
- /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
- /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
- /* TODO: Add Memory Riser i2c mux and eeproms. */
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
-
- /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
-
- /* i2c-7 */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
- /* - i2c@0: pmbus@59 */
- /* - i2c@1: pmbus@58 */
- /* - i2c@2: pmbus@58 */
- /* - i2c@3: pmbus@59 */
-
- /* TODO: i2c-7: Add PDB FRU eeprom@52 */
- /* TODO: i2c-8: Add BMC FRU eeprom@50 */
-}
-
static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1118,23 +1073,6 @@ static void aspeed_machine_palmetto_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
- amc->soc_name = "ast2400-a1";
- amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
- amc->fmc_model = "n25q256a";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 1;
- amc->i2c_init = quanta_q71l_bmc_i2c_init;
- mc->default_ram_size = 128 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
const void *data)
{
@@ -1523,11 +1461,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_firework_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_quanta_q71l_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2400_quanta-q71l.c b/hw/arm/aspeed_ast2400_quanta-q71l.c
new file mode 100644
index 000000000000..42ad2a2303f7
--- /dev/null
+++ b/hw/arm/aspeed_ast2400_quanta-q71l.c
@@ -0,0 +1,86 @@
+/*
+ * Quanta Q71l
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+
+/* Quanta-Q71l hardware value */
+#define QUANTA_Q71L_BMC_HW_STRAP1 ( \
+ SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
+ SCU_AST2400_HW_STRAP_DRAM_CONFIG(2/* DDR3 with CL=6, CWL=5 */) | \
+ SCU_AST2400_HW_STRAP_ACPI_DIS | \
+ SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_24M_IN) | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_PASS_THROUGH) | \
+ SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_8M_DRAM) | \
+ SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
+
+static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /*
+ * The quanta-q71l platform expects tmp75s which are compatible with
+ * tmp105s.
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4c);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4e);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4f);
+
+ /* TODO: i2c-1: Add baseboard FRU eeprom@54 24c64 */
+ /* TODO: i2c-1: Add Frontpanel FRU eeprom@57 24c64 */
+ /* TODO: Add Memory Riser i2c mux and eeproms. */
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9546", 0x74);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "pca9548", 0x77);
+
+ /* TODO: i2c-3: Add BIOS FRU eeprom@56 24c64 */
+
+ /* i2c-7 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "pca9546", 0x70);
+ /* - i2c@0: pmbus@59 */
+ /* - i2c@1: pmbus@58 */
+ /* - i2c@2: pmbus@58 */
+ /* - i2c@3: pmbus@59 */
+
+ /* TODO: i2c-7: Add PDB FRU eeprom@52 */
+ /* TODO: i2c-8: Add BMC FRU eeprom@50 */
+}
+
+static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Quanta-Q71l BMC (ARM926EJ-S)";
+ amc->soc_name = "ast2400-a1";
+ amc->hw_strap1 = QUANTA_Q71L_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->i2c_init = quanta_q71l_bmc_i2c_init;
+ mc->default_ram_size = 128 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2400_quanta_q71l_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("quanta-q71l-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_quanta_q71l_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2400_quanta_q71l_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 021daba2865a..5467ee673db7 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -44,6 +44,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
+ 'aspeed_ast2400_quanta-q71l.c',
'aspeed_ast2500_evb.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 15/30] hw/arm/aspeed: Split Supermicro X11 machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (13 preceding siblings ...)
2025-11-04 8:31 ` [PULL 14/30] hw/arm/aspeed: Split Quanta-Q71L " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 16/30] hw/arm/aspeed: Split Palmetto " Cédric Le Goater
` (14 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Supermicro X11 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_supermicrox11.c and
removes its dependency on the Palmetto platform’s I²C initialization.
This refactor continues the modularization effort for Aspeed platform support,
ensuring that each board’s configuration resides in its own dedicated source file.
By duplicating and renaming the palmetto_bmc_i2c_init() logic into
supermicrox11_bmc_i2c_init(), this change removes unwanted coupling between
the two board definitions.
Key updates include:
- Moved SUPERMICROX11_BMC_HW_STRAP1 macro definition into a new file.
- Moved aspeed_machine_supermicrox11_bmc_class_init() and type registration into a new file.
- Added a dedicated supermicrox11_bmc_i2c_init() function (copied and renamed from Palmetto’s version).
- Added the new file aspeed_ast2400_supermicrox11.c to the build system (meson.build).
- Removed all Supermicro X11–specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-16-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 37 ------------
hw/arm/aspeed_ast2400_supermicrox11.c | 81 +++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 82 insertions(+), 37 deletions(-)
create mode 100644 hw/arm/aspeed_ast2400_supermicrox11.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index f9e6d8c4c6dc..fbd27020bd2d 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -57,20 +57,6 @@ static struct arm_boot_info aspeed_board_binfo = {
SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-/* TODO: Find the actual hardware value */
-#define SUPERMICROX11_BMC_HW_STRAP1 ( \
- SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
- SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
- SCU_AST2400_HW_STRAP_ACPI_DIS | \
- SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_LPC_RESET_PIN | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
- SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
- SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-
/* AST2600 evb hardware value */
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
@@ -1073,24 +1059,6 @@ static void aspeed_machine_palmetto_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
- amc->soc_name = "ast2400-a1";
- amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
- amc->fmc_model = "mx25l25635e";
- amc->spi_model = "mx25l25635e";
- amc->num_cs = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = palmetto_bmc_i2c_init;
- mc->default_ram_size = 256 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1441,11 +1409,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_palmetto_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_supermicrox11_bmc_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2400_supermicrox11.c b/hw/arm/aspeed_ast2400_supermicrox11.c
new file mode 100644
index 000000000000..88cdb01fc762
--- /dev/null
+++ b/hw/arm/aspeed_ast2400_supermicrox11.c
@@ -0,0 +1,81 @@
+/*
+ * Supermicro X11
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* TODO: Find the actual hardware value */
+#define SUPERMICROX11_BMC_HW_STRAP1 ( \
+ SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_128MB) | \
+ SCU_AST2400_HW_STRAP_DRAM_CONFIG(2) | \
+ SCU_AST2400_HW_STRAP_ACPI_DIS | \
+ SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
+ SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
+ SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
+
+static void supermicrox11_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+
+ /*
+ * The palmetto platform expects a ds3231 RTC but a ds1338 is
+ * enough to provide basic RTC features. Alarms will be missing
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
+ eeprom_buf);
+
+ /* add a TMP423 temperature sensor */
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "tmp423", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
+}
+
+static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Supermicro X11 BMC (ARM926EJ-S)";
+ amc->soc_name = "ast2400-a1";
+ amc->hw_strap1 = SUPERMICROX11_BMC_HW_STRAP1;
+ amc->fmc_model = "mx25l25635e";
+ amc->spi_model = "mx25l25635e";
+ amc->num_cs = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = supermicrox11_bmc_i2c_init;
+ mc->default_ram_size = 256 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2400_supermicrox11_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("supermicrox11-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_supermicrox11_bmc_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2400_supermicrox11_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 5467ee673db7..ea2d24af88a0 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -45,6 +45,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_soc_common.c',
'aspeed_ast2400.c',
'aspeed_ast2400_quanta-q71l.c',
+ 'aspeed_ast2400_supermicrox11.c',
'aspeed_ast2500_evb.c',
'aspeed_ast2500_fp5280g2.c',
'aspeed_ast2500_g220a.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 16/30] hw/arm/aspeed: Split Palmetto machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (14 preceding siblings ...)
2025-11-04 8:31 ` [PULL 15/30] hw/arm/aspeed: Split Supermicro X11 " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 17/30] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse Cédric Le Goater
` (13 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the OpenPOWER Palmetto BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2400_palmetto.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.
Key updates include:
- Moved PALMETTO_BMC_HW_STRAP1 macro definition from into the new file.
- Moved palmetto_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_palmetto_class_init() and type registration.
- Added aspeed_ast2400_palmetto.c to the build system (meson.build).
- Removed all Palmetto-specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-17-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 60 ------------------------
hw/arm/aspeed_ast2400_palmetto.c | 80 ++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 81 insertions(+), 60 deletions(-)
create mode 100644 hw/arm/aspeed_ast2400_palmetto.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index fbd27020bd2d..15d3b045ac44 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -43,20 +43,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define ASPEED_RAM_SIZE(sz) (sz)
#endif
-/* Palmetto hardware value: 0x120CE416 */
-#define PALMETTO_BMC_HW_STRAP1 ( \
- SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
- SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
- SCU_AST2400_HW_STRAP_ACPI_DIS | \
- SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
- SCU_HW_STRAP_VGA_CLASS_CODE | \
- SCU_HW_STRAP_LPC_RESET_PIN | \
- SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
- SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
- SCU_HW_STRAP_SPI_WIDTH | \
- SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
- SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
-
/* AST2600 evb hardware value */
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
@@ -312,30 +298,6 @@ static void aspeed_machine_init(MachineState *machine)
arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
}
-static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- DeviceState *dev;
- uint8_t *eeprom_buf = g_malloc0(32 * 1024);
-
- /*
- * The palmetto platform expects a ds3231 RTC but a ds1338 is
- * enough to provide basic RTC features. Alarms will be missing
- */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
-
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
- eeprom_buf);
-
- /* add a TMP423 temperature sensor */
- dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
- "tmp423", 0x4c));
- object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
- object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
-}
-
static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1042,23 +1004,6 @@ static void aspeed_machine_class_init(ObjectClass *oc, const void *data)
aspeed_machine_class_props_init(oc);
}
-static void aspeed_machine_palmetto_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
- amc->soc_name = "ast2400-a1";
- amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
- amc->fmc_model = "n25q256a";
- amc->spi_model = "mx25l25635f";
- amc->num_cs = 1;
- amc->i2c_init = palmetto_bmc_i2c_init;
- mc->default_ram_size = 256 * MiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
const void *data)
{
@@ -1405,11 +1350,6 @@ static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
static const TypeInfo aspeed_machine_types[] = {
{
- .name = MACHINE_TYPE_NAME("palmetto-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_palmetto_class_init,
- .interfaces = arm_machine_interfaces,
- }, {
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
diff --git a/hw/arm/aspeed_ast2400_palmetto.c b/hw/arm/aspeed_ast2400_palmetto.c
new file mode 100644
index 000000000000..776aa43a45de
--- /dev/null
+++ b/hw/arm/aspeed_ast2400_palmetto.c
@@ -0,0 +1,80 @@
+/*
+ * OpenPOWER Palmetto
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+/* Palmetto hardware value: 0x120CE416 */
+#define PALMETTO_BMC_HW_STRAP1 ( \
+ SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \
+ SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
+ SCU_AST2400_HW_STRAP_ACPI_DIS | \
+ SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \
+ SCU_HW_STRAP_VGA_CLASS_CODE | \
+ SCU_HW_STRAP_LPC_RESET_PIN | \
+ SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \
+ SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
+ SCU_HW_STRAP_SPI_WIDTH | \
+ SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \
+ SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
+
+static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ DeviceState *dev;
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+
+ /*
+ * The palmetto platform expects a ds3231 RTC but a ds1338 is
+ * enough to provide basic RTC features. Alarms will be missing
+ */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50,
+ eeprom_buf);
+
+ /* add a TMP423 temperature sensor */
+ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2),
+ "tmp423", 0x4c));
+ object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort);
+ object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort);
+}
+
+static void aspeed_machine_palmetto_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
+ amc->soc_name = "ast2400-a1";
+ amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1;
+ amc->fmc_model = "n25q256a";
+ amc->spi_model = "mx25l25635f";
+ amc->num_cs = 1;
+ amc->i2c_init = palmetto_bmc_i2c_init;
+ mc->default_ram_size = 256 * MiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2400_palmetto_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("palmetto-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_palmetto_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2400_palmetto_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index ea2d24af88a0..e52901108be2 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -44,6 +44,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
+ 'aspeed_ast2400_palmetto.c',
'aspeed_ast2400_quanta-q71l.c',
'aspeed_ast2400_supermicrox11.c',
'aspeed_ast2500_evb.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 17/30] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (15 preceding siblings ...)
2025-11-04 8:31 ` [PULL 16/30] hw/arm/aspeed: Split Palmetto " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 18/30] hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability Cédric Le Goater
` (12 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
Moving it into aspeed.h allows all Aspeed machine source files
(AST2400, AST2500, AST2600, AST2700, etc.) to reuse the same macro
definition for consistent behavior and maintainability.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-18-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 7 +++++++
hw/arm/aspeed.c | 7 -------
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 16b24e68870a..84620f49ed2d 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -25,6 +25,13 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
#define ASPEED_MAC2_ON (1 << 2)
#define ASPEED_MAC3_ON (1 << 3)
+/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
+#if HOST_LONG_BITS == 32
+#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
+#else
+#define ASPEED_RAM_SIZE(sz) (sz)
+#endif
+
struct AspeedMachineState {
MachineState parent_obj;
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 15d3b045ac44..ba0c9a62ff66 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -36,13 +36,6 @@ static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
};
-/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
-#if HOST_LONG_BITS == 32
-#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
-#else
-#define ASPEED_RAM_SIZE(sz) (sz)
-#endif
-
/* AST2600 evb hardware value */
#define AST2600_EVB_HW_STRAP1 0x000000C0
#define AST2600_EVB_HW_STRAP2 0x00000003
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 18/30] hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (16 preceding siblings ...)
2025-11-04 8:31 ` [PULL 17/30] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 19/30] hw/arm/aspeed: Split FBY35 BMC " Cédric Le Goater
` (11 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Facebook Bletchley BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_bletchley.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.
Key updates include:
- Moved BLETCHLEY_BMC_HW_STRAP1 and BLETCHLEY_BMC_HW_STRAP2 macro definitions into the new file.
- Moved bletchley_bmc_i2c_init() I²C initialization logic into the new file.
- Moved aspeed_machine_bletchley_class_init() and type registration.
- Added aspeed_ast2600_bletchley.c to the build system (meson.build).
- Removed all Bletchley-specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-19-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 77 ------------------------
hw/arm/aspeed_ast2600_bletchley.c | 97 +++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 98 insertions(+), 77 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_bletchley.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ba0c9a62ff66..3acb45b22c28 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -56,10 +56,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define FUJI_BMC_HW_STRAP1 0x00000000
#define FUJI_BMC_HW_STRAP2 0x00000000
-/* Bletchley hardware value */
-#define BLETCHLEY_BMC_HW_STRAP1 0x00002000
-#define BLETCHLEY_BMC_HW_STRAP2 0x00000801
-
/* GB200NVL hardware value */
#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
@@ -685,53 +681,6 @@ static void catalina_bmc_i2c_init(AspeedMachineState *bmc)
at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
}
-static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CBus *i2c[13] = {};
- for (int i = 0; i < 13; i++) {
- if ((i == 8) || (i == 11)) {
- continue;
- }
- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
- }
-
- /* Bus 0 - 5 all have the same config. */
- for (int i = 0; i < 6; i++) {
- /* Missing model: ti,ina230 @ 0x45 */
- /* Missing model: mps,mp5023 @ 0x40 */
- i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f);
- /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */
- i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76);
- i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67);
- /* Missing model: fsc,fusb302 @ 0x22 */
- }
-
- /* Bus 6 */
- at24c_eeprom_init(i2c[6], 0x56, 65536);
- /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */
- i2c_slave_create_simple(i2c[6], "ds1338", 0x51);
-
-
- /* Bus 7 */
- at24c_eeprom_init(i2c[7], 0x54, 65536);
-
- /* Bus 9 */
- i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f);
-
- /* Bus 10 */
- i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f);
- /* Missing model: ti,hdc1080 @ 0x40 */
- i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67);
-
- /* Bus 12 */
- /* Missing model: adi,adm1278 @ 0x11 */
- i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c);
- i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d);
- i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
-}
-
-
static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1059,27 +1008,6 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *data)
aspeed_machine_class_init_cpus_defaults(mc);
};
-#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
-
-static void aspeed_machine_bletchley_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook Bletchley BMC (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1;
- amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2;
- amc->fmc_model = "w25q01jvq";
- amc->spi_model = NULL;
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC2_ON;
- amc->i2c_init = bletchley_bmc_i2c_init;
- mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static void aspeed_machine_catalina_class_init(ObjectClass *oc,
const void *data)
{
@@ -1367,11 +1295,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_fuji_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("bletchley-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_bletchley_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_bletchley.c b/hw/arm/aspeed_ast2600_bletchley.c
new file mode 100644
index 000000000000..b7e84db1438a
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_bletchley.c
@@ -0,0 +1,97 @@
+/*
+ * Facebook Bletchley
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/gpio/pca9552.h"
+#include "hw/nvram/eeprom_at24c.h"
+
+#define TYPE_TMP421 "tmp421"
+/* Bletchley hardware value */
+#define BLETCHLEY_BMC_HW_STRAP1 0x00002000
+#define BLETCHLEY_BMC_HW_STRAP2 0x00000801
+#define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
+
+static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CBus *i2c[13] = {};
+ for (int i = 0; i < 13; i++) {
+ if ((i == 8) || (i == 11)) {
+ continue;
+ }
+ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
+ }
+
+ /* Bus 0 - 5 all have the same config. */
+ for (int i = 0; i < 6; i++) {
+ /* Missing model: ti,ina230 @ 0x45 */
+ /* Missing model: mps,mp5023 @ 0x40 */
+ i2c_slave_create_simple(i2c[i], TYPE_TMP421, 0x4f);
+ /* Missing model: nxp,pca9539 @ 0x76, but PCA9552 works enough */
+ i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x76);
+ i2c_slave_create_simple(i2c[i], TYPE_PCA9552, 0x67);
+ /* Missing model: fsc,fusb302 @ 0x22 */
+ }
+
+ /* Bus 6 */
+ at24c_eeprom_init(i2c[6], 0x56, 65536);
+ /* Missing model: nxp,pcf85263 @ 0x51 , but ds1338 works enough */
+ i2c_slave_create_simple(i2c[6], "ds1338", 0x51);
+
+
+ /* Bus 7 */
+ at24c_eeprom_init(i2c[7], 0x54, 65536);
+
+ /* Bus 9 */
+ i2c_slave_create_simple(i2c[9], TYPE_TMP421, 0x4f);
+
+ /* Bus 10 */
+ i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x4f);
+ /* Missing model: ti,hdc1080 @ 0x40 */
+ i2c_slave_create_simple(i2c[10], TYPE_PCA9552, 0x67);
+
+ /* Bus 12 */
+ /* Missing model: adi,adm1278 @ 0x11 */
+ i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4c);
+ i2c_slave_create_simple(i2c[12], TYPE_TMP421, 0x4d);
+ i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
+}
+
+static void aspeed_machine_bletchley_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook Bletchley BMC (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = BLETCHLEY_BMC_HW_STRAP1;
+ amc->hw_strap2 = BLETCHLEY_BMC_HW_STRAP2;
+ amc->fmc_model = "w25q01jvq";
+ amc->spi_model = NULL;
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON;
+ amc->i2c_init = bletchley_bmc_i2c_init;
+ mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2600_bletchley_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("bletchley-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_bletchley_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_bletchley_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index e52901108be2..6d80e2caf9c5 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -57,6 +57,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_witherspoon.c',
'aspeed_ast2500_yosemitev2.c',
'aspeed_ast2600.c',
+ 'aspeed_ast2600_bletchley.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
'fby35.c'))
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 19/30] hw/arm/aspeed: Split FBY35 BMC machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (17 preceding siblings ...)
2025-11-04 8:31 ` [PULL 18/30] hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 20/30] hw/arm/aspeed: Split Fuji " Cédric Le Goater
` (10 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Facebook fby35 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_fby35.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.
Key updates include:
- Moved fby35_i2c_init() and fby35_reset() to the new file.
- Moved aspeed_machine_fby35_class_init() and machine registration to the new file.
- Removed fby35 FRU data (fby35_nic_fruid, fby35_bb_fruid, fby35_bmc_fruid) and their size definitions from aspeed_eeprom.[ch].
- Added aspeed_ast2600_fby35.c to the build system (meson.build).
- Cleaned up all fby35-specific code and declarations from aspeed.c and aspeed_eeprom.*.
- Introduced FBY35_BMC_RAM_SIZE macro based on FUJI_BMC_RAM_SIZE to remove
inter-file dependency.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-20-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_eeprom.h | 7 --
hw/arm/aspeed.c | 79 ---------------
hw/arm/aspeed_ast2600_fby35.c | 178 ++++++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 74 --------------
hw/arm/meson.build | 1 +
5 files changed, 179 insertions(+), 160 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_fby35.c
diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h
index 5448eeeab7ab..7207bb2cbd39 100644
--- a/hw/arm/aspeed_eeprom.h
+++ b/hw/arm/aspeed_eeprom.h
@@ -7,13 +7,6 @@
#ifndef ASPEED_EEPROM_H
#define ASPEED_EEPROM_H
-extern const uint8_t fby35_nic_fruid[];
-extern const uint8_t fby35_bb_fruid[];
-extern const uint8_t fby35_bmc_fruid[];
-extern const size_t fby35_nic_fruid_len;
-extern const size_t fby35_bb_fruid_len;
-extern const size_t fby35_bmc_fruid_len;
-
extern const uint8_t rainier_bb_fruid[];
extern const size_t rainier_bb_fruid_len;
extern const uint8_t rainier_bmc_fruid[];
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 3acb45b22c28..e44aec69bd2b 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -719,38 +719,6 @@ static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
gb200nvl_bmc_fruid_len);
}
-static void fby35_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CBus *i2c[16];
-
- for (int i = 0; i < 16; i++) {
- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
- }
-
- i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
- i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
- /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */
- i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
- i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
- i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
-
- at24c_eeprom_init(i2c[4], 0x51, 128 * KiB);
- at24c_eeprom_init(i2c[6], 0x51, 128 * KiB);
- at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid,
- fby35_nic_fruid_len);
- at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid,
- fby35_bb_fruid_len);
- at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid,
- fby35_bmc_fruid_len);
-
- /*
- * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on
- * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on
- * each.
- */
-}
-
static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
{
AspeedSoCState *soc = bmc->soc;
@@ -1053,48 +1021,6 @@ static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc,
aspeed_machine_ast2600_class_emmc_init(oc);
}
-static void fby35_reset(MachineState *state, ResetType type)
-{
- AspeedMachineState *bmc = ASPEED_MACHINE(state);
- AspeedGPIOState *gpio = &bmc->soc->gpio;
-
- qemu_devices_reset(type);
-
- /* Board ID: 7 (Class-1, 4 slots) */
- object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal);
-
- /* Slot presence pins, inverse polarity. (False means present) */
- object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal);
-
- /* Slot 12v power pins, normal polarity. (True means powered-on) */
- object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal);
- object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal);
-}
-
-static void aspeed_machine_fby35_class_init(ObjectClass *oc, const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook fby35 BMC (Cortex-A7)";
- mc->reset = fby35_reset;
- amc->fmc_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC3_ON;
- amc->i2c_init = fby35_i2c_init;
- /* FIXME: Replace this macro with something more general */
- mc->default_ram_size = FUJI_BMC_RAM_SIZE;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
/* Main SYSCLK frequency in Hz (200MHz) */
#define SYSCLK_FRQ 200000000ULL
@@ -1305,11 +1231,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_catalina_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("fby35-bmc"),
- .parent = MACHINE_TYPE_NAME("ast2600-evb"),
- .class_init = aspeed_machine_fby35_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_fby35.c b/hw/arm/aspeed_ast2600_fby35.c
new file mode 100644
index 000000000000..f62442707040
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_fby35.c
@@ -0,0 +1,178 @@
+/*
+ * Facebook fby35
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+#include "hw/sensor/tmp105.h"
+#include "system/reset.h"
+
+#define TYPE_LM75 TYPE_TMP105
+#define TYPE_TMP421 "tmp421"
+#define FBY35_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
+
+static const uint8_t fby35_nic_fruid[] = {
+ 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7,
+ 0x5e, 0xcf, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd,
+ 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, 0x6e,
+ 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f,
+ 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xcc, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72,
+ 0x20, 0x30, 0x2e, 0x30, 0x32, 0xc0, 0xc0, 0xc0, 0xc1, 0x00, 0x00, 0x2f,
+ 0x01, 0x11, 0x19, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f,
+ 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20,
+ 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xd3, 0x41, 0x39, 0x20, 0x20, 0x20, 0x20, 0x20,
+ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
+ 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63,
+ 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0xdb, 0xc0, 0x82, 0x30, 0x15, 0x79, 0x7f, 0xa6, 0x00,
+ 0x01, 0x18, 0x0b, 0xff, 0x08, 0x00, 0xff, 0xff, 0x64, 0x00, 0x00, 0x00,
+ 0x00, 0x03, 0x20, 0x01, 0xff, 0xff, 0x04, 0x46, 0x00, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0x01, 0x81, 0x09, 0x15, 0xb3, 0x10, 0x1d, 0x00,
+ 0x24, 0x15, 0xb3, 0x00, 0x02, 0xeb, 0x8a, 0x95, 0x5c,
+};
+static const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid);
+
+static const uint8_t fby35_bb_fruid[] = {
+ 0x01, 0x00, 0x01, 0x03, 0x10, 0x00, 0x00, 0xeb, 0x01, 0x02, 0x17, 0xc3,
+ 0x4e, 0x2f, 0x41, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x23,
+ 0x01, 0x0d, 0x00, 0xb6, 0xd2, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0xd5, 0x4d, 0x61, 0x6e, 0x61, 0x67, 0x65, 0x6d, 0x65, 0x6e, 0x74,
+ 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x77, 0x42, 0x4d, 0x43, 0xcd,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x01, 0x0c, 0x00, 0xc6,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
+ 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54,
+ 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f,
+ 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43,
+};
+static const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid);
+
+static const uint8_t fby35_bmc_fruid[] = {
+ 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
+ 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d,
+ 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f,
+ 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
+ 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
+ 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54,
+ 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
+ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
+ 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
+};
+static const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid);
+
+static void fby35_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CBus *i2c[16];
+
+ for (int i = 0; i < 16; i++) {
+ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
+ }
+
+ i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
+ i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
+ /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */
+ i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
+ i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
+ i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
+
+ at24c_eeprom_init(i2c[4], 0x51, 128 * KiB);
+ at24c_eeprom_init(i2c[6], 0x51, 128 * KiB);
+ at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid,
+ fby35_nic_fruid_len);
+ at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid,
+ fby35_bb_fruid_len);
+ at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid,
+ fby35_bmc_fruid_len);
+
+ /*
+ * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on
+ * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on
+ * each.
+ */
+}
+
+static void fby35_reset(MachineState *state, ResetType type)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(state);
+ AspeedGPIOState *gpio = &bmc->soc->gpio;
+
+ qemu_devices_reset(type);
+
+ /* Board ID: 7 (Class-1, 4 slots) */
+ object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal);
+
+ /* Slot presence pins, inverse polarity. (False means present) */
+ object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal);
+
+ /* Slot 12v power pins, normal polarity. (True means powered-on) */
+ object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal);
+ object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal);
+}
+
+static void aspeed_machine_fby35_class_init(ObjectClass *oc, const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook fby35 BMC (Cortex-A7)";
+ mc->reset = fby35_reset;
+ amc->fmc_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC3_ON;
+ amc->i2c_init = fby35_i2c_init;
+ mc->default_ram_size = FBY35_BMC_RAM_SIZE;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast2600_fby35_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("fby35-bmc"),
+ .parent = MACHINE_TYPE_NAME("ast2600-evb"),
+ .class_init = aspeed_machine_fby35_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_fby35_types)
diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c
index 124277eaca1a..53c9b0d56f03 100644
--- a/hw/arm/aspeed_eeprom.c
+++ b/hw/arm/aspeed_eeprom.c
@@ -7,77 +7,6 @@
#include "qemu/osdep.h"
#include "aspeed_eeprom.h"
-const uint8_t fby35_nic_fruid[] = {
- 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7,
- 0x5e, 0xcf, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd,
- 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, 0x6e,
- 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f,
- 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xcc, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72,
- 0x20, 0x30, 0x2e, 0x30, 0x32, 0xc0, 0xc0, 0xc0, 0xc1, 0x00, 0x00, 0x2f,
- 0x01, 0x11, 0x19, 0xc8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f,
- 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20,
- 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xd3, 0x41, 0x39, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63,
- 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xdb, 0xc0, 0x82, 0x30, 0x15, 0x79, 0x7f, 0xa6, 0x00,
- 0x01, 0x18, 0x0b, 0xff, 0x08, 0x00, 0xff, 0xff, 0x64, 0x00, 0x00, 0x00,
- 0x00, 0x03, 0x20, 0x01, 0xff, 0xff, 0x04, 0x46, 0x00, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0x01, 0x81, 0x09, 0x15, 0xb3, 0x10, 0x1d, 0x00,
- 0x24, 0x15, 0xb3, 0x00, 0x02, 0xeb, 0x8a, 0x95, 0x5c,
-};
-
-const uint8_t fby35_bb_fruid[] = {
- 0x01, 0x00, 0x01, 0x03, 0x10, 0x00, 0x00, 0xeb, 0x01, 0x02, 0x17, 0xc3,
- 0x4e, 0x2f, 0x41, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x23,
- 0x01, 0x0d, 0x00, 0xb6, 0xd2, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0xd5, 0x4d, 0x61, 0x6e, 0x61, 0x67, 0x65, 0x6d, 0x65, 0x6e, 0x74,
- 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x77, 0x42, 0x4d, 0x43, 0xcd,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x01, 0x0c, 0x00, 0xc6,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
- 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54,
- 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f,
- 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43,
-};
-
-const uint8_t fby35_bmc_fruid[] = {
- 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36,
- 0xe6, 0xd0, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d,
- 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20, 0x4d, 0x6f,
- 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e,
- 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d,
- 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54,
- 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9,
- 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f,
- 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45,
-};
-
const uint8_t rainier_bb_fruid[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
@@ -139,9 +68,6 @@ const uint8_t gb200nvl_bmc_fruid[] = {
};
-const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid);
-const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid);
-const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid);
const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid);
const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid);
const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid);
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 6d80e2caf9c5..4abfbffb45fa 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -58,6 +58,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_yosemitev2.c',
'aspeed_ast2600.c',
'aspeed_ast2600_bletchley.c',
+ 'aspeed_ast2600_fby35.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
'fby35.c'))
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 20/30] hw/arm/aspeed: Split Fuji machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (18 preceding siblings ...)
2025-11-04 8:31 ` [PULL 19/30] hw/arm/aspeed: Split FBY35 BMC " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 21/30] hw/arm/aspeed: Split QCOM Firework " Cédric Le Goater
` (9 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Facebook Fuji BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_fuji.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file.
It improves maintainability, readability, and simplifies future development for
new platforms without cluttering aspeed.c.
Key updates include:
- Moved FUJI_BMC_HW_STRAP1 and FUJI_BMC_HW_STRAP2 macro definitions into the new file.
- Moved fuji_bmc_i2c_init() and its helper get_pca9548_channels() into the new file.
- Moved aspeed_machine_fuji_class_init() and type registration to aspeed_ast2600_fuji.c.
- Added aspeed_ast2600_fuji.c to the build system (meson.build).
- Cleaned up all Fuji-specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-21-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 117 -----------------------------
hw/arm/aspeed_ast2600_fuji.c | 140 +++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 141 insertions(+), 117 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_fuji.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index e44aec69bd2b..29a036b675ea 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -52,10 +52,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
#define RAINIER_BMC_HW_STRAP2 0x80000848
-/* Fuji hardware value */
-#define FUJI_BMC_HW_STRAP1 0x00000000
-#define FUJI_BMC_HW_STRAP2 0x00000000
-
/* GB200NVL hardware value */
#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
@@ -416,95 +412,8 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
aspeed_create_pca9552(soc, 15, 0x60);
}
-static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
- I2CBus **channels)
-{
- I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr);
- for (int i = 0; i < 8; i++) {
- channels[i] = pca954x_i2c_get_bus(mux, i);
- }
-}
-
#define TYPE_LM75 TYPE_TMP105
#define TYPE_TMP75 TYPE_TMP105
-#define TYPE_TMP422 "tmp422"
-
-static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CBus *i2c[144] = {};
-
- for (int i = 0; i < 16; i++) {
- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
- }
- I2CBus *i2c180 = i2c[2];
- I2CBus *i2c480 = i2c[8];
- I2CBus *i2c600 = i2c[11];
-
- get_pca9548_channels(i2c180, 0x70, &i2c[16]);
- get_pca9548_channels(i2c480, 0x70, &i2c[24]);
- /* NOTE: The device tree skips [32, 40) in the alias numbering */
- get_pca9548_channels(i2c600, 0x77, &i2c[40]);
- get_pca9548_channels(i2c[24], 0x71, &i2c[48]);
- get_pca9548_channels(i2c[25], 0x72, &i2c[56]);
- get_pca9548_channels(i2c[26], 0x76, &i2c[64]);
- get_pca9548_channels(i2c[27], 0x76, &i2c[72]);
- for (int i = 0; i < 8; i++) {
- get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]);
- }
-
- i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c);
- i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d);
-
- /*
- * EEPROM 24c64 size is 64Kbits or 8 Kbytes
- * 24c02 size is 2Kbits or 256 bytes
- */
- at24c_eeprom_init(i2c[19], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[20], 0x50, 256);
- at24c_eeprom_init(i2c[22], 0x52, 256);
-
- i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48);
- i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49);
- i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a);
- i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c);
-
- at24c_eeprom_init(i2c[8], 0x51, 8 * KiB);
- i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a);
-
- i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c);
- at24c_eeprom_init(i2c[50], 0x52, 8 * KiB);
- i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48);
- i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49);
-
- i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48);
- i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49);
-
- at24c_eeprom_init(i2c[65], 0x53, 8 * KiB);
- i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49);
- i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48);
- at24c_eeprom_init(i2c[68], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[69], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[70], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[71], 0x52, 8 * KiB);
-
- at24c_eeprom_init(i2c[73], 0x53, 8 * KiB);
- i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49);
- i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48);
- at24c_eeprom_init(i2c[76], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[77], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[78], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[79], 0x52, 8 * KiB);
- at24c_eeprom_init(i2c[28], 0x50, 256);
-
- for (int i = 0; i < 8; i++) {
- at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB);
- i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48);
- i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b);
- i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a);
- }
-}
-
#define TYPE_TMP421 "tmp421"
#define TYPE_DS1338 "ds1338"
@@ -955,27 +864,6 @@ static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data)
aspeed_machine_ast2600_class_emmc_init(oc);
};
-#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
-
-static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook Fuji BMC (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = FUJI_BMC_HW_STRAP1;
- amc->hw_strap2 = FUJI_BMC_HW_STRAP2;
- amc->fmc_model = "mx66l1g45g";
- amc->spi_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC3_ON;
- amc->i2c_init = fuji_bmc_i2c_init;
- amc->uart_default = ASPEED_DEV_UART1;
- mc->default_ram_size = FUJI_BMC_RAM_SIZE;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static void aspeed_machine_catalina_class_init(ObjectClass *oc,
const void *data)
{
@@ -1216,11 +1104,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("fuji-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_fuji_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_fuji.c b/hw/arm/aspeed_ast2600_fuji.c
new file mode 100644
index 000000000000..37db252e2769
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_fuji.c
@@ -0,0 +1,140 @@
+/*
+ * Facebook Fuji
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/sensor/tmp105.h"
+#include "hw/nvram/eeprom_at24c.h"
+
+#define TYPE_LM75 TYPE_TMP105
+#define TYPE_TMP75 TYPE_TMP105
+#define TYPE_TMP422 "tmp422"
+
+/* Fuji hardware value */
+#define FUJI_BMC_HW_STRAP1 0x00000000
+#define FUJI_BMC_HW_STRAP2 0x00000000
+#define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
+
+static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
+ I2CBus **channels)
+{
+ I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr);
+ for (int i = 0; i < 8; i++) {
+ channels[i] = pca954x_i2c_get_bus(mux, i);
+ }
+}
+
+static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CBus *i2c[144] = {};
+
+ for (int i = 0; i < 16; i++) {
+ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
+ }
+ I2CBus *i2c180 = i2c[2];
+ I2CBus *i2c480 = i2c[8];
+ I2CBus *i2c600 = i2c[11];
+
+ get_pca9548_channels(i2c180, 0x70, &i2c[16]);
+ get_pca9548_channels(i2c480, 0x70, &i2c[24]);
+ /* NOTE: The device tree skips [32, 40) in the alias numbering */
+ get_pca9548_channels(i2c600, 0x77, &i2c[40]);
+ get_pca9548_channels(i2c[24], 0x71, &i2c[48]);
+ get_pca9548_channels(i2c[25], 0x72, &i2c[56]);
+ get_pca9548_channels(i2c[26], 0x76, &i2c[64]);
+ get_pca9548_channels(i2c[27], 0x76, &i2c[72]);
+ for (int i = 0; i < 8; i++) {
+ get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]);
+ }
+
+ i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c);
+ i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4d);
+
+ /*
+ * EEPROM 24c64 size is 64Kbits or 8 Kbytes
+ * 24c02 size is 2Kbits or 256 bytes
+ */
+ at24c_eeprom_init(i2c[19], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[20], 0x50, 256);
+ at24c_eeprom_init(i2c[22], 0x52, 256);
+
+ i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x48);
+ i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x49);
+ i2c_slave_create_simple(i2c[3], TYPE_LM75, 0x4a);
+ i2c_slave_create_simple(i2c[3], TYPE_TMP422, 0x4c);
+
+ at24c_eeprom_init(i2c[8], 0x51, 8 * KiB);
+ i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x4a);
+
+ i2c_slave_create_simple(i2c[50], TYPE_LM75, 0x4c);
+ at24c_eeprom_init(i2c[50], 0x52, 8 * KiB);
+ i2c_slave_create_simple(i2c[51], TYPE_TMP75, 0x48);
+ i2c_slave_create_simple(i2c[52], TYPE_TMP75, 0x49);
+
+ i2c_slave_create_simple(i2c[59], TYPE_TMP75, 0x48);
+ i2c_slave_create_simple(i2c[60], TYPE_TMP75, 0x49);
+
+ at24c_eeprom_init(i2c[65], 0x53, 8 * KiB);
+ i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x49);
+ i2c_slave_create_simple(i2c[66], TYPE_TMP75, 0x48);
+ at24c_eeprom_init(i2c[68], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[69], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[70], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[71], 0x52, 8 * KiB);
+
+ at24c_eeprom_init(i2c[73], 0x53, 8 * KiB);
+ i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x49);
+ i2c_slave_create_simple(i2c[74], TYPE_TMP75, 0x48);
+ at24c_eeprom_init(i2c[76], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[77], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[78], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[79], 0x52, 8 * KiB);
+ at24c_eeprom_init(i2c[28], 0x50, 256);
+
+ for (int i = 0; i < 8; i++) {
+ at24c_eeprom_init(i2c[81 + i * 8], 0x56, 64 * KiB);
+ i2c_slave_create_simple(i2c[82 + i * 8], TYPE_TMP75, 0x48);
+ i2c_slave_create_simple(i2c[83 + i * 8], TYPE_TMP75, 0x4b);
+ i2c_slave_create_simple(i2c[84 + i * 8], TYPE_TMP75, 0x4a);
+ }
+}
+
+static void aspeed_machine_fuji_class_init(ObjectClass *oc, const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook Fuji BMC (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = FUJI_BMC_HW_STRAP1;
+ amc->hw_strap2 = FUJI_BMC_HW_STRAP2;
+ amc->fmc_model = "mx66l1g45g";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC3_ON;
+ amc->i2c_init = fuji_bmc_i2c_init;
+ amc->uart_default = ASPEED_DEV_UART1;
+ mc->default_ram_size = FUJI_BMC_RAM_SIZE;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2600_fuji_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("fuji-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_fuji_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_fuji_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 4abfbffb45fa..e6f6ab424547 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -59,6 +59,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600.c',
'aspeed_ast2600_bletchley.c',
'aspeed_ast2600_fby35.c',
+ 'aspeed_ast2600_fuji.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
'fby35.c'))
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 21/30] hw/arm/aspeed: Split QCOM Firework machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (19 preceding siblings ...)
2025-11-04 8:31 ` [PULL 20/30] hw/arm/aspeed: Split Fuji " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 22/30] hw/arm/aspeed: Split QCOM DC-SCM V1 " Cédric Le Goater
` (8 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the QCOM Firework BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_qcom-firework.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file. It improves
maintainability, readability, and simplifies future development for new
platforms without cluttering aspeed.c.
Key updates include:
- Removed qcom_dc_scm_firework_i2c_init() and its Firework-specific devices
from aspeed.c.
- Removed aspeed_machine_qcom_firework_class_init() and its type registration
("qcom-firework-bmc") from aspeed_machine_types[].
- Added new source file aspeed_ast2600_qcom-firework.c containing the
Firework-specific initialization and machine class definition.
- Updated hw/arm/meson.build to include aspeed_ast2600_qcom-firework.c.
- Cleaned up all Firework-specific code from aspeed.c.
- Renamed `QCOM_DC_SCM_V1_BMC_HW_STRAP1` to
`QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1` to avoid dependency conflicts with
other QCOM DC-SCM machines.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-22-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 57 -----------------
hw/arm/aspeed_ast2600_qcom-firework.c | 91 +++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 92 insertions(+), 57 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_qcom-firework.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 29a036b675ea..f72b1e2eeac7 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -635,38 +635,6 @@ static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
}
-static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CSlave *therm_mux, *cpuvr_mux;
-
- /* Create the generic DC-SCM hardware */
- qcom_dc_scm_bmc_i2c_init(bmc);
-
- /* Now create the Firework specific hardware */
-
- /* I2C7 CPUVR MUX */
- cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
- "pca9546", 0x70);
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
- i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
-
- /* I2C8 Thermal Diodes*/
- therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
- "pca9548", 0x70);
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
- i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
-
- /* I2C9 Fan Controller (MAX31785) */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
-}
-
static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
{
return ASPEED_MACHINE(obj)->mmio_exec;
@@ -1063,26 +1031,6 @@ static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
};
-static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
- mc->deprecation_reason = "use 'ast2600-evb' instead";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
- amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
- amc->fmc_model = "n25q512a";
- amc->spi_model = "n25q512a";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
- amc->i2c_init = qcom_dc_scm_firework_i2c_init;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static const TypeInfo aspeed_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("ast2600-evb"),
@@ -1094,11 +1042,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_qcom_firework_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_qcom-firework.c b/hw/arm/aspeed_ast2600_qcom-firework.c
new file mode 100644
index 000000000000..a4dbe6eea8ab
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_qcom-firework.c
@@ -0,0 +1,91 @@
+/*
+ * Qualcomm DC-SCM V1/Firework
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/sensor/tmp105.h"
+
+/* Qualcomm DC-SCM Firework hardware value */
+#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1 0x00000000
+#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2 0x00000041
+
+#define TYPE_LM75 TYPE_TMP105
+
+static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
+}
+
+static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CSlave *therm_mux, *cpuvr_mux;
+
+ /* Create the generic DC-SCM hardware */
+ qcom_dc_scm_bmc_i2c_init(bmc);
+
+ /* Now create the Firework specific hardware */
+
+ /* I2C7 CPUVR MUX */
+ cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
+ "pca9546", 0x70);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
+
+ /* I2C8 Thermal Diodes*/
+ therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
+ "pca9548", 0x70);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
+ i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
+
+ /* I2C9 Fan Controller (MAX31785) */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
+}
+
+static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
+ mc->deprecation_reason = "use 'ast2600-evb' instead";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1;
+ amc->hw_strap2 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2;
+ amc->fmc_model = "n25q512a";
+ amc->spi_model = "n25q512a";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+ amc->i2c_init = qcom_dc_scm_firework_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2600_qcom_firework_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("qcom-firework-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_qcom_firework_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_qcom_firework_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index e6f6ab424547..fbe063cf0bd4 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -60,6 +60,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_bletchley.c',
'aspeed_ast2600_fby35.c',
'aspeed_ast2600_fuji.c',
+ 'aspeed_ast2600_qcom-firework.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
'fby35.c'))
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 22/30] hw/arm/aspeed: Split QCOM DC-SCM V1 machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (20 preceding siblings ...)
2025-11-04 8:31 ` [PULL 21/30] hw/arm/aspeed: Split QCOM Firework " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 23/30] hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup Cédric Le Goater
` (7 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the QCOM DC-SCM V1 BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_qcom-dc-scm-v1.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file. It improves
maintainability, readability, and simplifies future development for new
platforms without cluttering aspeed.c.
Key updates include:
- Moved QCOM_DC_SCM_V1_BMC_HW_STRAP1 and QCOM_DC_SCM_V1_BMC_HW_STRAP2 macro
into the new file aspeed_ast2600_qcom-dc-scm-v1.c.
- Moved qcom_dc_scm_bmc_i2c_init() and aspeed_machine_qcom_dc_scm_v1_class_init()
into the new file aspeed_ast2600_qcom-dc-scm-v1.c.
- Moved "qcom-dc-scm-v1-bmc" machine type registration from aspeed.c to the new file.
- Updated hw/arm/meson.build to include aspeed_ast2600_qcom-dc-scm-v1.c.
- Cleaned up all QCOM DC-SCM V1-specific code from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-23-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 36 -----------------
hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c | 55 ++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 56 insertions(+), 36 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index f72b1e2eeac7..89a463242567 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -56,10 +56,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
-/* Qualcomm DC-SCM hardware value */
-#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
-#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
-
#define AST_SMP_MAILBOX_BASE 0x1e6e2180
#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
@@ -628,13 +624,6 @@ static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
gb200nvl_bmc_fruid_len);
}
-static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
-}
-
static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
{
return ASPEED_MACHINE(obj)->mmio_exec;
@@ -1011,37 +1000,12 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
}
#endif
-static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
- mc->deprecation_reason = "use 'ast2600-evb' instead";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
- amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
- amc->fmc_model = "n25q512a";
- amc->spi_model = "n25q512a";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
- amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-};
-
static const TypeInfo aspeed_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("ast2600-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("rainier-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c b/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c
new file mode 100644
index 000000000000..bbdeb6023686
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_qcom-dc-scm-v1.c
@@ -0,0 +1,55 @@
+/*
+ * Qualcomm DC-SCM V1
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+
+/* Qualcomm DC-SCM hardware value */
+#define QCOM_DC_SCM_V1_BMC_HW_STRAP1 0x00000000
+#define QCOM_DC_SCM_V1_BMC_HW_STRAP2 0x00000041
+
+static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
+}
+
+static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Qualcomm DC-SCM V1 BMC (Cortex A7)";
+ mc->deprecation_reason = "use 'ast2600-evb' instead";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
+ amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
+ amc->fmc_model = "n25q512a";
+ amc->spi_model = "n25q512a";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+ amc->i2c_init = qcom_dc_scm_bmc_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2600_qcom_dc_scm_v1_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("qcom-dc-scm-v1-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_qcom_dc_scm_v1_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_qcom_dc_scm_v1_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index fbe063cf0bd4..588a72bdf28d 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -60,6 +60,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_bletchley.c',
'aspeed_ast2600_fby35.c',
'aspeed_ast2600_fuji.c',
+ 'aspeed_ast2600_qcom-dc-scm-v1.c',
'aspeed_ast2600_qcom-firework.c',
'aspeed_ast10x0.c',
'aspeed_eeprom.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 23/30] hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (21 preceding siblings ...)
2025-11-04 8:31 ` [PULL 22/30] hw/arm/aspeed: Split QCOM DC-SCM V1 " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 24/30] hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability Cédric Le Goater
` (6 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit exposes the function aspeed_machine_ast2600_class_emmc_init() as
a common API so that other AST2600-based machine implementations can reuse it
to enable the "boot-emmc" property.
Previously, this function was defined as a static helper within aspeed.c,
limiting its visibility to that file. By making it global and declaring it in
aspeed.h, other machine definition files (e.g., for specific AST2600 boards)
can now easily call this API to register eMMC boot configuration support.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-24-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 10 ++++++++++
hw/arm/aspeed.c | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 84620f49ed2d..87dcadab264f 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -101,4 +101,14 @@ void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr);
*/
I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr);
+/*
+ * aspeed_machine_ast2600_class_emmc_init:
+ * @oc: the #ObjectClass to initialize.
+ *
+ * Initialize eMMC-related properties for the AST2600 Aspeed machine class.
+ * This function is typically invoked during class initialization to set up
+ * default configuration or attach eMMC-specific devices for AST2600 platforms.
+ */
+void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc);
+
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 89a463242567..2f385290a419 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -755,7 +755,7 @@ static void aspeed_machine_ast2600_set_boot_from_emmc(Object *obj, bool value,
}
}
-static void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc)
+void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc)
{
object_class_property_add_bool(oc, "boot-emmc",
aspeed_machine_ast2600_get_boot_from_emmc,
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 24/30] hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (22 preceding siblings ...)
2025-11-04 8:31 ` [PULL 23/30] hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 25/30] hw/arm/aspeed: Split Rainier " Cédric Le Goater
` (5 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Nvidia GB200NVL BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_gb200nvl.c.
This refactor continues the modularization effort for Aspeed platform support,
placing each board’s initialization logic in its own dedicated source file.
It improves code maintainability, readability, and simplifies adding new
platforms without increasing the complexity of aspeed.c.
Key updates include:
- Moved GB200NVL_BMC_HW_STRAP1 and GB200NVL_BMC_HW_STRAP2 macro definitions into the new file.
- Moved gb200nvl_bmc_i2c_init() and its related FRUID setup into the new file.
- Moved aspeed_machine_gb200nvl_class_init() and type registration logic out of aspeed.c.
- Removed gb200nvl_bmc_fruid[] and its length definition from aspeed_eeprom.c/h.
- Added aspeed_ast2600_gb200nvl.c to the Meson build system (meson.build).
- Cleaned up all GB200NVL-specific code and data from aspeed.c and aspeed_eeprom.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-25-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_eeprom.h | 3 -
hw/arm/aspeed.c | 72 --------------------
hw/arm/aspeed_ast2600_gb200nvl.c | 111 +++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 20 ------
hw/arm/meson.build | 1 +
5 files changed, 112 insertions(+), 95 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_gb200nvl.c
diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h
index 7207bb2cbd39..86b97e4c6d98 100644
--- a/hw/arm/aspeed_eeprom.h
+++ b/hw/arm/aspeed_eeprom.h
@@ -12,7 +12,4 @@ extern const size_t rainier_bb_fruid_len;
extern const uint8_t rainier_bmc_fruid[];
extern const size_t rainier_bmc_fruid_len;
-extern const uint8_t gb200nvl_bmc_fruid[];
-extern const size_t gb200nvl_bmc_fruid_len;
-
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 2f385290a419..77a4095f7d35 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -52,10 +52,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
#define RAINIER_BMC_HW_STRAP2 0x80000848
-/* GB200NVL hardware value */
-#define GB200NVL_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1
-#define GB200NVL_BMC_HW_STRAP2 AST2600_EVB_HW_STRAP2
-
#define AST_SMP_MAILBOX_BASE 0x1e6e2180
#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
@@ -586,44 +582,6 @@ static void catalina_bmc_i2c_init(AspeedMachineState *bmc)
at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
}
-static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CBus *i2c[15] = {};
- DeviceState *dev;
- for (int i = 0; i < sizeof(i2c) / sizeof(i2c[0]); i++) {
- if ((i == 11) || (i == 12) || (i == 13)) {
- continue;
- }
- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
- }
-
- /* Bus 5 Expander */
- aspeed_create_pca9554(soc, 4, 0x21);
-
- /* Mux I2c Expanders */
- i2c_slave_create_simple(i2c[5], "pca9546", 0x71);
- i2c_slave_create_simple(i2c[5], "pca9546", 0x72);
- i2c_slave_create_simple(i2c[5], "pca9546", 0x73);
- i2c_slave_create_simple(i2c[5], "pca9546", 0x75);
- i2c_slave_create_simple(i2c[5], "pca9546", 0x76);
- i2c_slave_create_simple(i2c[5], "pca9546", 0x77);
-
- /* Bus 10 */
- dev = DEVICE(aspeed_create_pca9554(soc, 9, 0x20));
-
- /* Set FPGA_READY */
- object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal);
-
- aspeed_create_pca9554(soc, 9, 0x21);
- at24c_eeprom_init(i2c[9], 0x50, 64 * KiB);
- at24c_eeprom_init(i2c[9], 0x51, 64 * KiB);
-
- /* Bus 11 */
- at24c_eeprom_init_rom(i2c[10], 0x50, 256, gb200nvl_bmc_fruid,
- gb200nvl_bmc_fruid_len);
-}
-
static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
{
return ASPEED_MACHINE(obj)->mmio_exec;
@@ -841,31 +799,6 @@ static void aspeed_machine_catalina_class_init(ObjectClass *oc,
aspeed_machine_ast2600_class_emmc_init(oc);
}
-#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB)
-
-static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Nvidia GB200NVL BMC (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = GB200NVL_BMC_HW_STRAP1;
- amc->hw_strap2 = GB200NVL_BMC_HW_STRAP2;
- amc->fmc_model = "mx66u51235f";
- amc->spi_model = "mx66u51235f";
- amc->num_cs = 2;
-
- amc->spi2_model = "mx66u51235f";
- amc->num_cs2 = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
- amc->i2c_init = gb200nvl_bmc_i2c_init;
- mc->default_ram_size = GB200NVL_BMC_RAM_SIZE;
- aspeed_machine_class_init_cpus_defaults(mc);
- aspeed_machine_ast2600_class_emmc_init(oc);
-}
-
#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
/* Main SYSCLK frequency in Hz (200MHz) */
#define SYSCLK_FRQ 200000000ULL
@@ -1011,11 +944,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_rainier_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_gb200nvl_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("catalina-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_gb200nvl.c b/hw/arm/aspeed_ast2600_gb200nvl.c
new file mode 100644
index 000000000000..ad9a10110b89
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_gb200nvl.c
@@ -0,0 +1,111 @@
+/*
+ * Nvidia GB200NVL
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+
+/* GB200NVL hardware value */
+#define GB200NVL_BMC_HW_STRAP1 0x000000C0
+#define GB200NVL_BMC_HW_STRAP2 0x00000003
+#define GB200NVL_BMC_RAM_SIZE ASPEED_RAM_SIZE(1 * GiB)
+
+static const uint8_t gb200nvl_bmc_fruid[] = {
+ 0x01, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0xf3, 0x01, 0x0a, 0x19, 0x1f,
+ 0x0f, 0xe6, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x33,
+ 0x38, 0x30, 0x39, 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38,
+ 0x30, 0x30, 0x31, 0x35, 0x30, 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33,
+ 0x38, 0x30, 0x39, 0x2d, 0x30, 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30,
+ 0xc0, 0x01, 0x01, 0xd6, 0x4d, 0x41, 0x43, 0x3a, 0x20, 0x33, 0x43, 0x3a,
+ 0x36, 0x44, 0x3a, 0x36, 0x36, 0x3a, 0x31, 0x34, 0x3a, 0x43, 0x38, 0x3a,
+ 0x37, 0x41, 0xc1, 0x3b, 0x01, 0x09, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44,
+ 0x49, 0x41, 0xc9, 0x50, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x42, 0x4d, 0x43,
+ 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x30,
+ 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, 0xc4, 0x41, 0x45, 0x2e, 0x31,
+ 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, 0x30, 0x30, 0x31,
+ 0x35, 0x30, 0xc0, 0xc4, 0x76, 0x30, 0x2e, 0x31, 0xc1, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0xb4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
+
+};
+static const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid);
+
+static void gb200nvl_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CBus *i2c[15] = {};
+ DeviceState *dev;
+ for (int i = 0; i < sizeof(i2c) / sizeof(i2c[0]); i++) {
+ if ((i == 11) || (i == 12) || (i == 13)) {
+ continue;
+ }
+ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
+ }
+
+ /* Bus 5 Expander */
+ aspeed_create_pca9554(soc, 4, 0x21);
+
+ /* Mux I2c Expanders */
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x71);
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x72);
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x73);
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x75);
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x76);
+ i2c_slave_create_simple(i2c[5], "pca9546", 0x77);
+
+ /* Bus 10 */
+ dev = DEVICE(aspeed_create_pca9554(soc, 9, 0x20));
+
+ /* Set FPGA_READY */
+ object_property_set_str(OBJECT(dev), "pin1", "high", &error_fatal);
+
+ aspeed_create_pca9554(soc, 9, 0x21);
+ at24c_eeprom_init(i2c[9], 0x50, 64 * KiB);
+ at24c_eeprom_init(i2c[9], 0x51, 64 * KiB);
+
+ /* Bus 11 */
+ at24c_eeprom_init_rom(i2c[10], 0x50, 256, gb200nvl_bmc_fruid,
+ gb200nvl_bmc_fruid_len);
+}
+
+static void aspeed_machine_gb200nvl_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Nvidia GB200NVL BMC (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = GB200NVL_BMC_HW_STRAP1;
+ amc->hw_strap2 = GB200NVL_BMC_HW_STRAP2;
+ amc->fmc_model = "mx66u51235f";
+ amc->spi_model = "mx66u51235f";
+ amc->num_cs = 2;
+
+ amc->spi2_model = "mx66u51235f";
+ amc->num_cs2 = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
+ amc->i2c_init = gb200nvl_bmc_i2c_init;
+ mc->default_ram_size = GB200NVL_BMC_RAM_SIZE;
+ aspeed_machine_class_init_cpus_defaults(mc);
+ aspeed_machine_ast2600_class_emmc_init(oc);
+}
+
+static const TypeInfo aspeed_ast2600_gb200nvl_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("gb200nvl-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_gb200nvl_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_gb200nvl_types)
diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c
index 53c9b0d56f03..85a2aa40365a 100644
--- a/hw/arm/aspeed_eeprom.c
+++ b/hw/arm/aspeed_eeprom.c
@@ -49,26 +49,6 @@ const uint8_t rainier_bmc_fruid[] = {
0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
};
-const uint8_t gb200nvl_bmc_fruid[] = {
- 0x01, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0xf3, 0x01, 0x0a, 0x19, 0x1f,
- 0x0f, 0xe6, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x33,
- 0x38, 0x30, 0x39, 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38,
- 0x30, 0x30, 0x31, 0x35, 0x30, 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33,
- 0x38, 0x30, 0x39, 0x2d, 0x30, 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30,
- 0xc0, 0x01, 0x01, 0xd6, 0x4d, 0x41, 0x43, 0x3a, 0x20, 0x33, 0x43, 0x3a,
- 0x36, 0x44, 0x3a, 0x36, 0x36, 0x3a, 0x31, 0x34, 0x3a, 0x43, 0x38, 0x3a,
- 0x37, 0x41, 0xc1, 0x3b, 0x01, 0x09, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44,
- 0x49, 0x41, 0xc9, 0x50, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x42, 0x4d, 0x43,
- 0xd2, 0x36, 0x39, 0x39, 0x2d, 0x31, 0x33, 0x38, 0x30, 0x39, 0x2d, 0x30,
- 0x34, 0x30, 0x34, 0x2d, 0x36, 0x30, 0x30, 0xc4, 0x41, 0x45, 0x2e, 0x31,
- 0xcd, 0x31, 0x35, 0x38, 0x33, 0x33, 0x32, 0x34, 0x38, 0x30, 0x30, 0x31,
- 0x35, 0x30, 0xc0, 0xc4, 0x76, 0x30, 0x2e, 0x31, 0xc1, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0xb4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-
-};
-
const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid);
const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid);
-const size_t gb200nvl_bmc_fruid_len = sizeof(gb200nvl_bmc_fruid);
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 588a72bdf28d..d229e4850091 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -60,6 +60,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_bletchley.c',
'aspeed_ast2600_fby35.c',
'aspeed_ast2600_fuji.c',
+ 'aspeed_ast2600_gb200nvl.c',
'aspeed_ast2600_qcom-dc-scm-v1.c',
'aspeed_ast2600_qcom-firework.c',
'aspeed_ast10x0.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 25/30] hw/arm/aspeed: Split Rainier machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (23 preceding siblings ...)
2025-11-04 8:31 ` [PULL 24/30] hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 26/30] hw/arm/aspeed: Split Catalina " Cédric Le Goater
` (4 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the IBM Rainier BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_rainier.c.
This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic and FRUID data in its own dedicated
source file. It improves maintainability, readability, and simplifies
future development for new Aspeed-based systems without cluttering
aspeed.c.
Key updates include:
- Removed RAINIER_BMC_HW_STRAP1 and RAINIER_BMC_HW_STRAP2 macro definitions.
- Moved rainier_bmc_i2c_init() and all related I2C device setup code
into the new aspeed_ast2600_rainier.c file.
- Moved aspeed_machine_rainier_class_init() and type registration logic
out of aspeed.c.
- Deleted aspeed_eeprom.h and aspeed_eeprom.c; their FRUID data and
length definitions are now handled directly in the new Rainier file.
- Added aspeed_ast2600_rainier.c to the Meson build system (meson.build).
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-26-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed_eeprom.h | 15 ---
hw/arm/aspeed.c | 133 ---------------------
hw/arm/aspeed_ast2600_rainier.c | 198 ++++++++++++++++++++++++++++++++
hw/arm/aspeed_eeprom.c | 54 ---------
hw/arm/meson.build | 2 +-
5 files changed, 199 insertions(+), 203 deletions(-)
delete mode 100644 hw/arm/aspeed_eeprom.h
create mode 100644 hw/arm/aspeed_ast2600_rainier.c
delete mode 100644 hw/arm/aspeed_eeprom.c
diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h
deleted file mode 100644
index 86b97e4c6d98..000000000000
--- a/hw/arm/aspeed_eeprom.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (c) Meta Platforms, Inc. and affiliates.
- *
- * SPDX-License-Identifier: GPL-2.0-only
- */
-
-#ifndef ASPEED_EEPROM_H
-#define ASPEED_EEPROM_H
-
-extern const uint8_t rainier_bb_fruid[];
-extern const size_t rainier_bb_fruid_len;
-extern const uint8_t rainier_bmc_fruid[];
-extern const size_t rainier_bmc_fruid_len;
-
-#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 77a4095f7d35..56600be916ee 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -14,7 +14,6 @@
#include "hw/arm/boot.h"
#include "hw/arm/aspeed.h"
#include "hw/arm/aspeed_soc.h"
-#include "hw/arm/aspeed_eeprom.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
#include "hw/i2c/i2c_mux_pca954x.h"
@@ -48,10 +47,6 @@ static struct arm_boot_info aspeed_board_binfo = {
#define AST2700_EVB_HW_STRAP2 0x00000700
#endif
-/* Rainier hardware value: (QEMU prototype) */
-#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
-#define RAINIER_BMC_HW_STRAP2 0x80000848
-
#define AST_SMP_MAILBOX_BASE 0x1e6e2180
#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
@@ -300,110 +295,6 @@ I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
TYPE_PCA9554, addr);
}
-static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- I2CSlave *i2c_mux;
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
-
- aspeed_create_pca9552(soc, 3, 0x61);
-
- /* The rainier expects a TMP275 but a TMP105 is compatible */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
- 0x49);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
- 0x4a);
- i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4),
- "pca9546", 0x70);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
- aspeed_create_pca9552(soc, 4, 0x60);
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
- 0x49);
- aspeed_create_pca9552(soc, 5, 0x60);
- aspeed_create_pca9552(soc, 5, 0x61);
- i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
- "pca9546", 0x70);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
- 0x4a);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
- 0x4b);
- i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6),
- "pca9546", 0x70);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
-
- aspeed_create_pca9552(soc, 7, 0x30);
- aspeed_create_pca9552(soc, 7, 0x31);
- aspeed_create_pca9552(soc, 7, 0x32);
- aspeed_create_pca9552(soc, 7, 0x33);
- aspeed_create_pca9552(soc, 7, 0x60);
- aspeed_create_pca9552(soc, 7, 0x61);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
- /* Bus 7: TODO si7021-a20@20 */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52);
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB);
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB);
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
- 0x4a);
- at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50,
- 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len);
- at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51,
- 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len);
- aspeed_create_pca9552(soc, 8, 0x60);
- aspeed_create_pca9552(soc, 8, 0x61);
- /* Bus 8: ucd90320@11 */
- /* Bus 8: ucd90320@b */
- /* Bus 8: ucd90320@c */
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d);
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB);
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d);
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB);
-
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
- 0x48);
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
- 0x49);
- i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11),
- "pca9546", 0x70);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
- aspeed_create_pca9552(soc, 11, 0x60);
-
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
- aspeed_create_pca9552(soc, 13, 0x60);
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
- aspeed_create_pca9552(soc, 14, 0x60);
-
- at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
- aspeed_create_pca9552(soc, 15, 0x60);
-}
-
#define TYPE_LM75 TYPE_TMP105
#define TYPE_TMP75 TYPE_TMP105
#define TYPE_TMP421 "tmp421"
@@ -760,25 +651,6 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
aspeed_machine_ast2600_class_emmc_init(oc);
};
-static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "IBM Rainier BMC (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = RAINIER_BMC_HW_STRAP1;
- amc->hw_strap2 = RAINIER_BMC_HW_STRAP2;
- amc->fmc_model = "mx66l1g45g";
- amc->spi_model = "mx66l1g45g";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
- amc->i2c_init = rainier_bmc_i2c_init;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
- aspeed_machine_ast2600_class_emmc_init(oc);
-};
-
static void aspeed_machine_catalina_class_init(ObjectClass *oc,
const void *data)
{
@@ -939,11 +811,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("rainier-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_rainier_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("catalina-bmc"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_rainier.c b/hw/arm/aspeed_ast2600_rainier.c
new file mode 100644
index 000000000000..8f0a412ddcfb
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_rainier.c
@@ -0,0 +1,198 @@
+/*
+ * IBM Rainier
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/nvram/eeprom_at24c.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/sensor/tmp105.h"
+
+/* Rainier hardware value: (QEMU prototype) */
+#define RAINIER_BMC_HW_STRAP1 (0x00422016 | SCU_AST2600_HW_STRAP_BOOT_SRC_EMMC)
+#define RAINIER_BMC_HW_STRAP2 0x80000848
+
+static const uint8_t rainier_bb_fruid[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
+ 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
+ 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37,
+ 0x00, 0x4a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x52, 0x54,
+ 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x38, 0x56, 0x49, 0x4e, 0x49,
+ 0x00, 0x00, 0x81, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x53,
+ 0x59, 0x53, 0x00, 0x00, 0xbb, 0x00, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x56, 0x43, 0x45, 0x4e, 0x00, 0x00, 0xe2, 0x00, 0x27, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x56, 0x53, 0x42, 0x50, 0x00, 0x00, 0x09, 0x01, 0x19, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00,
+ 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, 0x49, 0x44, 0x52, 0x04, 0x44, 0x45,
+ 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, 0x31, 0x43, 0x43, 0x04, 0x33, 0x34,
+ 0x35, 0x36, 0x46, 0x4e, 0x04, 0x46, 0x52, 0x34, 0x39, 0x53, 0x4e, 0x04,
+ 0x53, 0x52, 0x31, 0x32, 0x50, 0x4e, 0x04, 0x50, 0x52, 0x39, 0x39, 0x50,
+ 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x52, 0x54,
+ 0x04, 0x56, 0x53, 0x59, 0x53, 0x53, 0x45, 0x07, 0x49, 0x42, 0x4d, 0x53,
+ 0x59, 0x53, 0x31, 0x54, 0x4d, 0x08, 0x32, 0x32, 0x32, 0x32, 0x2d, 0x32,
+ 0x32, 0x32, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
+ 0x00, 0x52, 0x54, 0x04, 0x56, 0x43, 0x45, 0x4e, 0x53, 0x45, 0x07, 0x31,
+ 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x46, 0x43, 0x08, 0x31, 0x31, 0x31,
+ 0x31, 0x2d, 0x31, 0x31, 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x15, 0x00, 0x52, 0x54, 0x04, 0x56, 0x53, 0x42, 0x50, 0x49,
+ 0x4d, 0x04, 0x50, 0x00, 0x10, 0x01, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+static const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid);
+
+/* Rainier BMC FRU */
+static const uint8_t rainier_bmc_fruid[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
+ 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
+ 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37,
+ 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x52, 0x54,
+ 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x0e, 0x56, 0x49, 0x4e, 0x49,
+ 0x00, 0x00, 0x57, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46,
+ 0x01, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e,
+ 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, 0x53, 0x43, 0x48, 0x57, 0x02, 0x30,
+ 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+static const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid);
+
+static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ I2CSlave *i2c_mux;
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
+
+ aspeed_create_pca9552(soc, 3, 0x61);
+
+ /* The rainier expects a TMP275 but a TMP105 is compatible */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
+ 0x49);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4), TYPE_TMP105,
+ 0x4a);
+ i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 4),
+ "pca9546", 0x70);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x52, 64 * KiB);
+ aspeed_create_pca9552(soc, 4, 0x60);
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5), TYPE_TMP105,
+ 0x49);
+ aspeed_create_pca9552(soc, 5, 0x60);
+ aspeed_create_pca9552(soc, 5, 0x61);
+ i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 5),
+ "pca9546", 0x70);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
+ 0x4a);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), TYPE_TMP105,
+ 0x4b);
+ i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6),
+ "pca9546", 0x70);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 2), 0x50, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 3), 0x51, 64 * KiB);
+
+ aspeed_create_pca9552(soc, 7, 0x30);
+ aspeed_create_pca9552(soc, 7, 0x31);
+ aspeed_create_pca9552(soc, 7, 0x32);
+ aspeed_create_pca9552(soc, 7, 0x33);
+ aspeed_create_pca9552(soc, 7, 0x60);
+ aspeed_create_pca9552(soc, 7, 0x61);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "dps310", 0x76);
+ /* Bus 7: TODO si7021-a20@20 */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), "max31785", 0x52);
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50, 64 * KiB);
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 7), 0x51, 64 * KiB);
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), TYPE_TMP105,
+ 0x4a);
+ at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x50,
+ 64 * KiB, rainier_bb_fruid, rainier_bb_fruid_len);
+ at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51,
+ 64 * KiB, rainier_bmc_fruid, rainier_bmc_fruid_len);
+ aspeed_create_pca9552(soc, 8, 0x60);
+ aspeed_create_pca9552(soc, 8, 0x61);
+ /* Bus 8: ucd90320@11 */
+ /* Bus 8: ucd90320@b */
+ /* Bus 8: ucd90320@c */
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4c);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "tmp423", 0x4d);
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 9), 0x50, 128 * KiB);
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4c);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 10), "tmp423", 0x4d);
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 10), 0x50, 128 * KiB);
+
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
+ 0x48);
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), TYPE_TMP105,
+ 0x49);
+ i2c_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11),
+ "pca9546", 0x70);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 0), 0x50, 64 * KiB);
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x51, 64 * KiB);
+ aspeed_create_pca9552(soc, 11, 0x60);
+
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 13), 0x50, 64 * KiB);
+ aspeed_create_pca9552(soc, 13, 0x60);
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 14), 0x50, 64 * KiB);
+ aspeed_create_pca9552(soc, 14, 0x60);
+
+ at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 15), 0x50, 64 * KiB);
+ aspeed_create_pca9552(soc, 15, 0x60);
+}
+
+static void aspeed_machine_rainier_class_init(ObjectClass *oc, const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "IBM Rainier BMC (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = RAINIER_BMC_HW_STRAP1;
+ amc->hw_strap2 = RAINIER_BMC_HW_STRAP2;
+ amc->fmc_model = "mx66l1g45g";
+ amc->spi_model = "mx66l1g45g";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+ amc->i2c_init = rainier_bmc_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+ aspeed_machine_ast2600_class_emmc_init(oc);
+};
+
+static const TypeInfo aspeed_ast2600_rainier_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("rainier-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_rainier_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_rainier_types)
diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c
deleted file mode 100644
index 85a2aa40365a..000000000000
--- a/hw/arm/aspeed_eeprom.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (c) Meta Platforms, Inc. and affiliates.
- *
- * SPDX-License-Identifier: GPL-2.0-only
- */
-
-#include "qemu/osdep.h"
-#include "aspeed_eeprom.h"
-
-const uint8_t rainier_bb_fruid[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
- 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
- 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37,
- 0x00, 0x4a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x52, 0x54,
- 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x38, 0x56, 0x49, 0x4e, 0x49,
- 0x00, 0x00, 0x81, 0x00, 0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x53,
- 0x59, 0x53, 0x00, 0x00, 0xbb, 0x00, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x56, 0x43, 0x45, 0x4e, 0x00, 0x00, 0xe2, 0x00, 0x27, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x56, 0x53, 0x42, 0x50, 0x00, 0x00, 0x09, 0x01, 0x19, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00,
- 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e, 0x49, 0x44, 0x52, 0x04, 0x44, 0x45,
- 0x53, 0x43, 0x48, 0x57, 0x02, 0x30, 0x31, 0x43, 0x43, 0x04, 0x33, 0x34,
- 0x35, 0x36, 0x46, 0x4e, 0x04, 0x46, 0x52, 0x34, 0x39, 0x53, 0x4e, 0x04,
- 0x53, 0x52, 0x31, 0x32, 0x50, 0x4e, 0x04, 0x50, 0x52, 0x39, 0x39, 0x50,
- 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x52, 0x54,
- 0x04, 0x56, 0x53, 0x59, 0x53, 0x53, 0x45, 0x07, 0x49, 0x42, 0x4d, 0x53,
- 0x59, 0x53, 0x31, 0x54, 0x4d, 0x08, 0x32, 0x32, 0x32, 0x32, 0x2d, 0x32,
- 0x32, 0x32, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
- 0x00, 0x52, 0x54, 0x04, 0x56, 0x43, 0x45, 0x4e, 0x53, 0x45, 0x07, 0x31,
- 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x46, 0x43, 0x08, 0x31, 0x31, 0x31,
- 0x31, 0x2d, 0x31, 0x31, 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x15, 0x00, 0x52, 0x54, 0x04, 0x56, 0x53, 0x42, 0x50, 0x49,
- 0x4d, 0x04, 0x50, 0x00, 0x10, 0x01, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00,
- 0x00, 0x00,
-};
-
-/* Rainier BMC FRU */
-const uint8_t rainier_bmc_fruid[] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84,
- 0x28, 0x00, 0x52, 0x54, 0x04, 0x56, 0x48, 0x44, 0x52, 0x56, 0x44, 0x02,
- 0x01, 0x00, 0x50, 0x54, 0x0e, 0x56, 0x54, 0x4f, 0x43, 0x00, 0x00, 0x37,
- 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46, 0x08, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x52, 0x54,
- 0x04, 0x56, 0x54, 0x4f, 0x43, 0x50, 0x54, 0x0e, 0x56, 0x49, 0x4e, 0x49,
- 0x00, 0x00, 0x57, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x46,
- 0x01, 0x00, 0x00, 0x00, 0x1a, 0x00, 0x52, 0x54, 0x04, 0x56, 0x49, 0x4e,
- 0x49, 0x44, 0x52, 0x04, 0x44, 0x45, 0x53, 0x43, 0x48, 0x57, 0x02, 0x30,
- 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid);
-const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid);
-
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index d229e4850091..d7e4d87dc8af 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -63,8 +63,8 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_gb200nvl.c',
'aspeed_ast2600_qcom-dc-scm-v1.c',
'aspeed_ast2600_qcom-firework.c',
+ 'aspeed_ast2600_rainier.c',
'aspeed_ast10x0.c',
- 'aspeed_eeprom.c',
'fby35.c'))
arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files(
'aspeed_ast27x0.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 26/30] hw/arm/aspeed: Split Catalina machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (24 preceding siblings ...)
2025-11-04 8:31 ` [PULL 25/30] hw/arm/aspeed: Split Rainier " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 27/30] hw/arm/aspeed: Split AST2600 EVB " Cédric Le Goater
` (3 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Facebook Catalina BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_catalina.c.
This refactor continues the ongoing modularization of Aspeed platform
support, organizing each board’s logic into its own dedicated source file.
It improves maintainability, readability, and simplifies future
development of new BMC platforms without cluttering aspeed.c.
Key updates include:
- Moved CATALINA_BMC_HW_STRAP1 and CATALINA_BMC_HW_STRAP2 macro definitions
into the new file.
- Moved catalina_bmc_i2c_init() and all Catalina-specific I2C device setup
into the new aspeed_ast2600_catalina.c file.
- Moved aspeed_machine_catalina_class_init() and type registration logic
out of aspeed.c.
- Cleaned up all Catalina-specific code and macros from aspeed.c.
- Added aspeed_ast2600_catalina.c to the Meson build system (meson.build).
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-27-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 205 ----------------------------
hw/arm/aspeed_ast2600_catalina.c | 225 +++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 226 insertions(+), 205 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_catalina.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 56600be916ee..ad3bb8cbac3d 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -16,11 +16,9 @@
#include "hw/arm/aspeed_soc.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
-#include "hw/i2c/i2c_mux_pca954x.h"
#include "hw/i2c/smbus_eeprom.h"
#include "hw/gpio/pca9552.h"
#include "hw/gpio/pca9554.h"
-#include "hw/nvram/eeprom_at24c.h"
#include "hw/sensor/tmp105.h"
#include "hw/misc/led.h"
#include "hw/qdev-properties.h"
@@ -295,184 +293,6 @@ I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr)
TYPE_PCA9554, addr);
}
-#define TYPE_LM75 TYPE_TMP105
-#define TYPE_TMP75 TYPE_TMP105
-#define TYPE_TMP421 "tmp421"
-#define TYPE_DS1338 "ds1338"
-
-/* Catalina hardware value */
-#define CATALINA_BMC_HW_STRAP1 0x00002002
-#define CATALINA_BMC_HW_STRAP2 0x00000800
-
-#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
-
-static void catalina_bmc_i2c_init(AspeedMachineState *bmc)
-{
- /* Reference from v6.16-rc2 aspeed-bmc-facebook-catalina.dts */
-
- AspeedSoCState *soc = bmc->soc;
- I2CBus *i2c[16] = {};
- I2CSlave *i2c_mux;
-
- /* busses 0-15 are all used. */
- for (int i = 0; i < ARRAY_SIZE(i2c); i++) {
- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
- }
-
- /* &i2c0 */
- /* i2c-mux@71 (PCA9546) on i2c0 */
- i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71);
-
- /* i2c-mux@72 (PCA9546) on i2c0 */
- i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72);
-
- /* i2c0mux1ch1 */
- /* io_expander7 - pca9535@20 */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
- TYPE_PCA9552, 0x20);
- /* eeprom@50 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
-
- /* i2c-mux@73 (PCA9546) on i2c0 */
- i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73);
-
- /* i2c-mux@75 (PCA9546) on i2c0 */
- i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75);
-
- /* i2c-mux@76 (PCA9546) on i2c0 */
- i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76);
-
- /* i2c0mux4ch1 */
- /* io_expander8 - pca9535@21 */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
- TYPE_PCA9552, 0x21);
- /* eeprom@50 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
-
- /* i2c-mux@77 (PCA9546) on i2c0 */
- i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77);
-
-
- /* &i2c1 */
- /* i2c-mux@70 (PCA9548) on i2c1 */
- i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70);
- /* i2c1mux0ch0 */
- /* ina238@41 - no model */
- /* ina238@42 - no model */
- /* ina238@44 - no model */
- /* i2c1mux0ch1 */
- /* ina238@41 - no model */
- /* ina238@43 - no model */
- /* i2c1mux0ch4 */
- /* ltc4287@42 - no model */
- /* ltc4287@43 - no model */
-
- /* i2c1mux0ch5 */
- /* eeprom@54 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB);
- /* tpm75@4f */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f);
-
- /* i2c1mux0ch6 */
- /* io_expander5 - pca9554@27 */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
- TYPE_PCA9554, 0x27);
- /* io_expander6 - pca9555@25 */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
- TYPE_PCA9552, 0x25);
- /* eeprom@51 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x51, 8 * KiB);
-
- /* i2c1mux0ch7 */
- /* eeprom@53 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x53, 8 * KiB);
- /* temperature-sensor@4b - tmp75 */
- i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b);
-
- /* &i2c2 */
- /* io_expander0 - pca9555@20 */
- i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x20);
- /* io_expander0 - pca9555@21 */
- i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x21);
- /* io_expander0 - pca9555@27 */
- i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x27);
- /* eeprom@50 */
- at24c_eeprom_init(i2c[2], 0x50, 8 * KiB);
- /* eeprom@51 */
- at24c_eeprom_init(i2c[2], 0x51, 8 * KiB);
-
- /* &i2c5 */
- /* i2c-mux@70 (PCA9548) on i2c5 */
- i2c_mux = i2c_slave_create_simple(i2c[5], TYPE_PCA9548, 0x70);
- /* i2c5mux0ch6 */
- /* eeprom@52 */
- at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x52, 8 * KiB);
- /* i2c5mux0ch7 */
- /* ina230@40 - no model */
- /* ina230@41 - no model */
- /* ina230@44 - no model */
- /* ina230@45 - no model */
-
- /* &i2c6 */
- /* io_expander3 - pca9555@21 */
- i2c_slave_create_simple(i2c[6], TYPE_PCA9552, 0x21);
- /* rtc@6f - nct3018y */
- i2c_slave_create_simple(i2c[6], TYPE_DS1338, 0x6f);
-
- /* &i2c9 */
- /* io_expander4 - pca9555@4f */
- i2c_slave_create_simple(i2c[9], TYPE_PCA9552, 0x4f);
- /* temperature-sensor@4b - tpm75 */
- i2c_slave_create_simple(i2c[9], TYPE_TMP75, 0x4b);
- /* eeprom@50 */
- at24c_eeprom_init(i2c[9], 0x50, 8 * KiB);
- /* eeprom@56 */
- at24c_eeprom_init(i2c[9], 0x56, 8 * KiB);
-
- /* &i2c10 */
- /* temperature-sensor@1f - tpm421 */
- i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f);
- /* eeprom@50 */
- at24c_eeprom_init(i2c[10], 0x50, 8 * KiB);
-
- /* &i2c11 */
- /* ssif-bmc@10 - no model */
-
- /* &i2c12 */
- /* eeprom@50 */
- at24c_eeprom_init(i2c[12], 0x50, 8 * KiB);
-
- /* &i2c13 */
- /* eeprom@50 */
- at24c_eeprom_init(i2c[13], 0x50, 8 * KiB);
- /* eeprom@54 */
- at24c_eeprom_init(i2c[13], 0x54, 256);
- /* eeprom@55 */
- at24c_eeprom_init(i2c[13], 0x55, 256);
- /* eeprom@57 */
- at24c_eeprom_init(i2c[13], 0x57, 256);
-
- /* &i2c14 */
- /* io_expander9 - pca9555@10 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x10);
- /* io_expander10 - pca9555@11 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x11);
- /* io_expander11 - pca9555@12 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x12);
- /* io_expander12 - pca9555@13 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x13);
- /* io_expander13 - pca9555@14 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x14);
- /* io_expander14 - pca9555@15 */
- i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x15);
-
- /* &i2c15 */
- /* temperature-sensor@1f - tmp421 */
- i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f);
- /* eeprom@52 */
- at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
-}
-
static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
{
return ASPEED_MACHINE(obj)->mmio_exec;
@@ -651,26 +471,6 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
aspeed_machine_ast2600_class_emmc_init(oc);
};
-static void aspeed_machine_catalina_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Facebook Catalina BMC (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = CATALINA_BMC_HW_STRAP1;
- amc->hw_strap2 = CATALINA_BMC_HW_STRAP2;
- amc->fmc_model = "w25q01jvq";
- amc->spi_model = NULL;
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC2_ON;
- amc->i2c_init = catalina_bmc_i2c_init;
- mc->default_ram_size = CATALINA_BMC_RAM_SIZE;
- aspeed_machine_class_init_cpus_defaults(mc);
- aspeed_machine_ast2600_class_emmc_init(oc);
-}
-
#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
/* Main SYSCLK frequency in Hz (200MHz) */
#define SYSCLK_FRQ 200000000ULL
@@ -811,11 +611,6 @@ static const TypeInfo aspeed_machine_types[] = {
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_machine_ast2600_evb_class_init,
.interfaces = arm_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("catalina-bmc"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_catalina_class_init,
- .interfaces = arm_machine_interfaces,
}, {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catalina.c
new file mode 100644
index 000000000000..91977a4d3cc4
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_catalina.c
@@ -0,0 +1,225 @@
+/*
+ * Facebook Catalina
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/gpio/pca9552.h"
+#include "hw/gpio/pca9554.h"
+#include "hw/nvram/eeprom_at24c.h"
+#include "hw/sensor/tmp105.h"
+
+/* Catalina hardware value */
+#define CATALINA_BMC_HW_STRAP1 0x00002002
+#define CATALINA_BMC_HW_STRAP2 0x00000800
+#define CATALINA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
+
+#define TYPE_TMP75 TYPE_TMP105
+#define TYPE_TMP421 "tmp421"
+#define TYPE_DS1338 "ds1338"
+
+static void catalina_bmc_i2c_init(AspeedMachineState *bmc)
+{
+ /* Reference from v6.16-rc2 aspeed-bmc-facebook-catalina.dts */
+
+ AspeedSoCState *soc = bmc->soc;
+ I2CBus *i2c[16] = {};
+ I2CSlave *i2c_mux;
+
+ /* busses 0-15 are all used. */
+ for (int i = 0; i < ARRAY_SIZE(i2c); i++) {
+ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i);
+ }
+
+ /* &i2c0 */
+ /* i2c-mux@71 (PCA9546) on i2c0 */
+ i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71);
+
+ /* i2c-mux@72 (PCA9546) on i2c0 */
+ i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72);
+
+ /* i2c0mux1ch1 */
+ /* io_expander7 - pca9535@20 */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
+ TYPE_PCA9552, 0x20);
+ /* eeprom@50 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
+
+ /* i2c-mux@73 (PCA9546) on i2c0 */
+ i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73);
+
+ /* i2c-mux@75 (PCA9546) on i2c0 */
+ i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75);
+
+ /* i2c-mux@76 (PCA9546) on i2c0 */
+ i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76);
+
+ /* i2c0mux4ch1 */
+ /* io_expander8 - pca9535@21 */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1),
+ TYPE_PCA9552, 0x21);
+ /* eeprom@50 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB);
+
+ /* i2c-mux@77 (PCA9546) on i2c0 */
+ i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77);
+
+
+ /* &i2c1 */
+ /* i2c-mux@70 (PCA9548) on i2c1 */
+ i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70);
+ /* i2c1mux0ch0 */
+ /* ina238@41 - no model */
+ /* ina238@42 - no model */
+ /* ina238@44 - no model */
+ /* i2c1mux0ch1 */
+ /* ina238@41 - no model */
+ /* ina238@43 - no model */
+ /* i2c1mux0ch4 */
+ /* ltc4287@42 - no model */
+ /* ltc4287@43 - no model */
+
+ /* i2c1mux0ch5 */
+ /* eeprom@54 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB);
+ /* tpm75@4f */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f);
+
+ /* i2c1mux0ch6 */
+ /* io_expander5 - pca9554@27 */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
+ TYPE_PCA9554, 0x27);
+ /* io_expander6 - pca9555@25 */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
+ TYPE_PCA9552, 0x25);
+ /* eeprom@51 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x51, 8 * KiB);
+
+ /* i2c1mux0ch7 */
+ /* eeprom@53 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x53, 8 * KiB);
+ /* temperature-sensor@4b - tmp75 */
+ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b);
+
+ /* &i2c2 */
+ /* io_expander0 - pca9555@20 */
+ i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x20);
+ /* io_expander0 - pca9555@21 */
+ i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x21);
+ /* io_expander0 - pca9555@27 */
+ i2c_slave_create_simple(i2c[2], TYPE_PCA9552, 0x27);
+ /* eeprom@50 */
+ at24c_eeprom_init(i2c[2], 0x50, 8 * KiB);
+ /* eeprom@51 */
+ at24c_eeprom_init(i2c[2], 0x51, 8 * KiB);
+
+ /* &i2c5 */
+ /* i2c-mux@70 (PCA9548) on i2c5 */
+ i2c_mux = i2c_slave_create_simple(i2c[5], TYPE_PCA9548, 0x70);
+ /* i2c5mux0ch6 */
+ /* eeprom@52 */
+ at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 6), 0x52, 8 * KiB);
+ /* i2c5mux0ch7 */
+ /* ina230@40 - no model */
+ /* ina230@41 - no model */
+ /* ina230@44 - no model */
+ /* ina230@45 - no model */
+
+ /* &i2c6 */
+ /* io_expander3 - pca9555@21 */
+ i2c_slave_create_simple(i2c[6], TYPE_PCA9552, 0x21);
+ /* rtc@6f - nct3018y */
+ i2c_slave_create_simple(i2c[6], TYPE_DS1338, 0x6f);
+
+ /* &i2c9 */
+ /* io_expander4 - pca9555@4f */
+ i2c_slave_create_simple(i2c[9], TYPE_PCA9552, 0x4f);
+ /* temperature-sensor@4b - tpm75 */
+ i2c_slave_create_simple(i2c[9], TYPE_TMP75, 0x4b);
+ /* eeprom@50 */
+ at24c_eeprom_init(i2c[9], 0x50, 8 * KiB);
+ /* eeprom@56 */
+ at24c_eeprom_init(i2c[9], 0x56, 8 * KiB);
+
+ /* &i2c10 */
+ /* temperature-sensor@1f - tpm421 */
+ i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f);
+ /* eeprom@50 */
+ at24c_eeprom_init(i2c[10], 0x50, 8 * KiB);
+
+ /* &i2c11 */
+ /* ssif-bmc@10 - no model */
+
+ /* &i2c12 */
+ /* eeprom@50 */
+ at24c_eeprom_init(i2c[12], 0x50, 8 * KiB);
+
+ /* &i2c13 */
+ /* eeprom@50 */
+ at24c_eeprom_init(i2c[13], 0x50, 8 * KiB);
+ /* eeprom@54 */
+ at24c_eeprom_init(i2c[13], 0x54, 256);
+ /* eeprom@55 */
+ at24c_eeprom_init(i2c[13], 0x55, 256);
+ /* eeprom@57 */
+ at24c_eeprom_init(i2c[13], 0x57, 256);
+
+ /* &i2c14 */
+ /* io_expander9 - pca9555@10 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x10);
+ /* io_expander10 - pca9555@11 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x11);
+ /* io_expander11 - pca9555@12 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x12);
+ /* io_expander12 - pca9555@13 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x13);
+ /* io_expander13 - pca9555@14 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x14);
+ /* io_expander14 - pca9555@15 */
+ i2c_slave_create_simple(i2c[14], TYPE_PCA9552, 0x15);
+
+ /* &i2c15 */
+ /* temperature-sensor@1f - tmp421 */
+ i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f);
+ /* eeprom@52 */
+ at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
+}
+
+static void aspeed_machine_catalina_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Facebook Catalina BMC (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = CATALINA_BMC_HW_STRAP1;
+ amc->hw_strap2 = CATALINA_BMC_HW_STRAP2;
+ amc->fmc_model = "w25q01jvq";
+ amc->spi_model = NULL;
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC2_ON;
+ amc->i2c_init = catalina_bmc_i2c_init;
+ mc->default_ram_size = CATALINA_BMC_RAM_SIZE;
+ aspeed_machine_class_init_cpus_defaults(mc);
+ aspeed_machine_ast2600_class_emmc_init(oc);
+}
+
+static const TypeInfo aspeed_ast2600_catalina_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("catalina-bmc"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_catalina_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_catalina_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index d7e4d87dc8af..6b79517ec932 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -58,6 +58,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2500_yosemitev2.c',
'aspeed_ast2600.c',
'aspeed_ast2600_bletchley.c',
+ 'aspeed_ast2600_catalina.c',
'aspeed_ast2600_fby35.c',
'aspeed_ast2600_fuji.c',
'aspeed_ast2600_gb200nvl.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 27/30] hw/arm/aspeed: Split AST2600 EVB machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (25 preceding siblings ...)
2025-11-04 8:31 ` [PULL 26/30] hw/arm/aspeed: Split Catalina " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 28/30] hw/arm/aspeed: Split AST2700 " Cédric Le Goater
` (2 subsequent siblings)
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Aspeed AST2600 EVB machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_evb.c.
This refactor continues the modularization effort of the Aspeed platform
machine definitions, separating each board’s initialization logic into its
own dedicated source file. It improves code maintainability, readability,
and reduces clutter in aspeed.c, simplifying future platform extensions.
Key updates include:
- Moved AST2600_EVB_HW_STRAP1 and AST2600_EVB_HW_STRAP2 macro definitions
into the new aspeed_ast2600_evb.c file.
- Moved ast2600_evb_i2c_init() and related device initialization code into
the new aspeed_ast2600_evb.c file.
- Moved aspeed_machine_ast2600_evb_class_init() and type registration logic
out of aspeed.c.
- Added aspeed_ast2600_evb.c to the Meson build system (meson.build).
- Cleaned up all AST2600 EVB-specific code and macros from aspeed.c.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-28-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 44 -------------------------
hw/arm/aspeed_ast2600_evb.c | 65 +++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 66 insertions(+), 44 deletions(-)
create mode 100644 hw/arm/aspeed_ast2600_evb.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ad3bb8cbac3d..ce3610ce5a94 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -33,10 +33,6 @@ static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
};
-/* AST2600 evb hardware value */
-#define AST2600_EVB_HW_STRAP1 0x000000C0
-#define AST2600_EVB_HW_STRAP2 0x00000003
-
#ifdef TARGET_AARCH64
/* AST2700 evb hardware value */
/* SCU HW Strap1 */
@@ -268,19 +264,6 @@ static void aspeed_machine_init(MachineState *machine)
arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
}
-static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
- uint8_t *eeprom_buf = g_malloc0(8 * 1024);
-
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
- eeprom_buf);
-
- /* LM75 is compatible with TMP105 driver */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
- TYPE_TMP105, 0x4d);
-}
-
void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
{
i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, bus_id),
@@ -449,28 +432,6 @@ static void aspeed_machine_class_init(ObjectClass *oc, const void *data)
aspeed_machine_class_props_init(oc);
}
-static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Aspeed AST2600 EVB (Cortex-A7)";
- amc->soc_name = "ast2600-a3";
- amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
- amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
- amc->fmc_model = "w25q512jv";
- amc->spi_model = "w25q512jv";
- amc->num_cs = 1;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
- ASPEED_MAC3_ON;
- amc->sdhci_wp_inverted = true;
- amc->i2c_init = ast2600_evb_i2c_init;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
- aspeed_machine_ast2600_class_emmc_init(oc);
-};
-
#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
/* Main SYSCLK frequency in Hz (200MHz) */
#define SYSCLK_FRQ 200000000ULL
@@ -607,11 +568,6 @@ static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
static const TypeInfo aspeed_machine_types[] = {
{
- .name = MACHINE_TYPE_NAME("ast2600-evb"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_ast2600_evb_class_init,
- .interfaces = arm_machine_interfaces,
- }, {
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
diff --git a/hw/arm/aspeed_ast2600_evb.c b/hw/arm/aspeed_ast2600_evb.c
new file mode 100644
index 000000000000..c43d2687c1c7
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_evb.c
@@ -0,0 +1,65 @@
+/*
+ * ASPEED AST2600 EVB
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/smbus_eeprom.h"
+#include "hw/sensor/tmp105.h"
+
+/* AST2600 evb hardware value */
+#define AST2600_EVB_HW_STRAP1 0x000000C0
+#define AST2600_EVB_HW_STRAP2 0x00000003
+
+static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+ uint8_t *eeprom_buf = g_malloc0(8 * 1024);
+
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
+ eeprom_buf);
+
+ /* LM75 is compatible with TMP105 driver */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
+ TYPE_TMP105, 0x4d);
+}
+
+static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2600 EVB (Cortex-A7)";
+ amc->soc_name = "ast2600-a3";
+ amc->hw_strap1 = AST2600_EVB_HW_STRAP1;
+ amc->hw_strap2 = AST2600_EVB_HW_STRAP2;
+ amc->fmc_model = "w25q512jv";
+ amc->spi_model = "w25q512jv";
+ amc->num_cs = 1;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
+ ASPEED_MAC3_ON;
+ amc->sdhci_wp_inverted = true;
+ amc->i2c_init = ast2600_evb_i2c_init;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+ aspeed_machine_ast2600_class_emmc_init(oc);
+};
+
+static const TypeInfo aspeed_ast2600_evb_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("ast2600-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2600_evb_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast2600_evb_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 6b79517ec932..dc7cde4bc1bc 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -59,6 +59,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600.c',
'aspeed_ast2600_bletchley.c',
'aspeed_ast2600_catalina.c',
+ 'aspeed_ast2600_evb.c',
'aspeed_ast2600_fby35.c',
'aspeed_ast2600_fuji.c',
'aspeed_ast2600_gb200nvl.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 28/30] hw/arm/aspeed: Split AST2700 EVB machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (26 preceding siblings ...)
2025-11-04 8:31 ` [PULL 27/30] hw/arm/aspeed: Split AST2600 EVB " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts() Cédric Le Goater
2025-11-04 8:31 ` [PULL 30/30] hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability Cédric Le Goater
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Aspeed AST2700 EVB machine implementation out of
aspeed.c into a new standalone file aspeed_ast27x0_evb.c.
This refactor continues the ongoing modularization of Aspeed platform
support, organizing each board’s initialization logic into its own
dedicated source file. It improves maintainability, readability, and
makes it easier to extend or update individual platform support without
cluttering aspeed.c.
Key updates include:
- Moved AST2700_EVB_HW_STRAP1 and AST2700_EVB_HW_STRAP2 macro definitions
into the new aspeed_ast27x0_evb.c file.
- Moved ast2700_evb_i2c_init(), aspeed_machine_ast2700a0_evb_class_init(),
and aspeed_machine_ast2700a1_evb_class_init() into the new
aspeed_ast27x0_evb.c file.
- Removed the AST2700 EVB machine type registration from aspeed.c.
- Added aspeed_ast27x0_evb.c to the Meson build system (meson.build).
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-29-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 75 -------------------------------
hw/arm/aspeed_ast27x0_evb.c | 88 +++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 89 insertions(+), 75 deletions(-)
create mode 100644 hw/arm/aspeed_ast27x0_evb.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ce3610ce5a94..924c02bcb8c8 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -33,14 +33,6 @@ static struct arm_boot_info aspeed_board_binfo = {
.board_id = -1, /* device-tree-only board */
};
-#ifdef TARGET_AARCH64
-/* AST2700 evb hardware value */
-/* SCU HW Strap1 */
-#define AST2700_EVB_HW_STRAP1 0x00000800
-/* SCUIO HW Strap1 */
-#define AST2700_EVB_HW_STRAP2 0x00000700
-#endif
-
#define AST_SMP_MAILBOX_BASE 0x1e6e2180
#define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0)
#define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4)
@@ -512,78 +504,11 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
aspeed_machine_class_init_cpus_defaults(mc);
}
-#ifdef TARGET_AARCH64
-static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- /* LM75 is compatible with TMP105 driver */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0),
- TYPE_TMP105, 0x4d);
-}
-
-static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Aspeed AST2700 A0 EVB (Cortex-A35)";
- amc->soc_name = "ast2700-a0";
- amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
- amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
- amc->fmc_model = "w25q01jvq";
- amc->spi_model = "w25q512jv";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
- amc->uart_default = ASPEED_DEV_UART12;
- amc->i2c_init = ast2700_evb_i2c_init;
- amc->vbootrom = true;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
-static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->alias = "ast2700-evb";
- mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)";
- amc->soc_name = "ast2700-a1";
- amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
- amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
- amc->fmc_model = "w25q01jvq";
- amc->spi_model = "w25q512jv";
- amc->num_cs = 2;
- amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
- amc->uart_default = ASPEED_DEV_UART12;
- amc->i2c_init = ast2700_evb_i2c_init;
- amc->vbootrom = true;
- mc->default_ram_size = 1 * GiB;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-#endif
-
static const TypeInfo aspeed_machine_types[] = {
{
.name = MACHINE_TYPE_NAME("ast1030-evb"),
.parent = TYPE_ASPEED_MACHINE,
.class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
- .interfaces = arm_machine_interfaces,
-#ifdef TARGET_AARCH64
- }, {
- .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_ast2700a0_evb_class_init,
- .interfaces = aarch64_machine_interfaces,
- }, {
- .name = MACHINE_TYPE_NAME("ast2700a1-evb"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_machine_ast2700a1_evb_class_init,
- .interfaces = aarch64_machine_interfaces,
-#endif
}, {
.name = TYPE_ASPEED_MACHINE,
.parent = TYPE_MACHINE,
diff --git a/hw/arm/aspeed_ast27x0_evb.c b/hw/arm/aspeed_ast27x0_evb.c
new file mode 100644
index 000000000000..0c4e9cd9cd8e
--- /dev/null
+++ b/hw/arm/aspeed_ast27x0_evb.c
@@ -0,0 +1,88 @@
+/*
+ * ASPEED AST27x0 EVB
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/sensor/tmp105.h"
+
+/* AST2700 evb hardware value */
+/* SCU HW Strap1 */
+#define AST2700_EVB_HW_STRAP1 0x00000800
+/* SCUIO HW Strap1 */
+#define AST2700_EVB_HW_STRAP2 0x00000700
+
+static void ast2700_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /* LM75 is compatible with TMP105 driver */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0),
+ TYPE_TMP105, 0x4d);
+}
+
+static void aspeed_machine_ast2700a0_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST2700 A0 EVB (Cortex-A35)";
+ amc->soc_name = "ast2700-a0";
+ amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
+ amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
+ amc->fmc_model = "w25q01jvq";
+ amc->spi_model = "w25q512jv";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
+ amc->uart_default = ASPEED_DEV_UART12;
+ amc->i2c_init = ast2700_evb_i2c_init;
+ amc->vbootrom = true;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static void aspeed_machine_ast2700a1_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->alias = "ast2700-evb";
+ mc->desc = "Aspeed AST2700 A1 EVB (Cortex-A35)";
+ amc->soc_name = "ast2700-a1";
+ amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
+ amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
+ amc->fmc_model = "w25q01jvq";
+ amc->spi_model = "w25q512jv";
+ amc->num_cs = 2;
+ amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
+ amc->uart_default = ASPEED_DEV_UART12;
+ amc->i2c_init = ast2700_evb_i2c_init;
+ amc->vbootrom = true;
+ mc->default_ram_size = 1 * GiB;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast27x0_evb_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("ast2700a0-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2700a0_evb_class_init,
+ .interfaces = aarch64_machine_interfaces,
+ }, {
+ .name = MACHINE_TYPE_NAME("ast2700a1-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast2700a1_evb_class_init,
+ .interfaces = aarch64_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast27x0_evb_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index dc7cde4bc1bc..1467a2034c1b 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -70,6 +70,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'fby35.c'))
arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files(
'aspeed_ast27x0.c',
+ 'aspeed_ast27x0_evb.c',
'aspeed_ast27x0-fc.c',
'aspeed_ast27x0-ssp.c',
'aspeed_ast27x0-tsp.c',
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts()
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (27 preceding siblings ...)
2025-11-04 8:31 ` [PULL 28/30] hw/arm/aspeed: Split AST2700 " Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
2025-11-04 8:31 ` [PULL 30/30] hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability Cédric Le Goater
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
The helper function connect_serial_hds_to_uarts() has been renamed to
aspeed_connect_serial_hds_to_uarts() and promoted to a public Aspeed
machine API.
Previously, this function was declared static within aspeed.c and only
used internally. Renaming it with the aspeed_ prefix and exporting its
declaration in aspeed.h makes the function accessible to other Aspeed
machine implementations that need to attach host serial devices to SoC
UARTs.
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-30-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 14 ++++++++++++++
hw/arm/aspeed.c | 6 +++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 87dcadab264f..714bbd326c48 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -111,4 +111,18 @@ I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr);
*/
void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc);
+/*
+ * aspeed_connect_serial_hds_to_uarts:
+ * @bmc: pointer to the #AspeedMachineState.
+ *
+ * Connect host serial backends (character devices) to the UART interfaces
+ * of the Aspeed SoC used by the given BMC machine.
+ *
+ * The function assigns `serial_hd(0)` to the primary UART channel
+ * (either chosen via `bmc->uart_chosen` or the machine class default),
+ * and iteratively connects remaining serial ports to other available UARTs
+ * on the SoC based on their index.
+ */
+void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc);
+
#endif
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 924c02bcb8c8..7e9cd532d136 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -118,7 +118,7 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc,
&error_fatal);
}
-static void connect_serial_hds_to_uarts(AspeedMachineState *bmc)
+void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc)
{
AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);
AspeedSoCState *s = bmc->soc;
@@ -189,7 +189,7 @@ static void aspeed_machine_init(MachineState *machine)
object_property_set_int(OBJECT(bmc->soc), "hw-prot-key",
ASPEED_SCU_PROT_KEY, &error_abort);
}
- connect_serial_hds_to_uarts(bmc);
+ aspeed_connect_serial_hds_to_uarts(bmc);
qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
if (defaults_enabled()) {
@@ -444,7 +444,7 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
object_property_set_link(OBJECT(bmc->soc), "memory",
OBJECT(get_system_memory()), &error_abort);
- connect_serial_hds_to_uarts(bmc);
+ aspeed_connect_serial_hds_to_uarts(bmc);
qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
if (defaults_enabled()) {
--
2.51.1
^ permalink raw reply related [flat|nested] 31+ messages in thread* [PULL 30/30] hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability
2025-11-04 8:31 [PULL 00/30] aspeed queue Cédric Le Goater
` (28 preceding siblings ...)
2025-11-04 8:31 ` [PULL 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts() Cédric Le Goater
@ 2025-11-04 8:31 ` Cédric Le Goater
29 siblings, 0 replies; 31+ messages in thread
From: Cédric Le Goater @ 2025-11-04 8:31 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Jamin Lin, Cédric Le Goater
From: Jamin Lin <jamin_lin@aspeedtech.com>
This commit moves the Aspeed AST1030 MiniBMC machine
implementation out of aspeed.c into a new standalone file
aspeed_ast10x0_evb.c.
This refactor continues the modularization effort for Aspeed platform
support, placing each board’s logic and initialization sequence in its
own dedicated source file. It improves maintainability, readability, and
makes it easier to extend support for additional AST10x0-based variants.
Key updates include:
- Moved aspeed_minibmc_machine_init() and
aspeed_minibmc_machine_ast1030_evb_class_init() from aspeed.c to
aspeed_ast10x0_evb.c.
- Moved ast1030_evb_i2c_init() and associated I2C setup code.
- Removed AST1030 EVB machine type registration from aspeed.c.
- Added aspeed_ast10x0_evb.c to the Meson build system (meson.build).
No functional changes.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-31-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/arm/aspeed.c | 89 -----------------------------
hw/arm/aspeed_ast10x0_evb.c | 108 ++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 109 insertions(+), 89 deletions(-)
create mode 100644 hw/arm/aspeed_ast10x0_evb.c
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 7e9cd532d136..3a5071a38413 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -16,14 +16,9 @@
#include "hw/arm/aspeed_soc.h"
#include "hw/arm/machines-qom.h"
#include "hw/block/flash.h"
-#include "hw/i2c/smbus_eeprom.h"
#include "hw/gpio/pca9552.h"
#include "hw/gpio/pca9554.h"
-#include "hw/sensor/tmp105.h"
-#include "hw/misc/led.h"
-#include "hw/qdev-properties.h"
#include "system/block-backend.h"
-#include "system/reset.h"
#include "qemu/error-report.h"
#include "qemu/units.h"
#include "hw/qdev-clock.h"
@@ -424,92 +419,8 @@ static void aspeed_machine_class_init(ObjectClass *oc, const void *data)
aspeed_machine_class_props_init(oc);
}
-#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
-/* Main SYSCLK frequency in Hz (200MHz) */
-#define SYSCLK_FRQ 200000000ULL
-
-static void aspeed_minibmc_machine_init(MachineState *machine)
-{
- AspeedMachineState *bmc = ASPEED_MACHINE(machine);
- AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
- Clock *sysclk;
-
- sysclk = clock_new(OBJECT(machine), "SYSCLK");
- clock_set_hz(sysclk, SYSCLK_FRQ);
-
- bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
- object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
- object_unref(OBJECT(bmc->soc));
- qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
-
- object_property_set_link(OBJECT(bmc->soc), "memory",
- OBJECT(get_system_memory()), &error_abort);
- aspeed_connect_serial_hds_to_uarts(bmc);
- qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
-
- if (defaults_enabled()) {
- aspeed_board_init_flashes(&bmc->soc->fmc,
- bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
- amc->num_cs,
- 0);
-
- aspeed_board_init_flashes(&bmc->soc->spi[0],
- bmc->spi_model ? bmc->spi_model : amc->spi_model,
- amc->num_cs, amc->num_cs);
-
- aspeed_board_init_flashes(&bmc->soc->spi[1],
- bmc->spi_model ? bmc->spi_model : amc->spi_model,
- amc->num_cs, (amc->num_cs * 2));
- }
-
- if (amc->i2c_init) {
- amc->i2c_init(bmc);
- }
-
- armv7m_load_kernel(ARM_CPU(first_cpu),
- machine->kernel_filename,
- 0,
- AST1030_INTERNAL_FLASH_SIZE);
-}
-
-static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
-{
- AspeedSoCState *soc = bmc->soc;
-
- /* U10 24C08 connects to SDA/SCL Group 1 by default */
- uint8_t *eeprom_buf = g_malloc0(32 * 1024);
- smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
-
- /* U11 LM75 connects to SDA/SCL Group 2 by default */
- i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
-}
-
-static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
- const void *data)
-{
- MachineClass *mc = MACHINE_CLASS(oc);
- AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
- mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)";
- amc->soc_name = "ast1030-a1";
- amc->hw_strap1 = 0;
- amc->hw_strap2 = 0;
- mc->init = aspeed_minibmc_machine_init;
- amc->i2c_init = ast1030_evb_i2c_init;
- mc->default_ram_size = 0;
- amc->fmc_model = "w25q80bl";
- amc->spi_model = "w25q256";
- amc->num_cs = 2;
- amc->macs_mask = 0;
- aspeed_machine_class_init_cpus_defaults(mc);
-}
-
static const TypeInfo aspeed_machine_types[] = {
{
- .name = MACHINE_TYPE_NAME("ast1030-evb"),
- .parent = TYPE_ASPEED_MACHINE,
- .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
- }, {
.name = TYPE_ASPEED_MACHINE,
.parent = TYPE_MACHINE,
.instance_size = sizeof(AspeedMachineState),
diff --git a/hw/arm/aspeed_ast10x0_evb.c b/hw/arm/aspeed_ast10x0_evb.c
new file mode 100644
index 000000000000..7af2a77865e4
--- /dev/null
+++ b/hw/arm/aspeed_ast10x0_evb.c
@@ -0,0 +1,108 @@
+/*
+ * ASPEED AST10x0 EVB
+ *
+ * Copyright 2016 IBM Corp.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/qdev-clock.h"
+#include "system/system.h"
+#include "hw/i2c/smbus_eeprom.h"
+
+#define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024)
+/* Main SYSCLK frequency in Hz (200MHz) */
+#define SYSCLK_FRQ 200000000ULL
+
+static void aspeed_minibmc_machine_init(MachineState *machine)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(machine);
+ AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
+ Clock *sysclk;
+
+ sysclk = clock_new(OBJECT(machine), "SYSCLK");
+ clock_set_hz(sysclk, SYSCLK_FRQ);
+
+ bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
+ object_unref(OBJECT(bmc->soc));
+ qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
+
+ object_property_set_link(OBJECT(bmc->soc), "memory",
+ OBJECT(get_system_memory()), &error_abort);
+ aspeed_connect_serial_hds_to_uarts(bmc);
+ qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
+
+ if (defaults_enabled()) {
+ aspeed_board_init_flashes(&bmc->soc->fmc,
+ bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
+ amc->num_cs,
+ 0);
+
+ aspeed_board_init_flashes(&bmc->soc->spi[0],
+ bmc->spi_model ? bmc->spi_model : amc->spi_model,
+ amc->num_cs, amc->num_cs);
+
+ aspeed_board_init_flashes(&bmc->soc->spi[1],
+ bmc->spi_model ? bmc->spi_model : amc->spi_model,
+ amc->num_cs, (amc->num_cs * 2));
+ }
+
+ if (amc->i2c_init) {
+ amc->i2c_init(bmc);
+ }
+
+ armv7m_load_kernel(ARM_CPU(first_cpu),
+ machine->kernel_filename,
+ 0,
+ AST1030_INTERNAL_FLASH_SIZE);
+}
+
+static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
+{
+ AspeedSoCState *soc = bmc->soc;
+
+ /* U10 24C08 connects to SDA/SCL Group 1 by default */
+ uint8_t *eeprom_buf = g_malloc0(32 * 1024);
+ smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, eeprom_buf);
+
+ /* U11 LM75 connects to SDA/SCL Group 2 by default */
+ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 1), "tmp105", 0x4d);
+}
+
+static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)";
+ amc->soc_name = "ast1030-a1";
+ amc->hw_strap1 = 0;
+ amc->hw_strap2 = 0;
+ mc->init = aspeed_minibmc_machine_init;
+ amc->i2c_init = ast1030_evb_i2c_init;
+ mc->default_ram_size = 0;
+ amc->fmc_model = "w25q80bl";
+ amc->spi_model = "w25q256";
+ amc->num_cs = 2;
+ amc->macs_mask = 0;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast10x0_evb_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("ast1030-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_minibmc_machine_ast1030_evb_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast10x0_evb_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index 1467a2034c1b..aeaf654790c2 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -67,6 +67,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_qcom-firework.c',
'aspeed_ast2600_rainier.c',
'aspeed_ast10x0.c',
+ 'aspeed_ast10x0_evb.c',
'fby35.c'))
arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true: files(
'aspeed_ast27x0.c',
--
2.51.1
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