[PATCH v7 10/22] hw/i3c/dw-i3c: Treat more registers as read-as-zero

Jamin Lin
2026-02-25T02:14:15Z

RESET_CTRL and INTR_FORCE are write-only.

Signed-off-by: Joe Komlodi <komlodi@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/i3c/dw-i3c.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c
index 87c8f63da9..eeaf1125e4 100644
--- a/hw/i3c/dw-i3c.c
+++ b/hw/i3c/dw-i3c.c
@@ -342,7 +342,10 @@ static uint64_t dw_i3c_read(void *opaque, hwaddr offset, unsigned size)
uint64_t value;

switch (addr) {
+ /* RAZ */
case R_COMMAND_QUEUE_PORT:
+ case R_RESET_CTRL:
+ case R_INTR_FORCE:
value = 0;
break;
default:
--
2.43.0