From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>,
Troy Lee <troy_lee@aspeedtech.com>,
Kane Chen <kane_chen@aspeedtech.com>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>
Subject: [PATCH v1 00/13] hw/usb/ehci: Add 64-bit descriptor addressing support
Date: Wed, 11 Mar 2026 07:26:15 +0000 [thread overview]
Message-ID: <20260311072614.1095587-1-jamin_lin@aspeedtech.com> (raw)
EHCI supports 64-bit addressing through the CTRLDSSEGMENT register,
which provides the upper 32 bits of descriptor addresses when the
controller advertises 64-bit capability.
Currently QEMU EHCI model only partially supports this functionality and
descriptor addresses are effectively treated as 32-bit. This becomes
problematic on systems where system memory is located above the 4GB
boundary.
The Linux EHCI driver enables 64-bit addressing if the controller
advertises the capability. During initialization it programs the
segment register to zero:
https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-hcd.c#L600
The driver also notes that descriptor structures allocated from the
DMA pool use segment zero semantics. Descriptor memory is allocated
using the DMA API and platforms may configure a 64-bit DMA mask,
allowing descriptor memory to be placed above 4GB.
On AST2700 platforms, system DRAM is mapped at 0x400000000. As a
result, descriptor addresses constructed directly from the EHCI
registers do not match the actual system addresses used by the
controller when accessing queue heads (QH) and queue element transfer
descriptors (qTD).
This patch series implements full 64-bit descriptor addressing support
in the EHCI emulation. Descriptor address handling is updated to use
64-bit values and the descriptor structures (QH, qTD, iTD and siTD)
are extended to support the upper address bits provided by the segment
register.
In addition, a descriptor-addr-offset property is introduced so
platforms can apply an address translation when descriptor memory
resides above the 4GB boundary.
The AST2700 machine uses this property to account for its DRAM mapping
at 0x400000000 and enables 64-bit EHCI DMA addressing.
Test Result:
1. EHCI 32bits with ast2600-evb machine
Command line:
./build/qemu-system-arm \
-machine ast2600-evb \
-m 1G \
-drive file=image-bmc,if=mtd,format=raw \
-nographic \
-device usb-kbd,bus=usb-bus.1,id=mykbd \
-drive id=usbdisk,if=none,file=image0.ext4,format=raw \
-device usb-storage,bus=usb-bus.1,id=mystorage,drive=usbdisk
-snapshot \
-nographic
Result:
unable to initialize usb specBus 001 Device 001: ID 1d6b:0002 Linux 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd EHCI Host Controller
Bus 001 Device 002: ID 0627:0001 QEMU QEMU USB Keyboard
Bus 001 Device 003: ID 46f4:0001 QEMU QEMU USB HARDDRIVE
Bus 002 Device 001: ID 1d6b:0001 Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host Controller
2. EHCI 64bits with ast2700a2-evb machine
Command line:
./build/qemu-system-aarch64 -M ast2700a2-evb -nographic\
-bios ast27x0_bootrom.bin \
-drive file=image-bmc,format=raw,if=mtd \
-snapshot \
-device usb-kbd,bus=usb-bus.3,id=mykbd \
-drive id=usbdisk,if=none,file=image0.ext4,format=raw \
-device usb-storage,bus=usb-bus.3,id=mystorage,drive=usbdisk
Result:
root@ast2700-default:~# lsusb
unable to initialize usb specBus 001 Device 001: ID 1d6b:0001 Linux 6.18.3-v00.08.01-g172b7e27a30d uhci_hcd Generic UHCI Host Controller
Bus 002 Device 001: ID 1d6b:0002 Linux 6.18.3-v00.08.01-g172b7e27a30d ehci_hcd EHCI Host Controller
Bus 002 Device 002: ID 0627:0001 QEMU QEMU USB Keyboard
Bus 002 Device 003: ID 46f4:0001 QEMU QEMU USB HARDDRIVE
v1
1. Fix checkpatch coding style issues
2. Implement 64-bit addressing for QH/qTD/iTD/siTD descriptors
3. Add descriptor address offset property
4. Enable 64-bit EHCI DMA addressing on AST2700
5. Configure descriptor address offset for AST2700
Jamin Lin (13):
hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch
hw/usb/hcd-ehci.c: Fix coding style issues reported by checkpatch
hw/usb/hcd-ehci: Change descriptor addresses to 64-bit
hw/usb/trace-events: Print EHCI queue and transfer addresses as 64-bit
hw/usb/hcd-ehci: Add property to advertise 64-bit addressing
capability
hw/usb/hcd-ehci: Reject CTRLDSSEGMENT writes without 64-bit capability
hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing
hw/usb/hcd-ehci: Implement 64-bit qTD descriptor addressing
hw/usb/hcd-ehci: Implement 64-bit iTD descriptor addressing
hw/usb/hcd-ehci: Implement 64-bit siTD descriptor addressing
hw/usb/hcd-ehci: Add descriptor address offset property
hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing
hw/arm/aspeed_ast27x0: Set EHCI descriptor address offset
hw/usb/hcd-ehci.h | 36 +++--
hw/arm/aspeed_ast27x0.c | 5 +
hw/usb/hcd-ehci-pci.c | 4 +
hw/usb/hcd-ehci-sysbus.c | 4 +
hw/usb/hcd-ehci.c | 293 ++++++++++++++++++++++++---------------
hw/usb/trace-events | 16 +--
6 files changed, 226 insertions(+), 132 deletions(-)
--
2.43.0
next reply other threads:[~2026-03-11 7:26 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 7:26 Jamin Lin [this message]
2026-03-11 7:26 ` [PATCH v1 01/13] hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch Jamin Lin
2026-03-11 7:26 ` [PATCH v1 02/13] hw/usb/hcd-ehci.c: " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 03/13] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit Jamin Lin
2026-03-11 7:26 ` [PATCH v1 04/13] hw/usb/trace-events: Print EHCI queue and transfer addresses as 64-bit Jamin Lin
2026-03-11 7:26 ` [PATCH v1 05/13] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 06/13] hw/usb/hcd-ehci: Reject CTRLDSSEGMENT writes without 64-bit capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 07/13] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 08/13] hw/usb/hcd-ehci: Implement 64-bit qTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 09/13] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 10/13] hw/usb/hcd-ehci: Implement 64-bit siTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 11/13] hw/usb/hcd-ehci: Add descriptor address offset property Jamin Lin
2026-03-11 7:26 ` [PATCH v1 12/13] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 13/13] hw/arm/aspeed_ast27x0: Set EHCI descriptor address offset Jamin Lin
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