From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>,
Troy Lee <troy_lee@aspeedtech.com>,
Kane Chen <kane_chen@aspeedtech.com>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>
Subject: [PATCH v1 04/13] hw/usb/trace-events: Print EHCI queue and transfer addresses as 64-bit
Date: Wed, 11 Mar 2026 07:26:20 +0000 [thread overview]
Message-ID: <20260311072614.1095587-5-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260311072614.1095587-1-jamin_lin@aspeedtech.com>
Update the EHCI trace-events prototypes for QH, qTD, iTD, and siTD to
use uint64_t for the address argument and print it with PRIx64. This
ensures full 64-bit addresses are shown in trace output and improves
debugging of queue heads and transfer descriptors.
This change only affects trace formatting and does not modify the EHCI
data structure layout or behavior.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/usb/trace-events | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/usb/trace-events b/hw/usb/trace-events
index dd04f14add..ecd84e54c0 100644
--- a/hw/usb/trace-events
+++ b/hw/usb/trace-events
@@ -86,14 +86,14 @@ usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio 0x%04
usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio 0x%04x [port %d] = 0x%x (old: 0x%x)"
usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
-usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ 0x%08x: next 0x%08x qtds 0x%08x,0x%08x,0x%08x"
-usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ 0x%08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
-usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ 0x%08x - c %d, h %d, dtc %d, i %d"
-usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ 0x%08x: next 0x%08x altnext 0x%08x"
-usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ 0x%08x - tbytes %d, cpage %d, cerr %d, pid %d"
-usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ 0x%08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
-usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ 0x%08x: next 0x%08x - mplen %d, mult %d, ep %d, dev %d"
-usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ 0x%08x: next 0x%08x - active %d"
+usb_ehci_qh_ptrs(void *q, uint64_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ 0x%" PRIx64 ": next 0x%08x qtds 0x%08x,0x%08x,0x%08x"
+usb_ehci_qh_fields(uint64_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ 0x%" PRIx64 " - rl %d, mplen %d, eps %d, ep %d, dev %d"
+usb_ehci_qh_bits(uint64_t addr, int c, int h, int dtc, int i) "QH @ 0x%" PRIx64 " - c %d, h %d, dtc %d, i %d"
+usb_ehci_qtd_ptrs(void *q, uint64_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ 0x%" PRIx64 ": next 0x%08x altnext 0x%08x"
+usb_ehci_qtd_fields(uint64_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ 0x%" PRIx64 " - tbytes %d, cpage %d, cerr %d, pid %d"
+usb_ehci_qtd_bits(uint64_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ 0x%" PRIx64 " - ioc %d, active %d, halt %d, babble %d, xacterr %d"
+usb_ehci_itd(uint64_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ 0x%" PRIx64 ": next 0x%08x - mplen %d, mult %d, ep %d, dev %d"
+usb_ehci_sitd(uint64_t addr, uint32_t nxt, uint32_t active) "SITD @ 0x%" PRIx64 ": next 0x%08x - active %d"
usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
--
2.43.0
next prev parent reply other threads:[~2026-03-11 7:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 7:26 [PATCH v1 00/13] hw/usb/ehci: Add 64-bit descriptor addressing support Jamin Lin
2026-03-11 7:26 ` [PATCH v1 01/13] hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch Jamin Lin
2026-03-11 7:26 ` [PATCH v1 02/13] hw/usb/hcd-ehci.c: " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 03/13] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit Jamin Lin
2026-03-11 7:26 ` Jamin Lin [this message]
2026-03-11 7:26 ` [PATCH v1 05/13] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 06/13] hw/usb/hcd-ehci: Reject CTRLDSSEGMENT writes without 64-bit capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 07/13] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 08/13] hw/usb/hcd-ehci: Implement 64-bit qTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 09/13] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 10/13] hw/usb/hcd-ehci: Implement 64-bit siTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 11/13] hw/usb/hcd-ehci: Add descriptor address offset property Jamin Lin
2026-03-11 7:26 ` [PATCH v1 12/13] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 13/13] hw/arm/aspeed_ast27x0: Set EHCI descriptor address offset Jamin Lin
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