From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v3 08/10] hw/arm/aspeed_ast1040: Introduce I2C support
Date: Wed, 3 Jun 2026 04:00:38 +0000 [thread overview]
Message-ID: <20260603040027.938816-9-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260603040027.938816-1-jamin_lin@aspeedtech.com>
Introduce I2C controller support for the AST1040 SoC model.
The I2C model type is selected from the SoC type name, allowing the AST1040
SoC to use the corresponding aspeed.i2c-ast1040 model.
The I2C controller is mapped at 0x74C0F000 and uses IRQs
64 - 77, with one IRQ assigned per I2C bus.
The controller DRAM link is connected to SRAM1 (HyperRAM)
for DMA support.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast1040.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/aspeed_ast1040.c b/hw/arm/aspeed_ast1040.c
index 77211ce1f3..6d1cb9b102 100644
--- a/hw/arm/aspeed_ast1040.c
+++ b/hw/arm/aspeed_ast1040.c
@@ -117,6 +117,7 @@ static void aspeed_soc_ast1040_init(Object *obj)
object_initialize_child(obj, "sgpio[*]", &s->sgpiom[i],
"aspeed.sgpio-ast2700");
}
+ object_initialize_child(obj, "i2c", &s->i2c, TYPE_ASPEED_1040_I2C);
object_initialize_child(obj, "pwm", &s->pwm, TYPE_UNIMPLEMENTED_DEVICE);
object_initialize_child(obj, "espi", &s->espi, TYPE_UNIMPLEMENTED_DEVICE);
@@ -233,6 +234,21 @@ static void aspeed_soc_ast1040_realize(DeviceState *dev_soc, Error **errp)
aspeed_soc_ast1040_get_irq(s, ASPEED_DEV_SGPIOM0 + i));
}
+ /* I2C */
+ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(&s->sram[1]),
+ &error_abort);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
+ return;
+ }
+ aspeed_mmio_map(s->memory, SYS_BUS_DEVICE(&s->i2c), 0,
+ sc->memmap[ASPEED_DEV_I2C]);
+ for (i = 0; i < ASPEED_I2C_GET_CLASS(&s->i2c)->num_busses; i++) {
+ qemu_irq irq = qdev_get_gpio_in(DEVICE(&a->armv7m),
+ sc->irqmap[ASPEED_DEV_I2C] + i);
+ /* The AST1040 I2C controller has one IRQ per bus. */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c.busses[i]), 0, irq);
+ }
+
/* Unimplemented peripherals */
aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->pwm),
"aspeed.pwm",
--
2.43.0
next prev parent reply other threads:[~2026-06-03 4:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 4:00 [PATCH v3 00/10] hw/arm/aspeed: Add AST1040 peripheral support Jamin Lin
2026-06-03 4:00 ` [PATCH v3 01/10] hw/i2c/aspeed_i2c: Introduce dma_addr_lo_mask to unify DMA address handling Jamin Lin
2026-06-03 4:00 ` [PATCH v3 02/10] hw/i2c/aspeed_i2c: Increase AST2700 buffer mode size and adjust offset Jamin Lin
2026-06-03 4:00 ` [PATCH v3 03/10] hw/arm/aspeed_ast1040: Reuse AST2700 ADC model Jamin Lin
2026-06-03 4:00 ` [PATCH v3 04/10] hw/arm/aspeed_ast1040: Introduce PECI support Jamin Lin
2026-06-03 4:00 ` [PATCH v3 05/10] hw/arm/aspeed_ast1040: Reuse AST2700 GPIO controller model Jamin Lin
2026-06-03 4:00 ` [PATCH v3 06/10] hw/arm/aspeed_ast1040: Add SGPIO controller support Jamin Lin
2026-06-03 4:00 ` [PATCH v3 07/10] hw/i2c/aspeed_i2c: Introduce AST1040 I2C model Jamin Lin
2026-06-03 4:00 ` Jamin Lin [this message]
2026-06-03 4:00 ` [PATCH v3 09/10] hw/arm/aspeed_ast1040_evb: Introduce onboard I2C device Jamin Lin
2026-06-03 4:00 ` [PATCH v3 10/10] hw/arm/aspeed_ast1040: Reuse AST2700 watchdog models Jamin Lin
2026-06-03 6:31 ` [PATCH v3 00/10] hw/arm/aspeed: Add AST1040 peripheral support Cédric Le Goater
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