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[80.230.85.71]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4922fa890d8sm73585125e9.10.2026.06.16.02.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jun 2026 02:51:57 -0700 (PDT) Date: Tue, 16 Jun 2026 05:51:55 -0400 From: "Michael S. Tsirkin" To: Peter Maydell Cc: Eric Auger , eric.auger.pro@gmail.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, skolothumtho@nvidia.com, nicolinc@nvidia.com, nathanc@nvidia.com Subject: Re: [PATCH v2] hw/pci/pci: Enforce pci_setup_iommu_per_bus() is called only once per bus Message-ID: <20260616055142-mutt-send-email-mst@kernel.org> References: <20260603124415.1120808-1-eric.auger@redhat.com> MIME-Version: 1.0 In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: pDU-FR8f0AUk8SMrMLHIlet1Ju0R3uLTspsbSPzFVLI_1781603519 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Tue, Jun 16, 2026 at 09:47:55AM +0100, Peter Maydell wrote: > On Wed, 3 Jun 2026 at 13:44, Eric Auger wrote: > > > > Currently it is possible to attach several arm-smmuv3 devices to the > > same bus although it is a wrong setup. > > > > Change the prototype of pci_setup_iommu_per_bus to pass an error > > handle. This latter is set when iommu_per_bus is already set and > > used by the single caller (smmu_base_realize) to report a useful > > error to the end-user. > > > > While at it document pci_setup_iommu_per_bus callback in the header. > > > > Fixes: 66d2f665e163 ("hw/arm/virt: Allow user-creatable SMMUv3 dev instantiation") > > Signed-off-by: Eric Auger > > Tested-by: Nathan Chen > > Reviewed-by: Shameer Kolothum > > Reviewed-by: Nicolin Chen > > I'll take this into target-arm.next as it's a fix for a function > that's only used by the arm SMMU. > > thanks > -- PMM Pls do. Acked-by: Michael S. Tsirkin -- MST